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Diff: inc/adisense1000.h
- Revision:
- 2:625a45555a85
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/inc/adisense1000.h Fri Aug 25 11:17:37 2017 +0000
@@ -0,0 +1,621 @@
+/*!
+ ******************************************************************************
+ * @file: adisense1000.h
+ * @brief:
+ *-----------------------------------------------------------------------------
+ *
+Copyright (c) 2017 Emutex Ltd. / Analog Devices, Inc.
+
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+ - Modified versions of the software must be conspicuously marked as such.
+ - This software is licensed solely and exclusively for use with processors
+ manufactured by or for Analog Devices, Inc.
+ - This software may not be combined or merged with other code in any manner
+ that would cause the software to become subject to terms and conditions
+ which differ from those listed here.
+ - Neither the name of Analog Devices, Inc. nor the names of its
+ contributors may be used to endorse or promote products derived
+ from this software without specific prior written permission.
+ - The use of this software may or may not infringe the patent rights of one
+ or more patent holders. This license does not release you from the
+ requirement that you obtain separate licenses from these patent holders
+ to use this software.
+
+THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
+TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
+PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *****************************************************************************/
+#include "inc/registers/ADISENSE1000_REGISTERS_typedefs.h"
+#include "inc/registers/ADISENSE1000_REGISTERS.h"
+#include "inc/adi_sense_types.h"
+#include "inc/register_interface.h"
+
+
+#define READ_ONLY 1
+#define READ_WRITE 2
+#define WRITE_ONLY 3
+#define REGISTER_MAP_COUNT 218
+
+struct REGMAP_INFO
+{
+ uint16_t addr;
+ uint8_t size;
+ uint8_t rw;
+};
+
+const REGMAP_INFO regMap[REGISTER_MAP_COUNT] =
+{
+// address size r/w index id to array
+
+ {REG_SPI_INTERFACE_CONFIG_A, 1, READ_WRITE}, // SPI_INTERFACE_CONFIG_A
+ {REG_SPI_INTERFACE_CONFIG_B, 1, READ_WRITE}, // SPI_INTERFACE_CONFIG_B
+ {REG_SPI_DEVICE_CONFIG, 1, READ_WRITE}, // SPI_DEVICE_CONFIG
+ {REG_SPI_CHIP_TYPE, 1, READ_ONLY}, // SPI_CHIP_TYPE
+ {REG_SPI_PRODUCT_ID_L, 1, READ_ONLY}, // SPI_PRODUCT_ID_L
+ {REG_SPI_PRODUCT_ID_H, 1, READ_ONLY}, // SPI_PRODUCT_ID_H
+ {REG_SPI_CHIP_GRADE, 1, READ_ONLY}, // SPI_CHIP_GRADE
+ {REG_SPI_SCRATCH_PAD, 1, READ_WRITE}, // SPI_SCRATCH_PAD
+ {REG_SPI_SPI_REVISION, 1, READ_ONLY}, // SPI_SPI_REVISION
+ {REG_SPI_VENDOR_L, 1, READ_ONLY}, // SPI_VENDOR_L
+ {REG_SPI_VENDOR_H, 1, READ_ONLY}, // SPI_VENDOR_H
+ {REG_SPI_STREAM_MODE, 1, READ_WRITE}, // SPI_STREAM_MODE
+ {REG_SPI_INTERFACE_CONFIG_C, 1, READ_WRITE}, // SPI_INTERFACE_CONFIG_C
+ {REG_SPI_INTERFACE_STATUS_A, 1, READ_ONLY}, // SPI_INTERFACE_STATUS_A
+ {REG_CORE_COMMAND, 1, WRITE_ONLY}, // CORE_COMMAND
+ {REG_CORE_MODE, 1, READ_WRITE}, // CORE_MODE
+ {REG_CORE_POWER_CONFIG, 1, READ_WRITE}, // CORE_POWER_CONFIG
+ {REG_CORE_CYCLE_CONTROL, 2, READ_WRITE}, // CORE_CYCLE_CONTROL
+ {REG_CORE_FIFO_NUM_CYCLES, 1, READ_WRITE}, // CORE_FIFO_NUM_CYCLES
+ {REG_CORE_MULTI_CYCLE_RATE, 1, READ_WRITE}, // CORE_MULTI_CYCLE_RATE
+ {REG_CORE_STATUS, 1, READ_ONLY}, // CORE_STATUS
+ {REG_CORE_DIAGNOSTICS_STATUS, 2, READ_ONLY}, // CORE_DIAGNOSTICS_STATUS
+ {REG_CORE_CHANNEL_ALERT_STATUS, 2, READ_ONLY}, // CORE_CHANNEL_ALERT_STATUS
+ {REG_CORE_ALERT_DETAIL_CH0, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH0
+ {REG_CORE_ALERT_DETAIL_CH1, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH1
+ {REG_CORE_ALERT_DETAIL_CH2, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH2
+ {REG_CORE_ALERT_DETAIL_CH3, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH3
+ {REG_CORE_ALERT_DETAIL_CH4, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH4
+ {REG_CORE_ALERT_DETAIL_CH5, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH5
+ {REG_CORE_ALERT_DETAIL_CH6, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH6
+ {REG_CORE_ALERT_DETAIL_CH7, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH7
+ {REG_CORE_ALERT_DETAIL_CH8, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH8
+ {REG_CORE_ALERT_DETAIL_CH9, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH9
+ {REG_CORE_ALERT_DETAIL_CH10, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH10
+ {REG_CORE_ALERT_DETAIL_CH11, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH11
+ {REG_CORE_ALERT_DETAIL_CH12, 1, READ_ONLY}, // CORE_ALERT_DETAIL_CH12
+ {REG_CORE_EXTERNAL_REFERENCE1, 4, READ_WRITE}, // CORE_EXTERNAL_REFERENCE1
+ {REG_CORE_EXTERNAL_REFERENCE2, 4, READ_WRITE}, // CORE_EXTERNAL_REFERENCE2
+ {REG_CORE_DIAGNOSTICS_CONTROL, 1, READ_WRITE}, // CORE_DIAGNOSTICS_CONTROL
+ {REG_CORE_DIAGNOSTICS_EXTRA, 1, READ_WRITE}, // CORE_DIAGNOSTICS_EXTRA
+ {REG_CORE_DATA_FIFO, 8, READ_ONLY}, // CORE_DATA_FIFO
+ {REG_CORE_LUT_SELECT, 1, READ_WRITE}, // CORE_LUT_SELECT
+ {REG_CORE_LUT_OFFSET, 2, READ_WRITE}, // CORE_LUT_OFFSET
+ {REG_CORE_LUT_DATA, 1, READ_WRITE}, // CORE_LUT_DATA
+ {REG_CORE_CAL_SELECT, 1, READ_WRITE}, // CORE_CAL_SELECT
+ {REG_CORE_CAL_OFFSET, 2, READ_WRITE}, // CORE_CAL_OFFSET
+ {REG_CORE_CAL_DATA, 1, READ_WRITE}, // CORE_CAL_DATA
+ {REG_CORE_REVISION, 4, READ_ONLY}, // CORE_REVISION
+
+ {REG_CORE_CHANNEL_COUNT0, 1, READ_WRITE}, // CORE_CHANNEL_COUNT0
+ {REG_CORE_SENSOR_TYPE0, 2, READ_WRITE}, // CORE_SENSOR_TYPE0
+ {REG_CORE_SENSOR_DETAILS0, 4, READ_WRITE}, // CORE_SENSOR_DETAILS0
+ {REG_CORE_CHANNEL_EXCITATION0, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION0
+ {REG_CORE_DIGITAL_SENSOR_CODING0, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING0
+ {REG_CORE_FILTER_SELECT0, 3, READ_WRITE}, // CORE_FILTER_SELECT0
+ {REG_CORE_SETTLING_TIME0, 2, READ_WRITE}, // CORE_SETTLING_TIME0
+ {REG_CORE_HIGH_THRESHOLD_LIMIT0, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT0
+ {REG_CORE_LOW_THRESHOLD_LIMIT0, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT0
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS0, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS0
+ {REG_CORE_DIGITAL_SENSOR_COMMAND10, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND10
+ {REG_CORE_DIGITAL_SENSOR_COMMAND20, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND20
+ {REG_CORE_DIGITAL_SENSOR_COMMAND30, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND30
+ {REG_CORE_SENSOR_LUT_INDEX10, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX10
+ {REG_CORE_SENSOR_LUT_INDEX20, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX20
+
+ {REG_CORE_CHANNEL_COUNT1, 1, READ_WRITE}, // CORE_CHANNEL_COUNT1
+ {REG_CORE_SENSOR_TYPE1, 2, READ_WRITE}, // CORE_SENSOR_TYPE1
+ {REG_CORE_SENSOR_DETAILS1, 4, READ_WRITE}, // CORE_SENSOR_DETAILS1
+ {REG_CORE_CHANNEL_EXCITATION1, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION1
+ {REG_CORE_DIGITAL_SENSOR_CODING1, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING1
+ {REG_CORE_FILTER_SELECT1, 3, READ_WRITE}, // CORE_FILTER_SELECT1
+ {REG_CORE_SETTLING_TIME1, 2, READ_WRITE}, // CORE_SETTLING_TIME1
+ {REG_CORE_HIGH_THRESHOLD_LIMIT1, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT1
+ {REG_CORE_LOW_THRESHOLD_LIMIT1, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT1
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS1, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS1
+ {REG_CORE_DIGITAL_SENSOR_COMMAND11, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND11
+ {REG_CORE_DIGITAL_SENSOR_COMMAND21, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND21
+ {REG_CORE_DIGITAL_SENSOR_COMMAND31, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND31
+ {REG_CORE_SENSOR_LUT_INDEX11, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX11
+ {REG_CORE_SENSOR_LUT_INDEX21, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX21
+
+ {REG_CORE_CHANNEL_COUNT2, 1, READ_WRITE}, // CORE_CHANNEL_COUNT2
+ {REG_CORE_SENSOR_TYPE2, 2, READ_WRITE}, // CORE_SENSOR_TYPE2
+ {REG_CORE_SENSOR_DETAILS2, 4, READ_WRITE}, // CORE_SENSOR_DETAILS2
+ {REG_CORE_CHANNEL_EXCITATION2, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION2
+ {REG_CORE_DIGITAL_SENSOR_CODING2, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING2
+ {REG_CORE_FILTER_SELECT2, 3, READ_WRITE}, // CORE_FILTER_SELECT2
+ {REG_CORE_SETTLING_TIME2, 2, READ_WRITE}, // CORE_SETTLING_TIME2
+ {REG_CORE_HIGH_THRESHOLD_LIMIT2, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT2
+ {REG_CORE_LOW_THRESHOLD_LIMIT2, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT2
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS2, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS2
+ {REG_CORE_DIGITAL_SENSOR_COMMAND12, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND12
+ {REG_CORE_DIGITAL_SENSOR_COMMAND22, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND22
+ {REG_CORE_DIGITAL_SENSOR_COMMAND32, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND32
+ {REG_CORE_SENSOR_LUT_INDEX12, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX12
+ {REG_CORE_SENSOR_LUT_INDEX22, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX22
+
+ {REG_CORE_CHANNEL_COUNT3, 1, READ_WRITE}, // CORE_CHANNEL_COUNT3
+ {REG_CORE_SENSOR_TYPE3, 2, READ_WRITE}, // CORE_SENSOR_TYPE3
+ {REG_CORE_SENSOR_DETAILS3, 4, READ_WRITE}, // CORE_SENSOR_DETAILS3
+ {REG_CORE_CHANNEL_EXCITATION3, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION3
+ {REG_CORE_DIGITAL_SENSOR_CODING3, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING3
+ {REG_CORE_FILTER_SELECT3, 3, READ_WRITE}, // CORE_FILTER_SELECT3
+ {REG_CORE_SETTLING_TIME3, 2, READ_WRITE}, // CORE_SETTLING_TIME3
+ {REG_CORE_HIGH_THRESHOLD_LIMIT3, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT3
+ {REG_CORE_LOW_THRESHOLD_LIMIT3, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT3
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS3, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS3
+ {REG_CORE_DIGITAL_SENSOR_COMMAND13, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND13
+ {REG_CORE_DIGITAL_SENSOR_COMMAND23, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND23
+ {REG_CORE_DIGITAL_SENSOR_COMMAND33, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND33
+ {REG_CORE_SENSOR_LUT_INDEX13, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX13
+ {REG_CORE_SENSOR_LUT_INDEX23, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX23
+
+ {REG_CORE_CHANNEL_COUNT4, 1, READ_WRITE}, // CORE_CHANNEL_COUNT4
+ {REG_CORE_SENSOR_TYPE4, 2, READ_WRITE}, // CORE_SENSOR_TYPE4
+ {REG_CORE_SENSOR_DETAILS4, 4, READ_WRITE}, // CORE_SENSOR_DETAILS4
+ {REG_CORE_CHANNEL_EXCITATION4, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION4
+ {REG_CORE_DIGITAL_SENSOR_CODING4, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING4
+ {REG_CORE_FILTER_SELECT4, 3, READ_WRITE}, // CORE_FILTER_SELECT4
+ {REG_CORE_SETTLING_TIME4, 2, READ_WRITE}, // CORE_SETTLING_TIME4
+ {REG_CORE_HIGH_THRESHOLD_LIMIT4, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT4
+ {REG_CORE_LOW_THRESHOLD_LIMIT4, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT4
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS4, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS4
+ {REG_CORE_DIGITAL_SENSOR_COMMAND14, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND14
+ {REG_CORE_DIGITAL_SENSOR_COMMAND24, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND24
+ {REG_CORE_DIGITAL_SENSOR_COMMAND34, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND34
+ {REG_CORE_SENSOR_LUT_INDEX14, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX14
+ {REG_CORE_SENSOR_LUT_INDEX24, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX24
+
+ {REG_CORE_CHANNEL_COUNT5, 1, READ_WRITE}, // CORE_CHANNEL_COUNT5
+ {REG_CORE_SENSOR_TYPE5, 2, READ_WRITE}, // CORE_SENSOR_TYPE5
+ {REG_CORE_SENSOR_DETAILS5, 4, READ_WRITE}, // CORE_SENSOR_DETAILS5
+ {REG_CORE_CHANNEL_EXCITATION5, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION5
+ {REG_CORE_DIGITAL_SENSOR_CODING5, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING5
+ {REG_CORE_FILTER_SELECT5, 3, READ_WRITE}, // CORE_FILTER_SELECT5
+ {REG_CORE_SETTLING_TIME5, 2, READ_WRITE}, // CORE_SETTLING_TIME5
+ {REG_CORE_HIGH_THRESHOLD_LIMIT5, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT5
+ {REG_CORE_LOW_THRESHOLD_LIMIT5, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT5
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS5, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS5
+ {REG_CORE_DIGITAL_SENSOR_COMMAND15, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND15
+ {REG_CORE_DIGITAL_SENSOR_COMMAND25, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND25
+ {REG_CORE_DIGITAL_SENSOR_COMMAND35, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND35
+ {REG_CORE_SENSOR_LUT_INDEX15, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX15
+ {REG_CORE_SENSOR_LUT_INDEX25, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX25
+
+ {REG_CORE_CHANNEL_COUNT6, 1, READ_WRITE}, // CORE_CHANNEL_COUNT6
+ {REG_CORE_SENSOR_TYPE6, 2, READ_WRITE}, // CORE_SENSOR_TYPE6
+ {REG_CORE_SENSOR_DETAILS6, 4, READ_WRITE}, // CORE_SENSOR_DETAILS6
+ {REG_CORE_CHANNEL_EXCITATION6, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION6
+ {REG_CORE_DIGITAL_SENSOR_CODING6, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING6
+ {REG_CORE_FILTER_SELECT6, 3, READ_WRITE}, // CORE_FILTER_SELECT6
+ {REG_CORE_SETTLING_TIME6, 2, READ_WRITE}, // CORE_SETTLING_TIME6
+ {REG_CORE_HIGH_THRESHOLD_LIMIT6, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT6
+ {REG_CORE_LOW_THRESHOLD_LIMIT6, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT6
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS6, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS6
+ {REG_CORE_DIGITAL_SENSOR_COMMAND16, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND16
+ {REG_CORE_DIGITAL_SENSOR_COMMAND26, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND26
+ {REG_CORE_DIGITAL_SENSOR_COMMAND36, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND36
+ {REG_CORE_SENSOR_LUT_INDEX16, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX16
+ {REG_CORE_SENSOR_LUT_INDEX26, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX26
+
+ {REG_CORE_CHANNEL_COUNT7, 1, READ_WRITE}, // CORE_CHANNEL_COUNT7
+ {REG_CORE_SENSOR_TYPE7, 2, READ_WRITE}, // CORE_SENSOR_TYPE7
+ {REG_CORE_SENSOR_DETAILS7, 4, READ_WRITE}, // CORE_SENSOR_DETAILS7
+ {REG_CORE_CHANNEL_EXCITATION7, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION7
+ {REG_CORE_DIGITAL_SENSOR_CODING7, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING7
+ {REG_CORE_FILTER_SELECT7, 3, READ_WRITE}, // CORE_FILTER_SELECT7
+ {REG_CORE_SETTLING_TIME7, 2, READ_WRITE}, // CORE_SETTLING_TIME7
+ {REG_CORE_HIGH_THRESHOLD_LIMIT7, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT7
+ {REG_CORE_LOW_THRESHOLD_LIMIT7, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT7
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS7, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS7
+ {REG_CORE_DIGITAL_SENSOR_COMMAND17, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND17
+ {REG_CORE_DIGITAL_SENSOR_COMMAND27, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND27
+ {REG_CORE_DIGITAL_SENSOR_COMMAND37, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND37
+ {REG_CORE_SENSOR_LUT_INDEX17, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX17
+ {REG_CORE_SENSOR_LUT_INDEX27, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX27
+
+ {REG_CORE_CHANNEL_COUNT8, 1, READ_WRITE}, // CORE_CHANNEL_COUNT8
+ {REG_CORE_SENSOR_TYPE8, 2, READ_WRITE}, // CORE_SENSOR_TYPE8
+ {REG_CORE_SENSOR_DETAILS8, 4, READ_WRITE}, // CORE_SENSOR_DETAILS8
+ {REG_CORE_CHANNEL_EXCITATION8, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION8
+ {REG_CORE_DIGITAL_SENSOR_CODING8, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING8
+ {REG_CORE_FILTER_SELECT8, 3, READ_WRITE}, // CORE_FILTER_SELECT8
+ {REG_CORE_SETTLING_TIME8, 2, READ_WRITE}, // CORE_SETTLING_TIME8
+ {REG_CORE_HIGH_THRESHOLD_LIMIT8, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT8
+ {REG_CORE_LOW_THRESHOLD_LIMIT8, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT8
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS8, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS8
+ {REG_CORE_DIGITAL_SENSOR_COMMAND18, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND18
+ {REG_CORE_DIGITAL_SENSOR_COMMAND28, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND28
+ {REG_CORE_DIGITAL_SENSOR_COMMAND38, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND38
+ {REG_CORE_SENSOR_LUT_INDEX18, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX18
+ {REG_CORE_SENSOR_LUT_INDEX28, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX28
+
+ {REG_CORE_CHANNEL_COUNT9, 1, READ_WRITE}, // CORE_CHANNEL_COUNT9
+ {REG_CORE_SENSOR_TYPE9, 2, READ_WRITE}, // CORE_SENSOR_TYPE9
+ {REG_CORE_SENSOR_DETAILS9, 4, READ_WRITE}, // CORE_SENSOR_DETAILS9
+ {REG_CORE_CHANNEL_EXCITATION9, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION9
+ {REG_CORE_DIGITAL_SENSOR_CODING9, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING9
+ {REG_CORE_FILTER_SELECT9, 3, READ_WRITE}, // CORE_FILTER_SELECT9
+ {REG_CORE_SETTLING_TIME9, 2, READ_WRITE}, // CORE_SETTLING_TIME9
+ {REG_CORE_HIGH_THRESHOLD_LIMIT9, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT9
+ {REG_CORE_LOW_THRESHOLD_LIMIT9, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT9
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS9, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS9
+ {REG_CORE_DIGITAL_SENSOR_COMMAND19, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND19
+ {REG_CORE_DIGITAL_SENSOR_COMMAND29, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND29
+ {REG_CORE_DIGITAL_SENSOR_COMMAND39, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND39
+ {REG_CORE_SENSOR_LUT_INDEX19, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX19
+ {REG_CORE_SENSOR_LUT_INDEX29, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX29
+
+ {REG_CORE_CHANNEL_COUNT10, 1, READ_WRITE}, // CORE_CHANNEL_COUNT10
+ {REG_CORE_SENSOR_TYPE10, 2, READ_WRITE}, // CORE_SENSOR_TYPE10
+ {REG_CORE_SENSOR_DETAILS10, 4, READ_WRITE}, // CORE_SENSOR_DETAILS10
+ {REG_CORE_CHANNEL_EXCITATION10, 1, READ_WRITE}, // CORE_CHANNEL_EXCITATION10
+ {REG_CORE_DIGITAL_SENSOR_CODING10, 2, READ_WRITE}, // CORE_DIGITAL_SENSOR_CODING10
+ {REG_CORE_FILTER_SELECT10, 3, READ_WRITE}, // CORE_FILTER_SELECT10
+ {REG_CORE_SETTLING_TIME10, 2, READ_WRITE}, // CORE_SETTLING_TIME10
+ {REG_CORE_HIGH_THRESHOLD_LIMIT10, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT10
+ {REG_CORE_LOW_THRESHOLD_LIMIT10, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT10
+ {REG_CORE_DIGITAL_SENSOR_ADDRESS10, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_ADDRESS10
+ {REG_CORE_DIGITAL_SENSOR_COMMAND110, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND110
+ {REG_CORE_DIGITAL_SENSOR_COMMAND210, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND210
+ {REG_CORE_DIGITAL_SENSOR_COMMAND310, 1, READ_WRITE}, // CORE_DIGITAL_SENSOR_COMMAND310
+ {REG_CORE_SENSOR_LUT_INDEX110, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX110
+ {REG_CORE_SENSOR_LUT_INDEX210, 4, READ_WRITE}, // CORE_SENSOR_LUT_INDEX210
+
+ {REG_CORE_HIGH_THRESHOLD_LIMIT11, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT11
+ {REG_CORE_HIGH_THRESHOLD_LIMIT12, 4, READ_WRITE}, // CORE_HIGH_THRESHOLD_LIMIT12
+ {REG_CORE_LOW_THRESHOLD_LIMIT11, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT11
+ {REG_CORE_LOW_THRESHOLD_LIMIT12, 4, READ_WRITE}, // CORE_LOW_THRESHOLD_LIMIT12
+ {REG_TEST_TEST_REG_0, 1, READ_WRITE} // TEST_TEST_REG_0
+};
+
+enum ADISENSE1000_REGMAP_INDEX
+{
+ SPI_INTERFACE_CONFIG_A = 0x00,
+ SPI_INTERFACE_CONFIG_B,
+ SPI_DEVICE_CONFIG,
+ SPI_CHIP_TYPE,
+ SPI_PRODUCT_ID_L,
+ SPI_PRODUCT_ID_H,
+ SPI_CHIP_GRADE,
+ SPI_SCRATCH_PAD,
+ SPI_SPI_REVISION,
+ SPI_VENDOR_L,
+ SPI_VENDOR_H,
+ SPI_STREAM_MODE,
+ SPI_INTERFACE_CONFIG_C,
+ SPI_INTERFACE_STATUS_A,
+ CORE_COMMAND,
+ CORE_MODE,
+ CORE_POWER_CONFIG,
+ CORE_CYCLE_CONTROL,
+ CORE_FIFO_NUM_CYCLES,
+ CORE_MULTI_CYCLE_RATE,
+ CORE_STATUS,
+ CORE_DIAGNOSTICS_STATUS,
+ CORE_CHANNEL_ALERT_STATUS,
+ CORE_ALERT_DETAIL_CH0,
+ CORE_ALERT_DETAIL_CH1,
+ CORE_ALERT_DETAIL_CH2,
+ CORE_ALERT_DETAIL_CH3,
+ CORE_ALERT_DETAIL_CH4,
+ CORE_ALERT_DETAIL_CH5,
+ CORE_ALERT_DETAIL_CH6,
+ CORE_ALERT_DETAIL_CH7,
+ CORE_ALERT_DETAIL_CH8,
+ CORE_ALERT_DETAIL_CH9,
+ CORE_ALERT_DETAIL_CH10,
+ CORE_ALERT_DETAIL_CH11,
+ CORE_ALERT_DETAIL_CH12,
+ CORE_EXTERNAL_REFERENCE1,
+ CORE_EXTERNAL_REFERENCE2,
+ CORE_DIAGNOSTICS_CONTROL,
+ CORE_DIAGNOSTICS_EXTRA,
+ CORE_DATA_FIFO,
+ CORE_LUT_SELECT,
+ CORE_LUT_OFFSET,
+ CORE_LUT_DATA,
+ CORE_CAL_SELECT,
+ CORE_CAL_OFFSET,
+ CORE_CAL_DATA,
+ CORE_REVISION,
+ CORE_CHANNEL_COUNT0,
+ CORE_SENSOR_TYPE0,
+ CORE_SENSOR_DETAILS0,
+ CORE_CHANNEL_EXCITATION0,
+ CORE_DIGITAL_SENSOR_CODING0,
+ CORE_FILTER_SELECT0,
+ CORE_SETTLING_TIME0,
+ CORE_HIGH_THRESHOLD_LIMIT0,
+ CORE_LOW_THRESHOLD_LIMIT0,
+ CORE_DIGITAL_SENSOR_ADDRESS0,
+ CORE_DIGITAL_SENSOR_COMMAND10,
+ CORE_DIGITAL_SENSOR_COMMAND20,
+ CORE_DIGITAL_SENSOR_COMMAND30,
+ CORE_SENSOR_LUT_INDEX10,
+ CORE_SENSOR_LUT_INDEX20,
+ CORE_CHANNEL_COUNT1,
+ CORE_SENSOR_TYPE1,
+ CORE_SENSOR_DETAILS1,
+ CORE_CHANNEL_EXCITATION1,
+ CORE_DIGITAL_SENSOR_CODING1,
+ CORE_FILTER_SELECT1,
+ CORE_SETTLING_TIME1,
+ CORE_HIGH_THRESHOLD_LIMIT1,
+ CORE_LOW_THRESHOLD_LIMIT1,
+ CORE_DIGITAL_SENSOR_ADDRESS1,
+ CORE_DIGITAL_SENSOR_COMMAND11,
+ CORE_DIGITAL_SENSOR_COMMAND21,
+ CORE_DIGITAL_SENSOR_COMMAND31,
+ CORE_SENSOR_LUT_INDEX11,
+ CORE_SENSOR_LUT_INDEX21,
+ CORE_CHANNEL_COUNT2,
+ CORE_SENSOR_TYPE2,
+ CORE_SENSOR_DETAILS2,
+ CORE_CHANNEL_EXCITATION2,
+ CORE_DIGITAL_SENSOR_CODING2,
+ CORE_FILTER_SELECT2,
+ CORE_SETTLING_TIME2,
+ CORE_HIGH_THRESHOLD_LIMIT2,
+ CORE_LOW_THRESHOLD_LIMIT2,
+ CORE_DIGITAL_SENSOR_ADDRESS2,
+ CORE_DIGITAL_SENSOR_COMMAND12,
+ CORE_DIGITAL_SENSOR_COMMAND22,
+ CORE_DIGITAL_SENSOR_COMMAND32,
+ CORE_SENSOR_LUT_INDEX12,
+ CORE_SENSOR_LUT_INDEX22,
+ CORE_CHANNEL_COUNT3,
+ CORE_SENSOR_TYPE3,
+ CORE_SENSOR_DETAILS3,
+ CORE_CHANNEL_EXCITATION3,
+ CORE_DIGITAL_SENSOR_CODING3,
+ CORE_FILTER_SELECT3,
+ CORE_SETTLING_TIME3,
+ CORE_HIGH_THRESHOLD_LIMIT3,
+ CORE_LOW_THRESHOLD_LIMIT3,
+ CORE_DIGITAL_SENSOR_ADDRESS3,
+ CORE_DIGITAL_SENSOR_COMMAND13,
+ CORE_DIGITAL_SENSOR_COMMAND23,
+ CORE_DIGITAL_SENSOR_COMMAND33,
+ CORE_SENSOR_LUT_INDEX13,
+ CORE_SENSOR_LUT_INDEX23,
+ CORE_CHANNEL_COUNT4,
+ CORE_SENSOR_TYPE4,
+ CORE_SENSOR_DETAILS4,
+ CORE_CHANNEL_EXCITATION4,
+ CORE_DIGITAL_SENSOR_CODING4,
+ CORE_FILTER_SELECT4,
+ CORE_SETTLING_TIME4,
+ CORE_HIGH_THRESHOLD_LIMIT4,
+ CORE_LOW_THRESHOLD_LIMIT4,
+ CORE_DIGITAL_SENSOR_ADDRESS4,
+ CORE_DIGITAL_SENSOR_COMMAND14,
+ CORE_DIGITAL_SENSOR_COMMAND24,
+ CORE_DIGITAL_SENSOR_COMMAND34,
+ CORE_SENSOR_LUT_INDEX14,
+ CORE_SENSOR_LUT_INDEX24,
+ CORE_CHANNEL_COUNT5,
+ CORE_SENSOR_TYPE5,
+ CORE_SENSOR_DETAILS5,
+ CORE_CHANNEL_EXCITATION5,
+ CORE_DIGITAL_SENSOR_CODING5,
+ CORE_FILTER_SELECT5,
+ CORE_SETTLING_TIME5,
+ CORE_HIGH_THRESHOLD_LIMIT5,
+ CORE_LOW_THRESHOLD_LIMIT5,
+ CORE_DIGITAL_SENSOR_ADDRESS5,
+ CORE_DIGITAL_SENSOR_COMMAND15,
+ CORE_DIGITAL_SENSOR_COMMAND25,
+ CORE_DIGITAL_SENSOR_COMMAND35,
+ CORE_SENSOR_LUT_INDEX15,
+ CORE_SENSOR_LUT_INDEX25,
+ CORE_CHANNEL_COUNT6,
+ CORE_SENSOR_TYPE6,
+ CORE_SENSOR_DETAILS6,
+ CORE_CHANNEL_EXCITATION6,
+ CORE_DIGITAL_SENSOR_CODING6,
+ CORE_FILTER_SELECT6,
+ CORE_SETTLING_TIME6,
+ CORE_HIGH_THRESHOLD_LIMIT6,
+ CORE_LOW_THRESHOLD_LIMIT6,
+ CORE_DIGITAL_SENSOR_ADDRESS6,
+ CORE_DIGITAL_SENSOR_COMMAND16,
+ CORE_DIGITAL_SENSOR_COMMAND26,
+ CORE_DIGITAL_SENSOR_COMMAND36,
+ CORE_SENSOR_LUT_INDEX16,
+ CORE_SENSOR_LUT_INDEX26,
+ CORE_CHANNEL_COUNT7,
+ CORE_SENSOR_TYPE7,
+ CORE_SENSOR_DETAILS7,
+ CORE_CHANNEL_EXCITATION7,
+ CORE_DIGITAL_SENSOR_CODING7,
+ CORE_FILTER_SELECT7,
+ CORE_SETTLING_TIME7,
+ CORE_HIGH_THRESHOLD_LIMIT7,
+ CORE_LOW_THRESHOLD_LIMIT7,
+ CORE_DIGITAL_SENSOR_ADDRESS7,
+ CORE_DIGITAL_SENSOR_COMMAND17,
+ CORE_DIGITAL_SENSOR_COMMAND27,
+ CORE_DIGITAL_SENSOR_COMMAND37,
+ CORE_SENSOR_LUT_INDEX17,
+ CORE_SENSOR_LUT_INDEX27,
+ CORE_CHANNEL_COUNT8,
+ CORE_SENSOR_TYPE8,
+ CORE_SENSOR_DETAILS8,
+ CORE_CHANNEL_EXCITATION8,
+ CORE_DIGITAL_SENSOR_CODING8,
+ CORE_FILTER_SELECT8,
+ CORE_SETTLING_TIME8,
+ CORE_HIGH_THRESHOLD_LIMIT8,
+ CORE_LOW_THRESHOLD_LIMIT8,
+ CORE_DIGITAL_SENSOR_ADDRESS8,
+ CORE_DIGITAL_SENSOR_COMMAND18,
+ CORE_DIGITAL_SENSOR_COMMAND28,
+ CORE_DIGITAL_SENSOR_COMMAND38,
+ CORE_SENSOR_LUT_INDEX18,
+ CORE_SENSOR_LUT_INDEX28,
+ CORE_CHANNEL_COUNT9,
+ CORE_SENSOR_TYPE9,
+ CORE_SENSOR_DETAILS9,
+ CORE_CHANNEL_EXCITATION9,
+ CORE_DIGITAL_SENSOR_CODING9,
+ CORE_FILTER_SELECT9,
+ CORE_SETTLING_TIME9,
+ CORE_HIGH_THRESHOLD_LIMIT9,
+ CORE_LOW_THRESHOLD_LIMIT9,
+ CORE_DIGITAL_SENSOR_ADDRESS9,
+ CORE_DIGITAL_SENSOR_COMMAND19,
+ CORE_DIGITAL_SENSOR_COMMAND29,
+ CORE_DIGITAL_SENSOR_COMMAND39,
+ CORE_SENSOR_LUT_INDEX19,
+ CORE_SENSOR_LUT_INDEX29,
+ CORE_CHANNEL_COUNT10,
+ CORE_SENSOR_TYPE10,
+ CORE_SENSOR_DETAILS10,
+ CORE_CHANNEL_EXCITATION10,
+ CORE_DIGITAL_SENSOR_CODING10,
+ CORE_FILTER_SELECT10,
+ CORE_SETTLING_TIME10,
+ CORE_HIGH_THRESHOLD_LIMIT10,
+ CORE_LOW_THRESHOLD_LIMIT10,
+ CORE_DIGITAL_SENSOR_ADDRESS10,
+ CORE_DIGITAL_SENSOR_COMMAND110,
+ CORE_DIGITAL_SENSOR_COMMAND210,
+ CORE_DIGITAL_SENSOR_COMMAND310,
+ CORE_SENSOR_LUT_INDEX110,
+ CORE_SENSOR_LUT_INDEX210,
+ CORE_HIGH_THRESHOLD_LIMIT11,
+ CORE_HIGH_THRESHOLD_LIMIT12,
+ CORE_LOW_THRESHOLD_LIMIT11,
+ CORE_LOW_THRESHOLD_LIMIT12,
+ TEST_TEST_REG_0
+};
+
+typedef enum {
+ ADI_SENSE_CJC0 = 0, /* Channel 0 */
+ ADI_SENSE_CJC1, /* Channel 1 */
+ ADI_SENSE_SENSOR_0, /* Channel 2 */
+ ADI_SENSE_SENSOR_1, /* Channel 3 */
+ ADI_SENSE_SENSOR_2, /* Channel 4 */
+ ADI_SENSE_SENSOR_3, /* Channel 5 */
+ ADI_SENSE_V_MEASURE, /* Channel 6 */
+ ADI_SENSE_I_MEASURE, /* Channel 7 */
+ ADI_SENSE_DIG_SENSOR_0, /* Channel 8 */
+ ADI_SENSE_DIG_SENSOR_1, /* Channel 9 */
+ ADI_SENSE_DIG_SENSOR_3, /* Channel 10 */
+ ADI_SENSE_NUM_CHANNELS,
+}ADI_Channel_ID_t;
+
+const uint16_t baseReg[ADI_SENSE_NUM_CHANNELS] =
+ {
+ CORE_CHANNEL_COUNT0, /* Channel 0 Base Register */
+ CORE_CHANNEL_COUNT1, /* Channel 1 Base Register */
+ CORE_CHANNEL_COUNT2, /* Channel 2 Base Register */
+ CORE_CHANNEL_COUNT3, /* Channel 3 Base Register */
+ CORE_CHANNEL_COUNT4, /* Channel 4 Base Register */
+ CORE_CHANNEL_COUNT5, /* Channel 5 Base Register */
+ CORE_CHANNEL_COUNT6, /* Channel 6 Base Register */
+ CORE_CHANNEL_COUNT7, /* Channel 7 Base Register */
+ CORE_CHANNEL_COUNT8, /* Channel 8 Base Register */
+ CORE_CHANNEL_COUNT9, /* Channel 9 Base Register */
+ CORE_CHANNEL_COUNT10, /* Channel 10 Base Register*/
+ };
+
+const uint8_t baseAlertReg[ADI_SENSE_NUM_CHANNELS] =
+ {
+ CORE_ALERT_DETAIL_CH0, /* Channel 0 Base Alert Register */
+ CORE_ALERT_DETAIL_CH1, /* Channel 1 Base Alert Register */
+ CORE_ALERT_DETAIL_CH2, /* Channel 2 Base Alert Register */
+ CORE_ALERT_DETAIL_CH3, /* Channel 3 Base Alert Register */
+ CORE_ALERT_DETAIL_CH4, /* Channel 4 Base Alert Register */
+ CORE_ALERT_DETAIL_CH5, /* Channel 5 Base Alert Register */
+ CORE_ALERT_DETAIL_CH6, /* Channel 6 Base Alert Register */
+ CORE_ALERT_DETAIL_CH7, /* Channel 7 Base Alert Register */
+ CORE_ALERT_DETAIL_CH8, /* Channel 8 Base Alert Register */
+ CORE_ALERT_DETAIL_CH9, /* Channel 9 Base Alert Register */
+ CORE_ALERT_DETAIL_CH10 /* Channel 10 Base Register*/ ,
+ };
+
+
+
+//typedef struct __attribute__((packed, aligned(4)))channel_registers {
+typedef struct channel_registers {
+ ADI_CORE_Channel_Count_t Count;
+ ADI_CORE_Sensor_Type_t Type;
+ ADI_CORE_Sensor_Details_t Details;
+ ADI_CORE_Channel_Excitation_t Excitation;
+ ADI_CORE_Digital_Sensor_Coding_t DigitalCoding;
+ ADI_CORE_Filter_Select_t FilterSelect;
+ ADI_CORE_Settling_Time_t SettlingTime;
+ ADI_CORE_High_Threshold_Limit_t HighThreshold;
+ ADI_CORE_Low_Threshold_Limit_t LowThreshold;
+ ADI_CORE_Digital_Sensor_Address_t DigitalAddress;
+ ADI_CORE_Digital_Sensor_Command1_t DigitalCommand1;
+ ADI_CORE_Digital_Sensor_Command2_t DigitalCommand2;
+ ADI_CORE_Digital_Sensor_Command3_t DigitalCommand3;
+ ADI_CORE_Sensor_LUT_Index1_t LUTIndex1;
+ ADI_CORE_Sensor_LUT_Index2_t LUTIndex2;
+}ADI_Channel_Config_t;
+
+
+typedef ADI_CORE_Alert_Detail_Ch_t ADI_Channel_Alert_t[ADI_SENSE_NUM_CHANNELS];
+
+
+
+
+
+ADI_SENSE_RESULT ADISense1000_Open(void);
+
+ADI_SENSE_RESULT ADISense1000_GetID(uint16_t *pProductID);
+
+ADI_SENSE_RESULT ADISense1000_ConfigureModule(void);
+
+ADI_SENSE_RESULT ADISense1000_GetStatus(ADI_CORE_Status_t *pStatus);
+
+ADI_SENSE_RESULT ADISense1000_GetChannelAlert(ADI_Channel_Alert_t pAlerts);
+
+ADI_SENSE_RESULT ADISense1000_ConfigureChannel(ADI_Channel_ID_t eChannel,
+ ADI_Channel_Config_t *pConfig);
+bool ADISense1000_SampleReady(void);
+
+ADI_SENSE_RESULT ADISense1000_StartMeasurement(
+ ADI_CORE_Command_Special_Command cmd);
+
+ADI_SENSE_RESULT ADISense1000_StopMeasurement(ADI_Channel_ID_t eChannel);
+
+ADI_SENSE_RESULT ADISense1000_GetData(uint32_t *pRaw, float *pSample,
+ uint8_t *pStatus);
+
+ADI_SENSE_RESULT ADISense1000_GetRegister(uint16_t reg, uint32_t *pRegValue);
+
+ADI_SENSE_RESULT ADISense1000_SetRegister(uint16_t reg, uint32_t regValue);
+
+
+
