app3 prob

Dependencies:   mbed

Committer:
joGenie
Date:
Tue Feb 11 15:39:58 2014 +0000
Revision:
1:cb05875a0960
Parent:
0:6517bada7928
Child:
2:c25ba89e3581
New;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
RufflesAllD 0:6517bada7928 1 #include "mbed.h"
joGenie 1:cb05875a0960 2 #include "rtos.h"
joGenie 1:cb05875a0960 3 #include <bitset>
joGenie 1:cb05875a0960 4 #include <string>
RufflesAllD 0:6517bada7928 5
RufflesAllD 0:6517bada7928 6 Serial pc(USBTX, USBRX);
joGenie 1:cb05875a0960 7
joGenie 1:cb05875a0960 8 DigitalOut led1(LED1);
joGenie 1:cb05875a0960 9 DigitalOut led2(LED2);
joGenie 1:cb05875a0960 10 DigitalOut led3(LED3);
joGenie 1:cb05875a0960 11 DigitalOut led4(LED4);
joGenie 1:cb05875a0960 12
joGenie 1:cb05875a0960 13 unsigned long tc_periods[7] = {0};
joGenie 1:cb05875a0960 14 unsigned long period = 0;
joGenie 1:cb05875a0960 15 bool type_bit = true;
joGenie 1:cb05875a0960 16 int synchrone = 0;
joGenie 1:cb05875a0960 17
joGenie 1:cb05875a0960 18 string message = "";
joGenie 1:cb05875a0960 19 const unsigned long offset = 100;
joGenie 1:cb05875a0960 20
joGenie 1:cb05875a0960 21 bitset<16> bits(string("0101010101111110"));
RufflesAllD 0:6517bada7928 22
joGenie 1:cb05875a0960 23 void readTrame()
joGenie 1:cb05875a0960 24 {
joGenie 1:cb05875a0960 25 if (synchrone < 7)
joGenie 1:cb05875a0960 26 {
joGenie 1:cb05875a0960 27 tc_periods[synchrone] = LPC_TIM2->CR1 / 2;
joGenie 1:cb05875a0960 28 synchrone++;
joGenie 1:cb05875a0960 29
joGenie 1:cb05875a0960 30 if (synchrone == 7)
joGenie 1:cb05875a0960 31 {
joGenie 1:cb05875a0960 32 for (int i = 0; i < synchrone; i++)
joGenie 1:cb05875a0960 33 {
joGenie 1:cb05875a0960 34 period += tc_periods[i];
joGenie 1:cb05875a0960 35 }
joGenie 1:cb05875a0960 36
joGenie 1:cb05875a0960 37 period = period/7;
joGenie 1:cb05875a0960 38 }
joGenie 1:cb05875a0960 39 }
joGenie 1:cb05875a0960 40 else
joGenie 1:cb05875a0960 41 {
joGenie 1:cb05875a0960 42 unsigned int tc_count = LPC_TIM2->CR1;
joGenie 1:cb05875a0960 43 if (tc_count > (period - offset) && tc_count < (period + offset))
joGenie 1:cb05875a0960 44 {
joGenie 1:cb05875a0960 45 if (type_bit)
joGenie 1:cb05875a0960 46 {
joGenie 1:cb05875a0960 47 led2 = 1;
joGenie 1:cb05875a0960 48 led3 = 0;
joGenie 1:cb05875a0960 49 }
joGenie 1:cb05875a0960 50 else
joGenie 1:cb05875a0960 51 {
joGenie 1:cb05875a0960 52 led3 = 1;
joGenie 1:cb05875a0960 53 led2 = 0;
joGenie 1:cb05875a0960 54 }
joGenie 1:cb05875a0960 55 }
joGenie 1:cb05875a0960 56 else if (tc_count > (period*2 - offset) && tc_count < (period*2 + offset))
joGenie 1:cb05875a0960 57 {
joGenie 1:cb05875a0960 58 type_bit = !type_bit;
joGenie 1:cb05875a0960 59 led4 = 1;
joGenie 1:cb05875a0960 60 if (type_bit)
joGenie 1:cb05875a0960 61 {
joGenie 1:cb05875a0960 62 led2 = 1;
joGenie 1:cb05875a0960 63 led3 = 0;
joGenie 1:cb05875a0960 64 }
joGenie 1:cb05875a0960 65 else
joGenie 1:cb05875a0960 66 {
joGenie 1:cb05875a0960 67 led3 = 1;
joGenie 1:cb05875a0960 68 led2 = 0;
joGenie 1:cb05875a0960 69 }
joGenie 1:cb05875a0960 70 }
joGenie 1:cb05875a0960 71
joGenie 1:cb05875a0960 72 /*if (type_bit)
joGenie 1:cb05875a0960 73 message += "1";
joGenie 1:cb05875a0960 74 else
joGenie 1:cb05875a0960 75 message += "0";*/
joGenie 1:cb05875a0960 76 }
RufflesAllD 0:6517bada7928 77
joGenie 1:cb05875a0960 78 if (led1 == 0)
joGenie 1:cb05875a0960 79 led1 = 1;
joGenie 1:cb05875a0960 80 else
joGenie 1:cb05875a0960 81 led1 = 0;
joGenie 1:cb05875a0960 82
RufflesAllD 0:6517bada7928 83 LPC_TIM2->TC = 0;
RufflesAllD 0:6517bada7928 84 LPC_TIM2->IR = 0xFF;
RufflesAllD 0:6517bada7928 85 }
RufflesAllD 0:6517bada7928 86
joGenie 1:cb05875a0960 87 void sendTrame(std::bitset<16> bit)
joGenie 1:cb05875a0960 88 {
joGenie 1:cb05875a0960 89 for (int a = 15; a > 0; a--)
joGenie 1:cb05875a0960 90 {
joGenie 1:cb05875a0960 91 if (bit.test(a))
joGenie 1:cb05875a0960 92 {
joGenie 1:cb05875a0960 93 LPC_PWM1->MR1 = SystemCoreClock/2;
joGenie 1:cb05875a0960 94 LPC_PWM1->MR2 = 1;
joGenie 1:cb05875a0960 95 }
joGenie 1:cb05875a0960 96 else
joGenie 1:cb05875a0960 97 {
joGenie 1:cb05875a0960 98 LPC_PWM1->MR1 = 1;
joGenie 1:cb05875a0960 99 LPC_PWM1->MR2 = SystemCoreClock/2;
RufflesAllD 0:6517bada7928 100 }
RufflesAllD 0:6517bada7928 101
joGenie 1:cb05875a0960 102 while(LPC_PWM1->IR != 0x01);
RufflesAllD 0:6517bada7928 103
joGenie 1:cb05875a0960 104 LPC_PWM1->IR = 0xFF;
joGenie 1:cb05875a0960 105 }
joGenie 1:cb05875a0960 106
joGenie 1:cb05875a0960 107 LPC_PWM1->TCR = 0x0;
joGenie 1:cb05875a0960 108
joGenie 1:cb05875a0960 109 pc.printf("%s\n", message.c_str());
joGenie 1:cb05875a0960 110
joGenie 1:cb05875a0960 111 for ( int i = 0; i < 8; i++)
joGenie 1:cb05875a0960 112 {
joGenie 1:cb05875a0960 113 pc.printf("%d : \t", tc_periods[i]);
RufflesAllD 0:6517bada7928 114 }
joGenie 1:cb05875a0960 115
joGenie 1:cb05875a0960 116 pc.printf("\n");
joGenie 1:cb05875a0960 117 }
joGenie 1:cb05875a0960 118
joGenie 1:cb05875a0960 119 void send(void const *args)
joGenie 1:cb05875a0960 120 {
joGenie 1:cb05875a0960 121 sendTrame(bits);
joGenie 1:cb05875a0960 122 }
joGenie 1:cb05875a0960 123
joGenie 1:cb05875a0960 124 void _send()
joGenie 1:cb05875a0960 125 {
joGenie 1:cb05875a0960 126 if (led1 == 0)
joGenie 1:cb05875a0960 127 led1 = 1;
joGenie 1:cb05875a0960 128 else
joGenie 1:cb05875a0960 129 led1 = 0;
RufflesAllD 0:6517bada7928 130 }
RufflesAllD 0:6517bada7928 131
joGenie 1:cb05875a0960 132 void initialize()
joGenie 1:cb05875a0960 133 {
joGenie 1:cb05875a0960 134 // Set system control
joGenie 1:cb05875a0960 135 LPC_SC->PCONP |= (1 << 22) | (1 << 6); // Enable Timer2 et PWM
joGenie 1:cb05875a0960 136 LPC_SC->PCLKSEL0 |= (1 << 12); // PClk PWM = CCLK
joGenie 1:cb05875a0960 137 LPC_SC->PCLKSEL1 |= (1 << 12); // PClk Timer2 = CCLK
joGenie 1:cb05875a0960 138
joGenie 1:cb05875a0960 139 // Set pin connection
joGenie 1:cb05875a0960 140 LPC_PINCON->PINSEL0 |= (3 << 10); // Pin 29 Capture
joGenie 1:cb05875a0960 141 LPC_PINCON->PINSEL4 |= (1 << 2); // Pin 25 PWM
joGenie 1:cb05875a0960 142
joGenie 1:cb05875a0960 143 //Initialize Timer2 for capture
joGenie 1:cb05875a0960 144
joGenie 1:cb05875a0960 145 LPC_TIM2->TC = 0; // Initialize Time Counter
joGenie 1:cb05875a0960 146 LPC_TIM2->PC = 0; // Initialize Prescale Counter
joGenie 1:cb05875a0960 147 LPC_TIM2->PR = 0; // Initialize Prescale Register
joGenie 1:cb05875a0960 148 LPC_TIM2->TCR |= (1 << 1); // Reset Timer Control Register
joGenie 1:cb05875a0960 149 LPC_TIM2->IR = 0xFF; // Reset Interrupt Register
joGenie 1:cb05875a0960 150 LPC_TIM2->CCR |= (1 << 5) | (1 << 4) | (1 << 3); // Initialize Capture Control Register
joGenie 1:cb05875a0960 151 LPC_TIM2->CTCR = 0x00;
joGenie 1:cb05875a0960 152
joGenie 1:cb05875a0960 153 NVIC_SetVector(TIMER2_IRQn, (uint32_t)&readTrame);
joGenie 1:cb05875a0960 154 NVIC_EnableIRQ(TIMER2_IRQn);
RufflesAllD 0:6517bada7928 155
joGenie 1:cb05875a0960 156 LPC_TIM2->TCR = 0x01; // Start Timer Control Register
RufflesAllD 0:6517bada7928 157
joGenie 1:cb05875a0960 158 //Initialize PWM
joGenie 1:cb05875a0960 159 LPC_PWM1->MCR |= (1 << 1) | (1 << 0); // Initialize Match Control Register Interrupt/Reset
joGenie 1:cb05875a0960 160 LPC_PWM1->PCR |= (1 << 10) | (1 << 2); // Initialize PWM Control Register Output/Double-edge
joGenie 1:cb05875a0960 161
joGenie 1:cb05875a0960 162 LPC_PWM1->MR0 = SystemCoreClock; // Period
joGenie 1:cb05875a0960 163 LPC_PWM1->LER |= (1 << 2) | (1 << 1); // Initialize Latch Enable Register
joGenie 1:cb05875a0960 164 LPC_PWM1->TCR = (1 << 0); // Enable counter
RufflesAllD 0:6517bada7928 165
joGenie 1:cb05875a0960 166 LPC_PWM1->IR = 0xFF; // Reset Interrupt Registe
RufflesAllD 0:6517bada7928 167 }
joGenie 1:cb05875a0960 168
joGenie 1:cb05875a0960 169 int main()
joGenie 1:cb05875a0960 170 {
joGenie 1:cb05875a0960 171 initialize();
joGenie 1:cb05875a0960 172
joGenie 1:cb05875a0960 173 sendTrame(bits);
joGenie 1:cb05875a0960 174
joGenie 1:cb05875a0960 175 while(true) {
joGenie 1:cb05875a0960 176 }
joGenie 1:cb05875a0960 177 }