S5info_H14 / Mbed 2 deprecated APP3

Problematique

Dependencies:   mbed mbed-rtos

main.cpp@0:dc7095ab4963, 2014-02-09 (annotated)

Committer:
joGenie
Date:
Sun Feb 09 19:02:50 2014 +0000
Revision:
0:dc7095ab4963
Child:
1:261bb31628e8
APP3 Initialize for timer2 and PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
joGenie 0:dc7095ab4963 1 #include "mbed.h"
joGenie 0:dc7095ab4963 2
joGenie 0:dc7095ab4963 3 Serial pc(USBTX, USBRX);
joGenie 0:dc7095ab4963 4
joGenie 0:dc7095ab4963 5 //const bool preambule[8] = {false, true, false, true, false, true, false, true};
joGenie 0:dc7095ab4963 6 //const bool start_end[8] = {false, true, true, true, true, true, true, false};
joGenie 0:dc7095ab4963 7
joGenie 0:dc7095ab4963 8 bool Trame[16] = {false, true, false, true, true, true, true, false, false, false, true, false, false, true, true, true};
joGenie 0:dc7095ab4963 9
joGenie 0:dc7095ab4963 10 void readTrame()
joGenie 0:dc7095ab4963 11 {
joGenie 0:dc7095ab4963 12 pc.printf("Duree impulsion : %d microsecondes.\n\r", LPC_TIM2->CR1/(SystemCoreClock/1000000));
joGenie 0:dc7095ab4963 13
joGenie 0:dc7095ab4963 14 LPC_TIM2->IR = 0xFF;
joGenie 0:dc7095ab4963 15 }
joGenie 0:dc7095ab4963 16
joGenie 0:dc7095ab4963 17 void sendTrame(bool *trame)
joGenie 0:dc7095ab4963 18 {
joGenie 0:dc7095ab4963 19 for (int a = 0; a < 16; a++)
joGenie 0:dc7095ab4963 20 {
joGenie 0:dc7095ab4963 21 if (trame[a])
joGenie 0:dc7095ab4963 22 {
joGenie 0:dc7095ab4963 23 LPC_PWM1->MR1 = 1;
joGenie 0:dc7095ab4963 24 LPC_PWM1->MR2 = SystemCoreClock/2;
joGenie 0:dc7095ab4963 25 }
joGenie 0:dc7095ab4963 26 else
joGenie 0:dc7095ab4963 27 {
joGenie 0:dc7095ab4963 28 LPC_PWM1->MR1 = SystemCoreClock/2;
joGenie 0:dc7095ab4963 29 LPC_PWM1->MR2 = 1;
joGenie 0:dc7095ab4963 30 }
joGenie 0:dc7095ab4963 31
joGenie 0:dc7095ab4963 32 pc.printf("trame: %d\n\r", trame[a]);
joGenie 0:dc7095ab4963 33
joGenie 0:dc7095ab4963 34 while(LPC_PWM1->IR != 0x01);
joGenie 0:dc7095ab4963 35
joGenie 0:dc7095ab4963 36 LPC_PWM1->IR = 0xFF;
joGenie 0:dc7095ab4963 37 }
joGenie 0:dc7095ab4963 38 }
joGenie 0:dc7095ab4963 39
joGenie 0:dc7095ab4963 40 void initialize()
joGenie 0:dc7095ab4963 41 {
joGenie 0:dc7095ab4963 42 // Set system control
joGenie 0:dc7095ab4963 43 LPC_SC->PCONP |= (1 << 22) | (1 << 6); // Enable Timer2 et PWM
joGenie 0:dc7095ab4963 44 LPC_SC->PCLKSEL0 |= (1 << 12); // PClk PWM = CCLK
joGenie 0:dc7095ab4963 45 LPC_SC->PCLKSEL1 |= (1 << 12); // PClk Timer2 = CCLK
joGenie 0:dc7095ab4963 46
joGenie 0:dc7095ab4963 47 // Set pin connection
joGenie 0:dc7095ab4963 48 LPC_PINCON->PINSEL0 |= (3 << 10); // Pin 29 Capture
joGenie 0:dc7095ab4963 49 LPC_PINCON->PINSEL4 |= (1 << 2); // Pin 25 PWM
joGenie 0:dc7095ab4963 50
joGenie 0:dc7095ab4963 51 //Initialize Timer2 for capture
joGenie 0:dc7095ab4963 52 NVIC_SetVector(TIMER2_IRQn, uint32_t(readTrame));
joGenie 0:dc7095ab4963 53
joGenie 0:dc7095ab4963 54 LPC_TIM2->TC = 0; // Initialize Time Counter
joGenie 0:dc7095ab4963 55 LPC_TIM2->PC = 0; // Initialize Prescale Counter
joGenie 0:dc7095ab4963 56 LPC_TIM2->PR = 0; // Initialize Prescale Register
joGenie 0:dc7095ab4963 57 LPC_TIM2->TCR |= (1 << 1); // Reset Timer Control Register
joGenie 0:dc7095ab4963 58 LPC_TIM2->IR = 0xFF; // Reset Interrupt Register
joGenie 0:dc7095ab4963 59 LPC_TIM2->CCR |= (1 << 5) | (1 << 4) | (1 << 3); // Initialize Capture Control Register
joGenie 0:dc7095ab4963 60 LPC_TIM2->CTCR |= (1 << 2) | (1 << 0); // TC is incremented on rising edge
joGenie 0:dc7095ab4963 61
joGenie 0:dc7095ab4963 62 LPC_TIM2->TCR = 0x01; // Start Timer Control Register
joGenie 0:dc7095ab4963 63
joGenie 0:dc7095ab4963 64 //Initialize PWM
joGenie 0:dc7095ab4963 65 LPC_PWM1->MCR |= (1 << 1) | (1 << 0); // Initialize Match Control Register Interrupt/Reset
joGenie 0:dc7095ab4963 66 LPC_PWM1->PCR |= (1 << 10) | (1 << 2); // Initialize PWM Control Register Output/Double-edge
joGenie 0:dc7095ab4963 67
joGenie 0:dc7095ab4963 68 LPC_PWM1->MR0 = SystemCoreClock; // Period
joGenie 0:dc7095ab4963 69 LPC_PWM1->LER |= (1 << 2) | (1 << 1); // Initialize Latch Enable Register
joGenie 0:dc7095ab4963 70 LPC_PWM1->TCR |= (1 << 0); // Enable counter
joGenie 0:dc7095ab4963 71
joGenie 0:dc7095ab4963 72 LPC_PWM1->IR = 0xFF; // Reset Interrupt Register
joGenie 0:dc7095ab4963 73 }
joGenie 0:dc7095ab4963 74
joGenie 0:dc7095ab4963 75 int main()
joGenie 0:dc7095ab4963 76 {
joGenie 0:dc7095ab4963 77 initialize();
joGenie 0:dc7095ab4963 78
joGenie 0:dc7095ab4963 79 sendTrame(Trame);
joGenie 0:dc7095ab4963 80
joGenie 0:dc7095ab4963 81 while(true);
joGenie 0:dc7095ab4963 82 }