RZ/A1H CMSIS-RTOS RTX BSP for GR-PEACH.
Dependents: GR-PEACH_Azure_Speech ImageZoomInout_Sample ImageRotaion_Sample ImageScroll_Sample ... more
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SSIF
The SSIF driver implements transmission and reception functionality which uses the SSIF in the RZ/A Series.
Hello World!
Import program
00001 #include "mbed.h" 00002 #include "R_BSP_Ssif.h" 00003 #include "sine_data_tbl.h" 00004 00005 //I2S send only, The upper limit of write buffer is 8. 00006 R_BSP_Ssif ssif(P4_4, P4_5, P4_7, P4_6, 0x80, 8, 0); 00007 00008 static void callback_ssif_write_end(void * p_data, int32_t result, void * p_app_data) { 00009 if (result < 0) { 00010 printf("ssif write callback error %d\n", result); 00011 } 00012 } 00013 00014 int main() { 00015 rbsp_data_conf_t ssif_write_end_conf = {&callback_ssif_write_end, NULL}; 00016 ssif_channel_cfg_t ssif_cfg; 00017 int32_t result; 00018 00019 //I2S Master, 44.1kHz, 16bit, 2ch 00020 ssif_cfg.enabled = true; 00021 ssif_cfg.int_level = 0x78; 00022 ssif_cfg.slave_mode = false; 00023 ssif_cfg.sample_freq = 44100u; 00024 ssif_cfg.clk_select = SSIF_CFG_CKS_AUDIO_X1; 00025 ssif_cfg.multi_ch = SSIF_CFG_MULTI_CH_1; 00026 ssif_cfg.data_word = SSIF_CFG_DATA_WORD_16; 00027 ssif_cfg.system_word = SSIF_CFG_SYSTEM_WORD_32; 00028 ssif_cfg.bclk_pol = SSIF_CFG_FALLING; 00029 ssif_cfg.ws_pol = SSIF_CFG_WS_LOW; 00030 ssif_cfg.padding_pol = SSIF_CFG_PADDING_LOW; 00031 ssif_cfg.serial_alignment = SSIF_CFG_DATA_FIRST; 00032 ssif_cfg.parallel_alignment = SSIF_CFG_LEFT; 00033 ssif_cfg.ws_delay = SSIF_CFG_DELAY; 00034 ssif_cfg.noise_cancel = SSIF_CFG_DISABLE_NOISE_CANCEL; 00035 ssif_cfg.tdm_mode = SSIF_CFG_DISABLE_TDM; 00036 ssif_cfg.romdec_direct.mode = SSIF_CFG_DISABLE_ROMDEC_DIRECT; 00037 ssif_cfg.romdec_direct.p_cbfunc = NULL; 00038 result = ssif.ConfigChannel(&ssif_cfg); 00039 if (result < 0) { 00040 printf("ssif config error %d\n", result); 00041 } 00042 00043 while (1) { 00044 //The upper limit of write buffer is 8. 00045 result = ssif.write((void *)sin_data_44100Hz_16bit_2ch, 00046 sizeof(sin_data_44100Hz_16bit_2ch), &ssif_write_end_conf); 00047 if (result < 0) { 00048 printf("ssif write api error %d\n", result); 00049 } 00050 } 00051 }
API
Import library
Public Member Functions |
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R_BSP_Ssif (PinName sck, PinName ws, PinName tx, PinName rx, uint8_t int_level=0x80, int32_t max_write_num=16, int32_t max_read_num=16) | |
Constructor.
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virtual | ~R_BSP_Ssif () |
Destructor.
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int32_t | GetSsifChNo (void) |
Get a value of SSIF channel number.
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bool | ConfigChannel (const ssif_channel_cfg_t *const p_ch_cfg) |
Save configuration to the SSIF driver.
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bool | GetStatus (uint32_t *const p_status) |
Get a value of SSISR register.
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int32_t | write (void *const p_data, uint32_t data_size, const rbsp_data_conf_t *const p_data_conf=NULL) |
Write count bytes to the file associated.
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int32_t | read (void *const p_data, uint32_t data_size, const rbsp_data_conf_t *const p_data_conf=NULL) |
Read count bytes to the file associated.
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Protected Member Functions |
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void | write_init (void *handle, void *p_func_a, int32_t max_buff_num=16) |
Write init.
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void | read_init (void *handle, void *p_func_a, int32_t max_buff_num=16) |
Read init.
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Interface
See the Pinout page for more details
SCUX
The SCUX module consists of a sampling rate converter, a digital volume unit, and a mixer.
The SCUX driver can perform asynchronous and synchronous sampling rate conversions using the sampling rate converter. The SCUX driver uses the DMA transfer mode to input and output audio data.
Hello World!
Import program
00001 #include "mbed.h" 00002 #include "R_BSP_Scux.h" 00003 #include "USBHostMSD.h" 00004 00005 R_BSP_Scux scux(SCUX_CH_0); 00006 00007 #define WRITE_SAMPLE_NUM (128) 00008 #define READ_SAMPLE_NUM (2048) 00009 00010 const short sin_data[WRITE_SAMPLE_NUM] = { 00011 0x0000,0x0000,0x0C8C,0x0C8C,0x18F9,0x18F9,0x2528,0x2528 00012 ,0x30FB,0x30FB,0x3C56,0x3C56,0x471C,0x471C,0x5133,0x5133 00013 ,0x5A82,0x5A82,0x62F1,0x62F1,0x6A6D,0x6A6D,0x70E2,0x70E2 00014 ,0x7641,0x7641,0x7A7C,0x7A7C,0x7D89,0x7D89,0x7F61,0x7F61 00015 ,0x7FFF,0x7FFF,0x7F61,0x7F61,0x7D89,0x7D89,0x7A7C,0x7A7C 00016 ,0x7641,0x7641,0x70E2,0x70E2,0x6A6D,0x6A6D,0x62F1,0x62F1 00017 ,0x5A82,0x5A82,0x5133,0x5133,0x471C,0x471C,0x3C56,0x3C56 00018 ,0x30FB,0x30FB,0x2528,0x2528,0x18F9,0x18F9,0x0C8C,0x0C8C 00019 ,0x0000,0x0000,0xF374,0xF374,0xE707,0xE707,0xDAD8,0xDAD8 00020 ,0xCF05,0xCF05,0xC3AA,0xC3AA,0xB8E4,0xB8E4,0xAECD,0xAECD 00021 ,0xA57E,0xA57E,0x9D0F,0x9D0F,0x9593,0x9593,0x8F1E,0x8F1E 00022 ,0x89BF,0x89BF,0x8584,0x8584,0x8277,0x8277,0x809F,0x809F 00023 ,0x8001,0x8001,0x809F,0x809F,0x8277,0x8277,0x8584,0x8584 00024 ,0x89BF,0x89BF,0x8F1E,0x8F1E,0x9593,0x9593,0x9D0F,0x9D0F 00025 ,0xA57E,0xA57E,0xAECD,0xAECD,0xB8E4,0xB8E4,0xC3AA,0xC3AA 00026 ,0xCF05,0xCF05,0xDAD8,0xDAD8,0xE707,0xE707,0xF374,0xF374 00027 }; 00028 00029 #if defined(__ICCARM__) 00030 #pragma data_alignment=4 00031 short write_buff[WRITE_SAMPLE_NUM]@ ".mirrorram"; 00032 #pragma data_alignment=4 00033 short read_buff[READ_SAMPLE_NUM]@ ".mirrorram"; 00034 #else 00035 short write_buff[WRITE_SAMPLE_NUM] __attribute((section("NC_BSS"),aligned(4))); 00036 short read_buff[READ_SAMPLE_NUM] __attribute((section("NC_BSS"),aligned(4))); 00037 #endif 00038 00039 void scux_setup(void); 00040 void write_task(void const*); 00041 void file_output_to_usb(void); 00042 00043 int main(void) { 00044 // set up SRC parameters. 00045 scux_setup(); 00046 00047 printf("Sampling rate conversion Start.\n"); 00048 // start accepting transmit/receive requests. 00049 scux.TransStart(); 00050 00051 // create a new thread to write to SCUX. 00052 Thread writeTask(write_task, NULL, osPriorityNormal, 1024 * 4); 00053 00054 // receive request to the SCUX driver. 00055 scux.read(read_buff, sizeof(read_buff)); 00056 printf("Sampling rate conversion End.\n"); 00057 00058 // output binary file to USB port 0. 00059 file_output_to_usb(); 00060 } 00061 00062 void scux_setup(void) { 00063 scux_src_usr_cfg_t src_cfg; 00064 00065 src_cfg.src_enable = true; 00066 src_cfg.word_len = SCUX_DATA_LEN_16; 00067 src_cfg.mode_sync = true; 00068 src_cfg.input_rate = SAMPLING_RATE_48000HZ; 00069 src_cfg.output_rate = SAMPLING_RATE_96000HZ; 00070 src_cfg.select_in_data_ch[0] = SELECT_IN_DATA_CH_0; 00071 src_cfg.select_in_data_ch[1] = SELECT_IN_DATA_CH_1; 00072 00073 scux.SetSrcCfg(&src_cfg); 00074 } 00075 00076 void scux_flush_callback(int scux_ch) { 00077 // do nothing 00078 } 00079 00080 void write_task(void const*) { 00081 memcpy(write_buff, sin_data, sizeof(write_buff)); 00082 // send request to the SCUX driver. 00083 scux.write(write_buff, sizeof(write_buff)); 00084 00085 // stop the acceptance of transmit/receive requests. 00086 scux.FlushStop(&scux_flush_callback); 00087 } 00088 00089 void file_output_to_usb(void) { 00090 FILE * fp = NULL; 00091 int i; 00092 00093 USBHostMSD msd("usb"); 00094 00095 // try to connect a MSD device 00096 for(i = 0; i < 10; i++) { 00097 if (msd.connect()) { 00098 break; 00099 } 00100 wait(0.5); 00101 } 00102 00103 if (msd.connected()) { 00104 fp = fopen("/usb/scux_input.dat", "rb"); 00105 if (fp == NULL) { 00106 fp = fopen("/usb/scux_input.dat", "wb"); 00107 if (fp != NULL) { 00108 fwrite(write_buff, sizeof(short), WRITE_SAMPLE_NUM, fp); 00109 fclose(fp); 00110 printf("Output binary file(Input data) to USB.\n"); 00111 } else { 00112 printf("Failed to output binary file(Input data).\n"); 00113 } 00114 } else { 00115 printf("Binary file(Input data) exists.\n"); 00116 fclose(fp); 00117 } 00118 00119 fp = fopen("/usb/scux_output.dat", "rb"); 00120 if (fp == NULL) { 00121 fp = fopen("/usb/scux_output.dat", "wb"); 00122 if (fp != NULL) { 00123 fwrite(read_buff, sizeof(short), READ_SAMPLE_NUM, fp); 00124 fclose(fp); 00125 printf("Output binary file(Output data) to USB.\n"); 00126 } else { 00127 printf("Failed to output binary file(Output data).\n"); 00128 } 00129 } else { 00130 printf("Binary file(Output data) exists.\n"); 00131 fclose(fp); 00132 } 00133 } else { 00134 printf("Failed to connect to the USB device.\n"); 00135 } 00136 }
API
Import library
Public Member Functions |
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R_BSP_Scux ( scux_ch_num_t channel, uint8_t int_level=0x80, int32_t max_write_num=16, int32_t max_read_num=16) | |
Constructor: Initializes and opens the channel designated by the SCUX driver.
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virtual | ~R_BSP_Scux (void) |
Destructor: Closes the channel designated by the SCUX driver and exits.
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bool | TransStart (void) |
Sets up the SCUX HW and starts operation, then starts accepting write/read requests.
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bool | FlushStop (void(*const callback)(int32_t)) |
Stops accepting write/read requests, flushes out all data in the SCUX that is requested for transfer, then stops the HW operation.
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bool | ClearStop (void) |
Discards all data in the SCUX that is requested for transfer before stopping the hardware operation and stops accepting write/read requests.
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bool | SetSrcCfg (const scux_src_usr_cfg_t *const p_src_param) |
Sets up SRC parameters.
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bool | GetWriteStat (uint32_t *const p_write_stat) |
Obtains the state information of the write request.
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bool | GetReadStat (uint32_t *const p_read_stat) |
Obtains the state information of the read request.
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int32_t | write (void *const p_data, uint32_t data_size, const rbsp_data_conf_t *const p_data_conf=NULL) |
Write count bytes to the file associated.
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int32_t | read (void *const p_data, uint32_t data_size, const rbsp_data_conf_t *const p_data_conf=NULL) |
Read count bytes to the file associated.
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Protected Member Functions |
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void | write_init (void *handle, void *p_func_a, int32_t max_buff_num=16) |
Write init.
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void | read_init (void *handle, void *p_func_a, int32_t max_buff_num=16) |
Read init.
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Write request state transition diagram
Read request state transition diagram
Diff: RenesasBSP/drv_src/dma/dma.c
- Revision:
- 5:1390bfcb667c
- Parent:
- 0:702bf7b2b7d8
diff -r 7318d8e553a4 -r 1390bfcb667c RenesasBSP/drv_src/dma/dma.c --- a/RenesasBSP/drv_src/dma/dma.c Tue Jul 21 01:48:39 2015 +0000 +++ b/RenesasBSP/drv_src/dma/dma.c Tue Aug 18 04:00:49 2015 +0000 @@ -23,8 +23,8 @@ /**************************************************************************//** * @file dma.c -* $Rev: 1133 $ -* $Date:: 2014-09-08 14:33:59 +0900#$ +* $Rev: 1674 $ +* $Date:: 2015-05-29 16:35:57 +0900#$ * @brief DMA Driver internal functions ******************************************************************************/ @@ -41,7 +41,6 @@ #include "aioif.h" #include "iodefine.h" #include "gic.h" -#include "bsp_util.h" /****************************************************************************** Private global driver management information @@ -51,31 +50,6 @@ static dma_info_drv_t gb_info_drv; /****************************************************************************** -Private global channel semaphore information -******************************************************************************/ - -/* driver semaphore name define */ -/* ->MISRA 8.8, 8.10, IPA M2.2.2 There is no problem in the description of declaration of -OS resource itself */ -osSemaphoreDef(sem_dma_ch0); -osSemaphoreDef(sem_dma_ch1); -osSemaphoreDef(sem_dma_ch2); -osSemaphoreDef(sem_dma_ch3); -osSemaphoreDef(sem_dma_ch4); -osSemaphoreDef(sem_dma_ch5); -osSemaphoreDef(sem_dma_ch6); -osSemaphoreDef(sem_dma_ch7); -osSemaphoreDef(sem_dma_ch8); -osSemaphoreDef(sem_dma_ch9); -osSemaphoreDef(sem_dma_ch10); -osSemaphoreDef(sem_dma_ch11); -osSemaphoreDef(sem_dma_ch12); -osSemaphoreDef(sem_dma_ch13); -osSemaphoreDef(sem_dma_ch14); -osSemaphoreDef(sem_dma_ch15); -/* <-MISRA 8.8, 8.10, IPA M2.2.2 */ - -/****************************************************************************** Private function define (interrupt handler) ******************************************************************************/ @@ -145,17 +119,13 @@ * Description : Initialize DMA driver. * Arguments : *p_dma_init_param - * Pointer of init parameters. -* sem_drv - -* Driver semaphore ID. * Return Value : ESUCCESS - * Operation successful. * OS error num - * Registering handler failed. -* ENOMEM - -* Making semaphore failed. ******************************************************************************/ -int_t DMA_Initialize(const dma_drv_init_t * const p_dma_init_param, const osSemaphoreId sem_drv) +int_t DMA_Initialize(const dma_drv_init_t * const p_dma_init_param) { int_t retval = ESUCCESS; int_t ch_count; @@ -268,33 +238,9 @@ DMAINT15_IRQn }; - /* driver semaphore table define */ - static const osSemaphoreDef_t *p_gb_semdef_ch[DMA_CH_NUM] = - { - osSemaphore(sem_dma_ch0), - osSemaphore(sem_dma_ch1), - osSemaphore(sem_dma_ch2), - osSemaphore(sem_dma_ch3), - osSemaphore(sem_dma_ch4), - osSemaphore(sem_dma_ch5), - osSemaphore(sem_dma_ch6), - osSemaphore(sem_dma_ch7), - osSemaphore(sem_dma_ch8), - osSemaphore(sem_dma_ch9), - osSemaphore(sem_dma_ch10), - osSemaphore(sem_dma_ch11), - osSemaphore(sem_dma_ch12), - osSemaphore(sem_dma_ch13), - osSemaphore(sem_dma_ch14), - osSemaphore(sem_dma_ch15) - }; - /* element of p_dma_init_param is copied to element of gb_info_drv */ gb_info_drv.p_err_aio = p_dma_init_param->p_aio; - /* set driver semaphore ID */ - gb_info_drv.sem_drv = sem_drv; - /* set DMA error interrupt number */ gb_info_drv.err_irq_num = DMAERR_IRQn; @@ -365,27 +311,6 @@ set round robin mode */ gb_info_drv.info_ch[HIGH_COMMON_REG_OFFSET].p_dma_common_reg->DCTRL_0_7 = DCTRL_INIT_VALUE; - /* making channel semaphore */ - init_check_flag = false; - ch_count = 0; - while (false == init_check_flag) - { - /* make semaphore */ - gb_info_drv.info_ch[ch_count].sem_ch = osSemaphoreCreate(p_gb_semdef_ch[ch_count], 1); - if (NULL == gb_info_drv.info_ch[ch_count].sem_ch) - { - /* set error return value */ - retval = ENOMEM; - init_check_flag = true; - } - - if ((DMA_CH_NUM - 1) == ch_count) - { - init_check_flag = true; - } - ch_count++; - } - if (ESUCCESS == retval) { /* DMA end interrupt handler register */ @@ -469,8 +394,7 @@ * Return Value : ESUCCESS - * Operation successful. * OS error num - -* Unregistering handler failed, -* or Semaphore release failed. +* Unregistering handler failed ******************************************************************************/ int_t DMA_UnInitialize(void) @@ -478,7 +402,6 @@ int_t retval = ESUCCESS; int_t ch_count; uint32_t error_code; - osStatus sem_status; bool_t uninit_check_flag; /* init DMA registers */ @@ -540,29 +463,6 @@ if (ESUCCESS == retval) { - /* delete channel semaphore */ - ch_count = 0; - uninit_check_flag = false; - while (false == uninit_check_flag) - { - /* semaphore delete */ - sem_status = osSemaphoreDelete(gb_info_drv.info_ch[ch_count].sem_ch); - if (osOK != sem_status) - { - /* set error return value */ - retval = (int_t)sem_status; - uninit_check_flag = true; - } - if ((DMA_CH_NUM - 1) == ch_count) - { - uninit_check_flag = true; - } - ch_count++; - } - } - - if (ESUCCESS == retval) - { /* set channel status to DMA_CH_UNINIT */ for (ch_count = 0; ch_count < DMA_CH_NUM; ch_count++) { @@ -607,10 +507,8 @@ * Return Value : channel - * Open channel number. * error code - -* OS error num : Semaphore release failed. -* EMFILE : When looking for a free channel, but a free channel -* didn't exist. -* EFAULT: Wait semaphore failed. +* EMFILE : When looking for a free channel, but a free +* channel didn't exist. ******************************************************************************/ int_t DMA_GetFreeChannel(void) @@ -618,8 +516,6 @@ int_t retval = EFAULT; dma_info_ch_t *dma_info_ch; int_t ch_alloc; - int_t sem_wait_status; - osStatus sem_release_status; bool_t ch_stat_check_flag; /* looking for free channel */ @@ -628,21 +524,6 @@ while (false == ch_stat_check_flag) { dma_info_ch = DMA_GetDrvChInfo(ch_alloc); - /* start semaphore wait forever */ - /* check carrying out on the task (0) */ - if (0 == R_ExceptionalMode()) - { - /* ->MISRA 10.6, osWaitForever is defined by the header got from related section*/ - sem_wait_status = osSemaphoreWait(dma_info_ch->sem_ch, osWaitForever); - /* <-MISRA 10.6 */ - /* semaphore error check */ - if ((-1) == sem_wait_status) - { - /* set error return value */ - retval = EFAULT; - ch_stat_check_flag = true; - } - } if (false == ch_stat_check_flag) { @@ -650,36 +531,8 @@ { DMA_OpenChannel(ch_alloc); retval = ch_alloc; - /* semaphore release */ - /* check carrying out on the task (0) */ - if (0 == R_ExceptionalMode()) - { - sem_release_status = osSemaphoreRelease(dma_info_ch->sem_ch); - /* semaphore error check */ - if (osOK != sem_release_status) - { - /* set error return value */ - retval = (int_t)sem_release_status; - } - } ch_stat_check_flag = true; } - else - { - /* semaphore release */ - /* check carrying out on the task (0) */ - if (0 == R_ExceptionalMode()) - { - sem_release_status = osSemaphoreRelease(dma_info_ch->sem_ch); - /* semaphore error check */ - if (osOK != sem_release_status) - { - /* set error return value */ - retval = (int_t)sem_release_status; - ch_stat_check_flag = true; - } - } - } if (false == ch_stat_check_flag) { ch_alloc++; @@ -709,37 +562,19 @@ * Return Value : channel - * Open channel number. * error code - -* OS error num : Semaphore release failed. * EBUSY : It has been allocated already in channel. * ENOTSUP : Channel status is DMA_CH_UNINIT. * EFAULT: Channel status is besides the status definded in * dma_stat_ch_t. -* Wait semaphore failed. ******************************************************************************/ int_t DMA_GetFixedChannel(const int_t channel) { int_t retval = ESUCCESS; dma_info_ch_t *dma_info_ch; - int_t sem_wait_status; - osStatus sem_release_status; /* allocate the specified number */ dma_info_ch = DMA_GetDrvChInfo(channel); - /* start semaphore wait forever */ - /* check carrying out on the task (0) */ - if (0 == R_ExceptionalMode()) - { - /* ->MISRA 10.6, osWaitForever is defined by the header got from related section*/ - sem_wait_status = osSemaphoreWait(dma_info_ch->sem_ch, osWaitForever); - /* <-MISRA 10.6 */ - /* semaphore error check */ - if ((-1) == sem_wait_status) - { - /* set error return value */ - retval = EFAULT; - } - } if (ESUCCESS == retval) { @@ -769,18 +604,6 @@ } } - /* semaphore release */ - /* check carrying out on the task (0) */ - if (0 == R_ExceptionalMode()) - { - sem_release_status = osSemaphoreRelease(dma_info_ch->sem_ch); - /* semaphore error check */ - if (osOK != sem_release_status) - { - /* set error return value */ - retval = (int_t)sem_release_status; - } - } } return retval; @@ -801,18 +624,9 @@ void DMA_CloseChannel(const int_t channel) { - int_t was_masked; - - /* disable all irq */ - was_masked = __disable_irq(); /* clear DMARS register */ *(gb_info_drv.info_ch[channel].p_dma_dmars_reg) &= gb_info_drv.info_ch[channel].mask_dmars; - if (0 == was_masked) - { - /* enable all irq */ - __enable_irq(); - - } + /* set channel status to DMA_CH_INIT */ gb_info_drv.info_ch[channel].ch_stat = DMA_CH_INIT; @@ -842,7 +656,6 @@ { uint32_t chcfg_sel; uint32_t value_dmars; - int_t was_masked; /* set DMA transfer parameter to DMA channel infomation */ gb_info_drv.info_ch[channel].resource = p_ch_setup->resource; @@ -853,19 +666,12 @@ gb_info_drv.info_ch[channel].dst_cnt = p_ch_setup->dst_cnt; gb_info_drv.info_ch[channel].p_end_aio = p_ch_setup->p_aio; - /* disable all irq */ - was_masked = __disable_irq(); /* set DMARS value and protect non change bit */ value_dmars = *(gb_info_drv.info_ch[channel].p_dma_dmars_reg); value_dmars = ((value_dmars & gb_info_drv.info_ch[channel].mask_dmars) | (uint32_t)(p_ch_cfg->dmars << gb_info_drv.info_ch[channel].shift_dmars)); /* set DMARS register value */ *(gb_info_drv.info_ch[channel].p_dma_dmars_reg) = value_dmars; - if (0 == was_masked) - { - /* enable all irq */ - __enable_irq(); - } /* set CHCFG regsiter */ if (channel < HIGH_COMMON_REG_OFFSET) @@ -1642,10 +1448,17 @@ __inline static void R_DMA_EndHandlerProcess(const int_t channel) { bool_t store_next_dma_flag; + int_t was_masked; if (NULL != gb_info_drv.info_ch[channel].p_end_aio) { - + /* disable all irq */ +#if defined (__ICCARM__) + was_masked = __disable_irq_iar(); +#else + was_masked = __disable_irq(); +#endif + /* store next_dma_flag */ store_next_dma_flag = gb_info_drv.info_ch[channel].next_dma_flag; @@ -1689,16 +1502,21 @@ /* clear TC, END bit */ gb_info_drv.info_ch[channel].p_dma_ch_reg->CHCTRL_n = (CHCTRL_SET_CLRTC | CHCTRL_SET_CLREND); + if (0 == was_masked) + { + __enable_irq(); + } + /* call back to the module function which called DMA driver */ ahf_complete(NULL, gb_info_drv.info_ch[channel].p_end_aio); - } else { ; /* NON_NOTICE_ASSERT:<callback pointer is NULL> */ } - + + return; } /******************************************************************************