Graphics framework for GR-PEACH. When you use this program, we judge you have agreed to the following contents. https://developer.mbed.org/teams/Renesas/wiki/About-LICENSE

Dependents:   ImageZoomInout_Sample ImageRotaion_Sample ImageScroll_Sample GR-PEACH_LCD_4_3inch_Save_to_USB ... more

License

When you use this library, we judge you have agreed to the following contents.

https://developer.mbed.org/teams/Renesas/wiki/About-LICENSE

Note

If you import the GraphicsFramework library, please import GR-PEACH_video library and R_BSP library together.



JPEG Converter

The JPEG Converter driver implements encode and decode functionality which uses the JCU of the RZ/A Series.

Hello World!

Import programJCU_HelloWorld

Hello World for JCU(JPEG Codec Unit). JCU is JPEG codec unit of RZ/A1. When you use this program, we judge you have agreed to the following contents. https://developer.mbed.org/teams/Renesas/wiki/About-LICENSE

API

Import library

Data Structures

struct bitmap_buff_info_t
Bitmap data setting struct. More...
struct encode_options_t
Encode option setting. More...

Public Types

enum jpeg_conv_error_t {
JPEG_CONV_OK = 0, JPEG_CONV_JCU_ERR = -1, JPEG_CONV_FORMA_ERR = -2, JPEG_CONV_PARAM_ERR = -3,
JPEG_CONV_BUSY = -4, JPEG_CONV_PARAM_RANGE_ERR = -7
}

Error codes.

More...
enum wr_rd_swa_t {
WR_RD_WRSWA_NON = 0, WR_RD_WRSWA_8BIT = 1, WR_RD_WRSWA_16BIT = 2, WR_RD_WRSWA_16_8BIT = 3,
WR_RD_WRSWA_32BIT = 4, WR_RD_WRSWA_32_8BIT = 5, WR_RD_WRSWA_32_16BIT = 6, WR_RD_WRSWA_32_16_8BIT = 7
}

Write/Read image pixcel frame buffer swap setting.

More...
enum wr_rd_format_t { WR_RD_YCbCr422 = 0x00, WR_RD_ARGB8888 = 0x01, WR_RD_RGB565 = 0x02 }

Write/Read image pixcel format selects.

More...
enum sub_sampling_t { SUB_SAMPLING_1_1 = 0x00, SUB_SAMPLING_1_2 = 0x01, SUB_SAMPLING_1_4 = 0x02, SUB_SAMPLING_1_8 = 0x03 }

Thinning output image selects.

More...
enum cbcr_offset_t { CBCR_OFFSET_0 = 0x00, CBCR_OFFSET_128 = 0x01 }

Cb/Cr range selects for decode.

More...

Public Member Functions

JPEG_Converter ()
Constructor method of JPEG converter(encode/decode)
virtual ~JPEG_Converter ()
Destructor method of JPEG converter(encode/decode)
JPEG_Converter::jpeg_conv_error_t decode (void *pJpegBuff, bitmap_buff_info_t *psOutputBuff)
Decode JPEG to rinear data.
JPEG_Converter::jpeg_conv_error_t decode (void *pJpegBuff, bitmap_buff_info_t *psOutputBuff, decode_options_t *pOptions)
JPEG data decode to bitmap.
JPEG_Converter::jpeg_conv_error_t encode ( bitmap_buff_info_t *psInputBuff, void *pJpegBuff, size_t *pEncodeSize)
Encode rinear data to JPEG.
JPEG_Converter::jpeg_conv_error_t encode ( bitmap_buff_info_t *psInputBuff, void *pJpegBuff, size_t *pEncodeSize, encode_options_t *pOptions)
Bitmap data encode to JPEG.
JPEG_Converter::jpeg_conv_error_t SetQuality (const uint8_t qual)
Set encode quality.

Correspondence file

A correspondence file of JPEG Converter is as the following table.

JPEGCorrespondence
Width>0(greater than 0)
Height>0(greater than 0)
Color formatYCbCr444, YCbCr422, YCbCr420, YCbCr411
BitmapCorrespondence
Width>0(greater than 0)
Height>0(greater than 0)
Color formatYCbCr422

Notice

You run JPEG converter once destruction each time.

You set whether these JPEG files aren't input, or it check error setting decode(set in "flag" = true). The JPEG file which becomes correspondence outside will be the following condition.

  • File besides the above-mentioned correspondence file.
  • As information in the JPEG file, WIDTH or HEIGHT is larger than output buffer setting.

Buffer area is used encode/decode, set 8 bytes align and non-cash memory area. The output buffer when decoding, is made beyond the size decided in the size of the JPEG file, the format, setting of thinning out. You make output buffer for decode/encode to enough big size in order to stock this result. JPEG Converter, if you do not particularly perform specified, does not check size against the output data at the time of encoding and decoding. You set the output buffer so that there is no effect of corruption by the output data.

Color format

Color format in case to be converted from Bitmap to JPEG is either ARGB8888 or RGB555, YCbCr422. Color format of the If you want to convert from JPEG file to Bitmap file is YCbCr422. You correct "alpha(member of decode_options_t)" of setting and "output_cb_cr_offset(member of decode_options_t)" according to color format when decoding.

  • example
    decode to ARGB8888(WR_RD_ARGB8888 set in format member of bitmap_buff_info_t)
    alpha = 0x01-0xFF
    output_cb_cr_offset = CBCR_OFFSET_0

    decode to YCbCr422(WR_RD_YCbCr422 set in format member of bitmap_buff_info_t)
    alpha = 0
    output_cb_cr_offset = CBCR_OFFSET_0 or CBCR_OFFSET_128

    decode to RGB565(WR_RD_RGB565 set in format member of bitmap_buff_info_t)
    alpha = 0
    output_cb_cr_offset = CBCR_OFFSET_0

Decode/encode settings are optional

If omitted encode/decode settings, it will work with the following settings.
[Decode option setting (member of decode_options_t)]

  • Vertical sub sampling is thinning output image to 1/1.
  • Horizontal sub sampling is thinning output image to 1/1.
  • Output data of Cb/Cr range is -128 to 127.
  • Output data of swap in 8-bit units: 2-1-4-3-6-5-8-7.
  • Alpha value of 0.
  • JPEG format correspondence outside error check.
  • It decode in a synchronous function.

[Encode option setting (member of encode_options_t)]

  • DRI value is 0.
  • Encoding JPEG file start width offset is 0.
  • Encoding JPEG file start height offset is 0.
  • Input data of Cb/Cr range of input data is -128 to 127.
  • Input data swap in 8-bit units: 2-1-4-3-6-5-8-7.
  • It don't check encode size.
  • Quantization Y use default table(Quality75).
  • Quantization C use default table(Quality75).
  • Huffman Y DC use default table.
  • Huffman C DC use default table.
  • Huffman Y AC use default table.
  • Huffman C AC use default table.
  • It encode in a synchronous function.

Synchronous/asynchronous switching

Decoding and encoding setting to operate asynchronously by setting a callback function(decode_options_t and encode_options_t).

Quality

Quality changes are possible. If you want to change the Quality, please specify the table made of Quality you want to change the address of the setting. If you do not want to change the Quality, it will operate at Quality75.

RGA

The RGA library implements fast drawing functionality which uses the RGA of the RZ/A Series.
Supporting compiler is ARMCC, GCC ARM and IAR.

Hello World!

Import programRGA_HelloWorld

Hello World for RGA(Renesas Graphics Architecture). RGA is the Graphics Library of RZ/A1. When you use this program, we judge you have agreed to the following contents. https://developer.mbed.org/teams/Renesas/wiki/About-LICENSE

Committer:
1050186
Date:
Wed Jan 20 02:35:17 2016 +0000
Revision:
3:9f857750e4e9
Add RGA library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
1050186 3:9f857750e4e9 1 /*******************************************************************************
1050186 3:9f857750e4e9 2 * DISCLAIMER
1050186 3:9f857750e4e9 3 * This software is supplied by Renesas Electronics Corporation and is only
1050186 3:9f857750e4e9 4 * intended for use with Renesas products. No other uses are authorized. This
1050186 3:9f857750e4e9 5 * software is owned by Renesas Electronics Corporation and is protected under
1050186 3:9f857750e4e9 6 * all applicable laws, including copyright laws.
1050186 3:9f857750e4e9 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
1050186 3:9f857750e4e9 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
1050186 3:9f857750e4e9 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
1050186 3:9f857750e4e9 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
1050186 3:9f857750e4e9 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
1050186 3:9f857750e4e9 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
1050186 3:9f857750e4e9 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
1050186 3:9f857750e4e9 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
1050186 3:9f857750e4e9 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
1050186 3:9f857750e4e9 16 * Renesas reserves the right, without notice, to make changes to this software
1050186 3:9f857750e4e9 17 * and to discontinue the availability of this software. By using this software,
1050186 3:9f857750e4e9 18 * you agree to the additional terms and conditions found by accessing the
1050186 3:9f857750e4e9 19 * following link:
1050186 3:9f857750e4e9 20 * http://www.renesas.com/disclaimer
1050186 3:9f857750e4e9 21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
1050186 3:9f857750e4e9 22 *******************************************************************************/
1050186 3:9f857750e4e9 23 /**
1050186 3:9f857750e4e9 24 * @file vsync_pl.c
1050186 3:9f857750e4e9 25 * @brief $Module: CLibCommon $ $PublicVersion: 1.00 $ (=CLIB_VERSION)
1050186 3:9f857750e4e9 26 * $Rev: 44 $
1050186 3:9f857750e4e9 27 * $Date:: 2013-12-20 11:20:00 +0900#$
1050186 3:9f857750e4e9 28 */
1050186 3:9f857750e4e9 29
1050186 3:9f857750e4e9 30
1050186 3:9f857750e4e9 31 /******************************************************************************
1050186 3:9f857750e4e9 32 Includes <System Includes> , "Project Includes"
1050186 3:9f857750e4e9 33 *******************************************************************************/
1050186 3:9f857750e4e9 34 #include "r_ospl.h"
1050186 3:9f857750e4e9 35 #include "r_vdc5.h"
1050186 3:9f857750e4e9 36 #include "vsync.h"
1050186 3:9f857750e4e9 37 #include "vsync_pl.h"
1050186 3:9f857750e4e9 38
1050186 3:9f857750e4e9 39 #if ! R_OSPL_IS_PREEMPTION
1050186 3:9f857750e4e9 40 #include "dev_drv.h"
1050186 3:9f857750e4e9 41 #endif
1050186 3:9f857750e4e9 42
1050186 3:9f857750e4e9 43 /******************************************************************************
1050186 3:9f857750e4e9 44 Typedef definitions
1050186 3:9f857750e4e9 45 ******************************************************************************/
1050186 3:9f857750e4e9 46
1050186 3:9f857750e4e9 47 typedef void (* gs_rtx_interrupt_t )(void); /* RTX */
1050186 3:9f857750e4e9 48 typedef void (* gs_cint_interrupt_t )( uint32_t int_sense ); /* OS less INTC */
1050186 3:9f857750e4e9 49 typedef void (* gs_vdc_interrupt_t )( vdc5_int_type_t int_type );
1050186 3:9f857750e4e9 50
1050186 3:9f857750e4e9 51 typedef struct st_r_v_sync_pl_channel_t r_v_sync_pl_channel_t;
1050186 3:9f857750e4e9 52 struct st_r_v_sync_pl_channel_t {
1050186 3:9f857750e4e9 53 const r_ospl_caller_t *InterruptCallbackCaller;
1050186 3:9f857750e4e9 54 bool_t IsVDC5_Callback;
1050186 3:9f857750e4e9 55 };
1050186 3:9f857750e4e9 56
1050186 3:9f857750e4e9 57 static r_v_sync_pl_channel_t gs_v_sync_pl_channel[ R_V_SYNC_CHANNEL_COUNT ];
1050186 3:9f857750e4e9 58
1050186 3:9f857750e4e9 59
1050186 3:9f857750e4e9 60 /******************************************************************************
1050186 3:9f857750e4e9 61 Macro definitions
1050186 3:9f857750e4e9 62 ******************************************************************************/
1050186 3:9f857750e4e9 63
1050186 3:9f857750e4e9 64 /**
1050186 3:9f857750e4e9 65 * @def GS_VSYNC_INTERRUPT_PRIORITY
1050186 3:9f857750e4e9 66 * @brief GS_VSYNC_INTERRUPT_PRIORITY
1050186 3:9f857750e4e9 67 * @par Parameters
1050186 3:9f857750e4e9 68 * None
1050186 3:9f857750e4e9 69 * @return None.
1050186 3:9f857750e4e9 70 */
1050186 3:9f857750e4e9 71 enum { GS_VSYNC_INTERRUPT_PRIORITY = 7 };
1050186 3:9f857750e4e9 72
1050186 3:9f857750e4e9 73
1050186 3:9f857750e4e9 74 /**
1050186 3:9f857750e4e9 75 * @def GS_INTERRUPT_FUNCTION_TYPE
1050186 3:9f857750e4e9 76 * @brief GS_INTERRUPT_FUNCTION_TYPE
1050186 3:9f857750e4e9 77 * @par Parameters
1050186 3:9f857750e4e9 78 * None
1050186 3:9f857750e4e9 79 * @return None.
1050186 3:9f857750e4e9 80 *
1050186 3:9f857750e4e9 81 * - 0 : RTX
1050186 3:9f857750e4e9 82 * - 1 : INTC
1050186 3:9f857750e4e9 83 */
1050186 3:9f857750e4e9 84 #if R_OSPL_IS_PREEMPTION
1050186 3:9f857750e4e9 85 #define GS_INTERRUPT_FUNCTION_TYPE 0
1050186 3:9f857750e4e9 86 #else
1050186 3:9f857750e4e9 87 #define GS_INTERRUPT_FUNCTION_TYPE 1
1050186 3:9f857750e4e9 88 #endif
1050186 3:9f857750e4e9 89
1050186 3:9f857750e4e9 90
1050186 3:9f857750e4e9 91 /**
1050186 3:9f857750e4e9 92 * @typedef gs_interrupt_t
1050186 3:9f857750e4e9 93 * @brief Interrupt callback function type
1050186 3:9f857750e4e9 94 */
1050186 3:9f857750e4e9 95 #if GS_INTERRUPT_FUNCTION_TYPE == 0
1050186 3:9f857750e4e9 96 #define gs_interrupt_t gs_rtx_interrupt_t
1050186 3:9f857750e4e9 97 #else
1050186 3:9f857750e4e9 98 #define gs_interrupt_t gs_cint_interrupt_t
1050186 3:9f857750e4e9 99 #endif
1050186 3:9f857750e4e9 100
1050186 3:9f857750e4e9 101
1050186 3:9f857750e4e9 102 /******************************************************************************
1050186 3:9f857750e4e9 103 Imported global variables and functions (from other files)
1050186 3:9f857750e4e9 104 ******************************************************************************/
1050186 3:9f857750e4e9 105
1050186 3:9f857750e4e9 106 /******************************************************************************
1050186 3:9f857750e4e9 107 Exported global variables and functions (to be accessed by other files)
1050186 3:9f857750e4e9 108 ******************************************************************************/
1050186 3:9f857750e4e9 109
1050186 3:9f857750e4e9 110 /******************************************************************************
1050186 3:9f857750e4e9 111 Private global variables and functions
1050186 3:9f857750e4e9 112 ******************************************************************************/
1050186 3:9f857750e4e9 113 static void R_V_SYNC_IRQ_HandlerN( int_fast32_t const ChannelNum );
1050186 3:9f857750e4e9 114 static void R_V_SYNC_IRQ_Handler0( vdc5_int_type_t const int_type );
1050186 3:9f857750e4e9 115 static void R_V_SYNC_IRQ_Handler1( vdc5_int_type_t const int_type );
1050186 3:9f857750e4e9 116 #if GS_INTERRUPT_FUNCTION_TYPE != 1
1050186 3:9f857750e4e9 117 static gs_cint_interrupt_t gs_cint_vdc5_interrupt_handler[2];
1050186 3:9f857750e4e9 118 static void R_V_SYNC_IRQ_HandlerRoot0(void);
1050186 3:9f857750e4e9 119 static void R_V_SYNC_IRQ_HandlerRoot1(void);
1050186 3:9f857750e4e9 120 #endif
1050186 3:9f857750e4e9 121
1050186 3:9f857750e4e9 122
1050186 3:9f857750e4e9 123 /** Table of interrupt line to channel number */
1050186 3:9f857750e4e9 124 static const r_ospl_interrupt_t gs_array_of_i_context[ R_V_SYNC_CHANNEL_COUNT ] = {
1050186 3:9f857750e4e9 125 { BSP_INT_SRC_GR3_VLINE0, 0 },
1050186 3:9f857750e4e9 126 { BSP_INT_SRC_GR3_VLINE1, 1 }
1050186 3:9f857750e4e9 127 };
1050186 3:9f857750e4e9 128
1050186 3:9f857750e4e9 129
1050186 3:9f857750e4e9 130 /***********************************************************************
1050186 3:9f857750e4e9 131 * Implement: R_V_SYNC_SetDefaultAsync
1050186 3:9f857750e4e9 132 ************************************************************************/
1050186 3:9f857750e4e9 133 void R_V_SYNC_SetDefaultAsync( r_ospl_async_t *const Async, r_ospl_async_type_t AsyncType )
1050186 3:9f857750e4e9 134 {
1050186 3:9f857750e4e9 135 R_UNREFERENCED_VARIABLE( AsyncType );
1050186 3:9f857750e4e9 136
1050186 3:9f857750e4e9 137 IF_DQ( Async == NULL ) {
1050186 3:9f857750e4e9 138 goto fin;
1050186 3:9f857750e4e9 139 }
1050186 3:9f857750e4e9 140
1050186 3:9f857750e4e9 141 if ( IS_BIT_NOT_SET( Async->Flags, R_F_OSPL_A_Thread ) ) {
1050186 3:9f857750e4e9 142 Async->A_Thread = NULL;
1050186 3:9f857750e4e9 143 }
1050186 3:9f857750e4e9 144
1050186 3:9f857750e4e9 145 if ( IS_BIT_NOT_SET( Async->Flags, R_F_OSPL_A_EventValue ) ) {
1050186 3:9f857750e4e9 146 Async->A_EventValue = R_OSPL_A_FLAG;
1050186 3:9f857750e4e9 147 }
1050186 3:9f857750e4e9 148
1050186 3:9f857750e4e9 149 if ( IS_BIT_NOT_SET( Async->Flags, R_F_OSPL_I_Thread ) ) {
1050186 3:9f857750e4e9 150 Async->I_Thread = NULL;
1050186 3:9f857750e4e9 151 }
1050186 3:9f857750e4e9 152
1050186 3:9f857750e4e9 153 if ( IS_BIT_NOT_SET( Async->Flags, R_F_OSPL_I_EventValue ) ) {
1050186 3:9f857750e4e9 154 Async->I_EventValue = R_OSPL_I_FLAG;
1050186 3:9f857750e4e9 155 }
1050186 3:9f857750e4e9 156
1050186 3:9f857750e4e9 157 if ( IS_BIT_NOT_SET( Async->Flags, R_F_OSPL_InterruptCallback ) ) {
1050186 3:9f857750e4e9 158 Async->InterruptCallback = (r_ospl_callback_t)&( R_V_SYNC_OnInterruptDefault );
1050186 3:9f857750e4e9 159 }
1050186 3:9f857750e4e9 160 /* MISRA 16.9 */
1050186 3:9f857750e4e9 161
1050186 3:9f857750e4e9 162 Async->Flags = R_F_OSPL_A_Thread | R_F_OSPL_A_EventValue |
1050186 3:9f857750e4e9 163 R_F_OSPL_I_Thread | R_F_OSPL_I_EventValue |
1050186 3:9f857750e4e9 164 R_F_OSPL_InterruptCallback | R_F_OSPL_Delegate;
1050186 3:9f857750e4e9 165
1050186 3:9f857750e4e9 166 fin:
1050186 3:9f857750e4e9 167 return;
1050186 3:9f857750e4e9 168 }
1050186 3:9f857750e4e9 169
1050186 3:9f857750e4e9 170
1050186 3:9f857750e4e9 171 /***********************************************************************
1050186 3:9f857750e4e9 172 * Implement: R_V_SYNC_OnInitialize
1050186 3:9f857750e4e9 173 ************************************************************************/
1050186 3:9f857750e4e9 174 errnum_t R_V_SYNC_OnInitialize( int_fast32_t const ChannelNum )
1050186 3:9f857750e4e9 175 {
1050186 3:9f857750e4e9 176 #if GS_INTERRUPT_FUNCTION_TYPE == 1
1050186 3:9f857750e4e9 177 bsp_int_cb_t handler;
1050186 3:9f857750e4e9 178 #endif
1050186 3:9f857750e4e9 179 errnum_t e;
1050186 3:9f857750e4e9 180 vdc5_error_t er;
1050186 3:9f857750e4e9 181 bsp_int_err_t eb;
1050186 3:9f857750e4e9 182 bsp_int_src_t int_id;
1050186 3:9f857750e4e9 183 vdc5_int_t interrupt;
1050186 3:9f857750e4e9 184 r_v_sync_pl_channel_t *const self = &gs_v_sync_pl_channel[ ChannelNum ];
1050186 3:9f857750e4e9 185 const r_ospl_interrupt_t *const i_context = &gs_array_of_i_context[ ChannelNum ];
1050186 3:9f857750e4e9 186
1050186 3:9f857750e4e9 187 /*[gs_IRQHandlers]*/
1050186 3:9f857750e4e9 188 static const gs_vdc_interrupt_t gs_IRQHandlers[ R_V_SYNC_CHANNEL_COUNT ] = {
1050186 3:9f857750e4e9 189 &( R_V_SYNC_IRQ_Handler0 ), /* MISRA 16.9 */
1050186 3:9f857750e4e9 190 &( R_V_SYNC_IRQ_Handler1 )
1050186 3:9f857750e4e9 191 };
1050186 3:9f857750e4e9 192
1050186 3:9f857750e4e9 193 #if GS_INTERRUPT_FUNCTION_TYPE != 1
1050186 3:9f857750e4e9 194 /*[gs_IRQHandlerRoots]*/
1050186 3:9f857750e4e9 195 static const gs_interrupt_t gs_IRQHandlerRoots[ R_V_SYNC_CHANNEL_COUNT ] = {
1050186 3:9f857750e4e9 196 &( R_V_SYNC_IRQ_HandlerRoot0 ), /* MISRA 16.9 */
1050186 3:9f857750e4e9 197 &( R_V_SYNC_IRQ_HandlerRoot1 )
1050186 3:9f857750e4e9 198 };
1050186 3:9f857750e4e9 199 #endif
1050186 3:9f857750e4e9 200
1050186 3:9f857750e4e9 201
1050186 3:9f857750e4e9 202 IF ( (ChannelNum < 0) || (ChannelNum >= R_V_SYNC_CHANNEL_COUNT) ) {
1050186 3:9f857750e4e9 203 e=E_OTHERS;
1050186 3:9f857750e4e9 204 goto fin;
1050186 3:9f857750e4e9 205 }
1050186 3:9f857750e4e9 206
1050186 3:9f857750e4e9 207 self->InterruptCallbackCaller = NULL;
1050186 3:9f857750e4e9 208
1050186 3:9f857750e4e9 209 int_id = i_context->IRQ_Num;
1050186 3:9f857750e4e9 210 #if GS_INTERRUPT_FUNCTION_TYPE == 1
1050186 3:9f857750e4e9 211 handler = R_VDC5_GetISR( (vdc5_channel_t) ChannelNum, VDC5_INT_TYPE_VLINE );
1050186 3:9f857750e4e9 212 eb= R_BSP_InterruptWrite( int_id, handler );
1050186 3:9f857750e4e9 213 #else
1050186 3:9f857750e4e9 214 gs_cint_vdc5_interrupt_handler[ChannelNum] = R_VDC5_GetISR(
1050186 3:9f857750e4e9 215 (vdc5_channel_t) ChannelNum, VDC5_INT_TYPE_VLINE );
1050186 3:9f857750e4e9 216 eb= R_BSP_InterruptWrite( int_id, gs_IRQHandlerRoots[ChannelNum] );
1050186 3:9f857750e4e9 217 #endif
1050186 3:9f857750e4e9 218 IF ( eb != BSP_INT_SUCCESS ) {
1050186 3:9f857750e4e9 219 e=E_OTHERS;
1050186 3:9f857750e4e9 220 goto fin;
1050186 3:9f857750e4e9 221 }
1050186 3:9f857750e4e9 222
1050186 3:9f857750e4e9 223 e= R_OSPL_SetInterruptPriority( int_id, GS_VSYNC_INTERRUPT_PRIORITY );
1050186 3:9f857750e4e9 224 IF ( e != 0 ) {
1050186 3:9f857750e4e9 225 goto fin;
1050186 3:9f857750e4e9 226 }
1050186 3:9f857750e4e9 227
1050186 3:9f857750e4e9 228 interrupt.type = VDC5_INT_TYPE_VLINE;
1050186 3:9f857750e4e9 229 interrupt.callback = gs_IRQHandlers[ ChannelNum ];
1050186 3:9f857750e4e9 230 interrupt.line_num = (uint16_t) 0;
1050186 3:9f857750e4e9 231
1050186 3:9f857750e4e9 232 er = R_VDC5_CallbackISR( (vdc5_channel_t) ChannelNum, &interrupt );
1050186 3:9f857750e4e9 233 IF ( er != VDC5_OK ) {
1050186 3:9f857750e4e9 234 e=E_OTHERS;
1050186 3:9f857750e4e9 235 goto fin;
1050186 3:9f857750e4e9 236 }
1050186 3:9f857750e4e9 237
1050186 3:9f857750e4e9 238 self->IsVDC5_Callback = true;
1050186 3:9f857750e4e9 239
1050186 3:9f857750e4e9 240 e=0;
1050186 3:9f857750e4e9 241 fin:
1050186 3:9f857750e4e9 242 return e;
1050186 3:9f857750e4e9 243 }
1050186 3:9f857750e4e9 244
1050186 3:9f857750e4e9 245
1050186 3:9f857750e4e9 246 /***********************************************************************
1050186 3:9f857750e4e9 247 * Implement: R_V_SYNC_OnFinalize
1050186 3:9f857750e4e9 248 ************************************************************************/
1050186 3:9f857750e4e9 249 errnum_t R_V_SYNC_OnFinalize( int_fast32_t const ChannelNum, errnum_t e )
1050186 3:9f857750e4e9 250 {
1050186 3:9f857750e4e9 251 r_v_sync_pl_channel_t *const self = &gs_v_sync_pl_channel[ ChannelNum ];
1050186 3:9f857750e4e9 252
1050186 3:9f857750e4e9 253 if ( (ChannelNum >= 0) && (ChannelNum < R_V_SYNC_CHANNEL_COUNT) ) {
1050186 3:9f857750e4e9 254 if ( IS( self->IsVDC5_Callback ) ) {
1050186 3:9f857750e4e9 255 vdc5_error_t er;
1050186 3:9f857750e4e9 256 vdc5_int_t interrupt;
1050186 3:9f857750e4e9 257
1050186 3:9f857750e4e9 258 interrupt.type = VDC5_INT_TYPE_VLINE;
1050186 3:9f857750e4e9 259 interrupt.callback = NULL;
1050186 3:9f857750e4e9 260 interrupt.line_num = (uint16_t) 0;
1050186 3:9f857750e4e9 261
1050186 3:9f857750e4e9 262 er = R_VDC5_CallbackISR( (vdc5_channel_t) ChannelNum, &interrupt );
1050186 3:9f857750e4e9 263 IF ( (er != VDC5_OK) && (e == 0) ) {
1050186 3:9f857750e4e9 264 e=E_OTHERS;
1050186 3:9f857750e4e9 265 }
1050186 3:9f857750e4e9 266
1050186 3:9f857750e4e9 267 self->IsVDC5_Callback = false;
1050186 3:9f857750e4e9 268 }
1050186 3:9f857750e4e9 269 }
1050186 3:9f857750e4e9 270
1050186 3:9f857750e4e9 271 return e;
1050186 3:9f857750e4e9 272 }
1050186 3:9f857750e4e9 273
1050186 3:9f857750e4e9 274
1050186 3:9f857750e4e9 275 /***********************************************************************
1050186 3:9f857750e4e9 276 * Implement: R_V_SYNC_SetInterruptCallbackCaller
1050186 3:9f857750e4e9 277 ************************************************************************/
1050186 3:9f857750e4e9 278 errnum_t R_V_SYNC_SetInterruptCallbackCaller( int_fast32_t const ChannelNum,
1050186 3:9f857750e4e9 279 const r_ospl_caller_t *const Caller )
1050186 3:9f857750e4e9 280 {
1050186 3:9f857750e4e9 281 r_v_sync_pl_channel_t *const self = &gs_v_sync_pl_channel[ ChannelNum ];
1050186 3:9f857750e4e9 282
1050186 3:9f857750e4e9 283 self->InterruptCallbackCaller = Caller;
1050186 3:9f857750e4e9 284
1050186 3:9f857750e4e9 285 return 0;
1050186 3:9f857750e4e9 286 }
1050186 3:9f857750e4e9 287
1050186 3:9f857750e4e9 288
1050186 3:9f857750e4e9 289 /***********************************************************************
1050186 3:9f857750e4e9 290 * Implement: R_V_SYNC_OnEnableInterrupt
1050186 3:9f857750e4e9 291 ************************************************************************/
1050186 3:9f857750e4e9 292 void R_V_SYNC_OnEnableInterrupt( int_fast32_t const ChannelNum,
1050186 3:9f857750e4e9 293 r_v_sync_interrupt_lines_t const Enables )
1050186 3:9f857750e4e9 294 {
1050186 3:9f857750e4e9 295 bsp_int_err_t eb;
1050186 3:9f857750e4e9 296
1050186 3:9f857750e4e9 297 if ( IS_BIT_SET( Enables, R_V_SYNC_INTERRUPT_LINE_V_LINE ) ) {
1050186 3:9f857750e4e9 298 bsp_int_src_t const num_of_IRQ = gs_array_of_i_context[ ChannelNum ].IRQ_Num;
1050186 3:9f857750e4e9 299
1050186 3:9f857750e4e9 300 eb= R_BSP_InterruptControl( num_of_IRQ, BSP_INT_CMD_INTERRUPT_ENABLE, FIT_NO_PTR );
1050186 3:9f857750e4e9 301 ASSERT_D( eb == 0, R_NOOP() );
1050186 3:9f857750e4e9 302 R_UNREFERENCED_VARIABLE( eb ); /* for Release configuration */
1050186 3:9f857750e4e9 303 }
1050186 3:9f857750e4e9 304 }
1050186 3:9f857750e4e9 305
1050186 3:9f857750e4e9 306
1050186 3:9f857750e4e9 307 /***********************************************************************
1050186 3:9f857750e4e9 308 * Implement: R_V_SYNC_OnDisableInterrupt
1050186 3:9f857750e4e9 309 ************************************************************************/
1050186 3:9f857750e4e9 310 void R_V_SYNC_OnDisableInterrupt( int_fast32_t const ChannelNum,
1050186 3:9f857750e4e9 311 r_v_sync_interrupt_lines_t const Disables1 )
1050186 3:9f857750e4e9 312 {
1050186 3:9f857750e4e9 313 bsp_int_err_t eb;
1050186 3:9f857750e4e9 314
1050186 3:9f857750e4e9 315 if ( IS_BIT_SET( Disables1, R_V_SYNC_INTERRUPT_LINE_V_LINE ) ) {
1050186 3:9f857750e4e9 316 bsp_int_src_t const num_of_IRQ = gs_array_of_i_context[ ChannelNum ].IRQ_Num;
1050186 3:9f857750e4e9 317
1050186 3:9f857750e4e9 318 eb= R_BSP_InterruptControl( num_of_IRQ, BSP_INT_CMD_INTERRUPT_DISABLE, FIT_NO_PTR );
1050186 3:9f857750e4e9 319 ASSERT_D( eb == 0, R_NOOP() );
1050186 3:9f857750e4e9 320 R_UNREFERENCED_VARIABLE( eb ); /* for Release configuration */
1050186 3:9f857750e4e9 321 }
1050186 3:9f857750e4e9 322 }
1050186 3:9f857750e4e9 323
1050186 3:9f857750e4e9 324
1050186 3:9f857750e4e9 325 /***********************************************************************
1050186 3:9f857750e4e9 326 * Implement: R_V_SYNC_OnInterruptDefault
1050186 3:9f857750e4e9 327 ************************************************************************/
1050186 3:9f857750e4e9 328 errnum_t R_V_SYNC_OnInterruptDefault( const r_ospl_interrupt_t *const InterruptSource,
1050186 3:9f857750e4e9 329 const r_ospl_caller_t *const Caller )
1050186 3:9f857750e4e9 330 {
1050186 3:9f857750e4e9 331 R_UNREFERENCED_VARIABLE( Caller );
1050186 3:9f857750e4e9 332
1050186 3:9f857750e4e9 333 return R_V_SYNC_OnInterrupting( InterruptSource );
1050186 3:9f857750e4e9 334 }
1050186 3:9f857750e4e9 335
1050186 3:9f857750e4e9 336
1050186 3:9f857750e4e9 337 /**
1050186 3:9f857750e4e9 338 * @brief Interrupt service routine for all channels
1050186 3:9f857750e4e9 339 *
1050186 3:9f857750e4e9 340 * @param ChannelNum ChannelNum
1050186 3:9f857750e4e9 341 * @return None
1050186 3:9f857750e4e9 342 */
1050186 3:9f857750e4e9 343 static void R_V_SYNC_IRQ_HandlerN( int_fast32_t const ChannelNum )
1050186 3:9f857750e4e9 344 {
1050186 3:9f857750e4e9 345 r_v_sync_pl_channel_t *const self = &gs_v_sync_pl_channel[ ChannelNum ];
1050186 3:9f857750e4e9 346 const r_ospl_interrupt_t *const i_context = &gs_array_of_i_context[ ChannelNum ];
1050186 3:9f857750e4e9 347
1050186 3:9f857750e4e9 348 /* V-Sync interrupt always be enabled. Because clear interrupt status */
1050186 3:9f857750e4e9 349
1050186 3:9f857750e4e9 350 if ( self->InterruptCallbackCaller != NULL ) {
1050186 3:9f857750e4e9 351 R_OSPL_CallInterruptCallback( self->InterruptCallbackCaller, i_context );
1050186 3:9f857750e4e9 352 }
1050186 3:9f857750e4e9 353 }
1050186 3:9f857750e4e9 354
1050186 3:9f857750e4e9 355
1050186 3:9f857750e4e9 356 /**
1050186 3:9f857750e4e9 357 * @brief Interrupt service routine for INTC channel 0
1050186 3:9f857750e4e9 358 *
1050186 3:9f857750e4e9 359 * @param int_type ignored
1050186 3:9f857750e4e9 360 * @return None
1050186 3:9f857750e4e9 361 */
1050186 3:9f857750e4e9 362 static void R_V_SYNC_IRQ_Handler0( vdc5_int_type_t const int_type )
1050186 3:9f857750e4e9 363 {
1050186 3:9f857750e4e9 364 R_UNREFERENCED_VARIABLE( int_type );
1050186 3:9f857750e4e9 365 R_V_SYNC_IRQ_HandlerN( 0 );
1050186 3:9f857750e4e9 366 }
1050186 3:9f857750e4e9 367
1050186 3:9f857750e4e9 368
1050186 3:9f857750e4e9 369 /**
1050186 3:9f857750e4e9 370 * @brief Interrupt service routine for INTC channel 1
1050186 3:9f857750e4e9 371 *
1050186 3:9f857750e4e9 372 * @param int_type ignored
1050186 3:9f857750e4e9 373 * @return None
1050186 3:9f857750e4e9 374 */
1050186 3:9f857750e4e9 375 static void R_V_SYNC_IRQ_Handler1( vdc5_int_type_t const int_type )
1050186 3:9f857750e4e9 376 {
1050186 3:9f857750e4e9 377 R_UNREFERENCED_VARIABLE( int_type );
1050186 3:9f857750e4e9 378 R_V_SYNC_IRQ_HandlerN( 1 );
1050186 3:9f857750e4e9 379 }
1050186 3:9f857750e4e9 380
1050186 3:9f857750e4e9 381
1050186 3:9f857750e4e9 382 /**
1050186 3:9f857750e4e9 383 * @brief Interrupt service routine for RTX channel 0
1050186 3:9f857750e4e9 384 *
1050186 3:9f857750e4e9 385 * @par Parameters
1050186 3:9f857750e4e9 386 * None
1050186 3:9f857750e4e9 387 * @return None
1050186 3:9f857750e4e9 388 */
1050186 3:9f857750e4e9 389 #if GS_INTERRUPT_FUNCTION_TYPE != 1
1050186 3:9f857750e4e9 390 static void R_V_SYNC_IRQ_HandlerRoot0(void)
1050186 3:9f857750e4e9 391 {
1050186 3:9f857750e4e9 392 gs_cint_vdc5_interrupt_handler[0]( 0 );
1050186 3:9f857750e4e9 393 GIC_EndInterrupt( BSP_INT_SRC_GR3_VLINE0 );
1050186 3:9f857750e4e9 394 }
1050186 3:9f857750e4e9 395 #endif
1050186 3:9f857750e4e9 396
1050186 3:9f857750e4e9 397
1050186 3:9f857750e4e9 398 /**
1050186 3:9f857750e4e9 399 * @brief Interrupt service routine for RTX channel 1
1050186 3:9f857750e4e9 400 *
1050186 3:9f857750e4e9 401 * @par Parameters
1050186 3:9f857750e4e9 402 * None
1050186 3:9f857750e4e9 403 * @return None
1050186 3:9f857750e4e9 404 */
1050186 3:9f857750e4e9 405 #if GS_INTERRUPT_FUNCTION_TYPE != 1
1050186 3:9f857750e4e9 406 static void R_V_SYNC_IRQ_HandlerRoot1(void)
1050186 3:9f857750e4e9 407 {
1050186 3:9f857750e4e9 408 gs_cint_vdc5_interrupt_handler[1]( 0 );
1050186 3:9f857750e4e9 409 GIC_EndInterrupt( BSP_INT_SRC_GR3_VLINE0 );
1050186 3:9f857750e4e9 410 }
1050186 3:9f857750e4e9 411 #endif
1050186 3:9f857750e4e9 412