Video library for GR-PEACH
Dependents: Trace_Program2 GR-PEACH_Camera_in_barcode GR-PEACH_LCD_sample GR-PEACH_LCD_4_3inch_sample ... more
r_vdc5_check_parameter.c
00001 /******************************************************************************* 00002 * DISCLAIMER 00003 * This software is supplied by Renesas Electronics Corporation and is only 00004 * intended for use with Renesas products. No other uses are authorized. This 00005 * software is owned by Renesas Electronics Corporation and is protected under 00006 * all applicable laws, including copyright laws. 00007 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING 00008 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT 00009 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE 00010 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. 00011 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS 00012 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE 00013 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR 00014 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE 00015 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 00016 * Renesas reserves the right, without notice, to make changes to this software 00017 * and to discontinue the availability of this software. By using this software, 00018 * you agree to the additional terms and conditions found by accessing the 00019 * following link: 00020 * http://www.renesas.com/disclaimer 00021 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved. 00022 *******************************************************************************/ 00023 /**************************************************************************//** 00024 * @file r_vdc5_check_parameter.c 00025 * @version 1.00 00026 * $Rev: 199 $ 00027 * $Date:: 2014-05-23 16:33:52 +0900#$ 00028 * @brief VDC5 driver parameter check processing 00029 ******************************************************************************/ 00030 00031 /****************************************************************************** 00032 Includes <System Includes> , "Project Includes" 00033 ******************************************************************************/ 00034 #include "r_vdc5.h" 00035 #include "r_vdc5_user.h" 00036 #include "r_vdc5_shared_param.h" 00037 #include "r_vdc5_check_parameter.h" 00038 00039 00040 #ifdef R_VDC5_CHECK_PARAMETERS 00041 /****************************************************************************** 00042 Macro definitions 00043 ******************************************************************************/ 00044 /* Valid bit range */ 00045 #define VDC5_CPARA_RANGE_0X00000001 (0x00000001u) 00046 #define VDC5_CPARA_RANGE_0X00000003 (0x00000003u) 00047 #define VDC5_CPARA_RANGE_0X00000007 (0x00000007u) 00048 #define VDC5_CPARA_RANGE_0X0000000F (0x0000000Fu) 00049 #define VDC5_CPARA_RANGE_0X0000001F (0x0000001Fu) 00050 #define VDC5_CPARA_RANGE_0X0000003F (0x0000003Fu) 00051 #define VDC5_CPARA_RANGE_0X0000007F (0x0000007Fu) 00052 #define VDC5_CPARA_RANGE_0X000000FF (0x000000FFu) 00053 #define VDC5_CPARA_RANGE_0X000003FF (0x000003FFu) 00054 #define VDC5_CPARA_RANGE_0X000007FF (0x000007FFu) 00055 #define VDC5_CPARA_RANGE_0X00007FFF (0x00007FFFu) 00056 #define VDC5_CPARA_RANGE_0X0000FFFF (0x0000FFFFu) 00057 #define VDC5_CPARA_RANGE_0X007FFFFF (0x007FFFFFu) 00058 #define VDC5_CPARA_RANGE_0X00FFFFFF (0x00FFFFFFu) 00059 /* Valid range for signal delay amount */ 00060 #define VDC5_CPARA_INP_FLD_DLY_MAX (254u) 00061 #define VDC5_CPARA_INP_VS_DLY_MAX (254u) 00062 #define VDC5_CPARA_INP_HS_DLY_MAX (254u) 00063 /* Valid range for NFS */ 00064 #define VDC5_CPARA_LVDSPLL_FD_LIMIT_56 (56u) 00065 #define VDC5_CPARA_LVDSPLL_FD_LIMIT_24 (24u) 00066 #define VDC5_CPARA_LVDSPLL_FD_LIMIT_28 (28u) 00067 #define VDC5_CPARA_LVDSPLL_FD_LIMIT_31 (31u) 00068 #define VDC5_CPARA_LVDSPLL_FD_LIMIT_37 (37u) 00069 #define VDC5_CPARA_LVDSPLL_FD_LIMIT_39 (39u) 00070 #define VDC5_CPARA_LVDSPLL_FD_LIMIT_46 (46u) 00071 #define VDC5_CPARA_LVDSPLL_FD_LIMIT_47 (47u) 00072 #define VDC5_CPARA_LVDSPLL_FD_LIMIT_55 (55u) 00073 /* Valid range for HS + HW */ 00074 #define VDC5_CPARA_HS_HW_MAX (2015u) 00075 /* Valid range for HS */ 00076 #define VDC5_CPARA_HS_MIN (16u) 00077 /* Valid range for VS + VW */ 00078 #define VDC5_CPARA_VS_VW_MAX (2039u) 00079 /* Valid range for VS */ 00080 #define VDC5_CPARA_VS_MIN (4u) 00081 /* The max number of CLUT data values */ 00082 #define VDC5_CPARA_CLUT8_NUM (256u) 00083 #define VDC5_CPARA_CLUT4_NUM (16u) 00084 #define VDC5_CPARA_CLUT1_NUM (2u) 00085 /* Valid range for the alpha coefficient */ 00086 #define VDC5_CPARA_GR_ARC_COEF_MIN (-255) 00087 #define VDC5_CPARA_GR_ARC_COEF_MAX (255) 00088 /* Valid range for HS of enhancer area */ 00089 #define VDC5_CPARA_ENH_HS_LIMIT (4u) 00090 /* Valid range for VS of enhancer area */ 00091 #define VDC5_CPARA_ENH_VS_LIMIT (2u) 00092 00093 #define VDC5_BKSTR_T2_PROHIBITED (31u) 00094 00095 #define VDC5_MULTIPLE_4_MASK (0x00000003u) 00096 #define VDC5_MULTIPLE_32_MASK (0x0000001Fu) 00097 #define VDC5_MULTIPLE_128_MASK (0x0000007Fu) 00098 00099 00100 /****************************************************************************** 00101 Typedef definitions 00102 ******************************************************************************/ 00103 00104 /****************************************************************************** 00105 Private global variables and functions 00106 ******************************************************************************/ 00107 static vdc5_error_t CheckChannel(const vdc5_channel_t ch); 00108 static vdc5_error_t CheckLayerId(const vdc5_layer_id_t layer_id); 00109 static vdc5_error_t CheckGraphicsTypeLayerId(const vdc5_layer_id_t layer_id); 00110 static vdc5_error_t CheckRect(const vdc5_period_rect_t * const rect); 00111 static vdc5_error_t CheckTcon_Vertical(const vdc5_lcd_tcon_timing_t * const lcd_tcon_timing); 00112 static vdc5_error_t CheckTcon_Horizontal(const vdc5_lcd_tcon_timing_t * const lcd_tcon_timing); 00113 static vdc5_error_t CheckTcon_HorizontalPol(const vdc5_lcd_tcon_timing_t * const lcd_tcon_timing); 00114 static vdc5_error_t CheckTcon_DataEnable(const vdc5_lcd_tcon_timing_t * const lcd_tcon_timing); 00115 static vdc5_error_t CheckGammaCrct_GainAdjustment(const uint16_t * gam_gain); 00116 00117 00118 /**************************************************************************//** 00119 * @brief Checks on initialization parameter 00120 * @param[in] ch : Channel 00121 * @param[in] param : Initialization parameter 00122 * @retval Error code 00123 *****************************************************************************/ 00124 vdc5_error_t VDC5_InitializeCheckPrm (const vdc5_channel_t ch, const vdc5_init_t * const param) 00125 { 00126 vdc5_error_t error; 00127 const vdc5_lvds_t * lvds_tmp; 00128 vdc5_resource_state_t rsrc_state; 00129 vdc5_input_sel_t inp_sel_tmp; 00130 vdc5_channel_t lvds_vdc_sel_tmp; 00131 00132 error = CheckChannel(ch); 00133 if (error != VDC5_OK ) { 00134 goto END; 00135 } 00136 00137 if (param == NULL) { 00138 error = VDC5_ERR_PARAM_NULL ; 00139 goto END; 00140 } 00141 00142 /* Panel clock select */ 00143 if (param->panel_icksel >= VDC5_PANEL_ICKSEL_NUM ) { 00144 error = VDC5_ERR_PARAM_UNDEFINED ; 00145 goto END; 00146 } 00147 if ((param->panel_icksel != VDC5_PANEL_ICKSEL_LVDS ) && (param->panel_icksel != VDC5_PANEL_ICKSEL_LVDS_DIV7 )) { 00148 /* Clock frequency division ratio */ 00149 if (param->panel_dcdr >= VDC5_PANEL_CLKDIV_NUM ) { 00150 error = VDC5_ERR_PARAM_UNDEFINED ; 00151 goto END; 00152 } 00153 } 00154 rsrc_state = VDC5_ShrdPrmGetResource(ch, VDC5_RESOURCE_VIDEO_IN ); 00155 if (rsrc_state != VDC5_RESOURCE_ST_INVALID ) { 00156 inp_sel_tmp = VDC5_ShrdPrmGetInputSelect(ch); 00157 if (((inp_sel_tmp == VDC5_INPUT_SEL_VDEC ) && (param->panel_icksel == VDC5_PANEL_ICKSEL_IMG_DV )) || 00158 ((inp_sel_tmp == VDC5_INPUT_SEL_EXT ) && (param->panel_icksel == VDC5_PANEL_ICKSEL_IMG ))) { 00159 error = VDC5_ERR_PARAM_CONDITION ; 00160 goto END; 00161 } 00162 } 00163 00164 /* LVDS-related parameter */ 00165 lvds_tmp = param->lvds ; 00166 if (lvds_tmp == NULL) { 00167 rsrc_state = VDC5_ShrdPrmGetResource(ch, VDC5_RESOURCE_LVDS_CLK ); 00168 if (rsrc_state == VDC5_RESOURCE_ST_INVALID ) { 00169 /* The LVDS PLL clock has not been set yet. */ 00170 if ((param->panel_icksel == VDC5_PANEL_ICKSEL_LVDS ) || (param->panel_icksel == VDC5_PANEL_ICKSEL_LVDS_DIV7 )) { 00171 error = VDC5_ERR_PARAM_NULL ; 00172 goto END; 00173 } 00174 } else { 00175 if (param->panel_icksel == VDC5_PANEL_ICKSEL_LVDS_DIV7 ) { 00176 lvds_vdc_sel_tmp = VDC5_ShrdPrmGetLvdsCh(); 00177 if (ch != lvds_vdc_sel_tmp) { 00178 /* Channel mismatch error */ 00179 error = VDC5_ERR_PARAM_CONDITION ; 00180 goto END; 00181 } 00182 } 00183 } 00184 } else { 00185 /* The clock input to frequency divider 1 */ 00186 if (lvds_tmp->lvds_in_clk_sel >= VDC5_LVDS_INCLK_SEL_NUM) { 00187 error = VDC5_ERR_PARAM_UNDEFINED ; 00188 goto END; 00189 } 00190 /* The frequency dividing value (NIDIV and NODIV) for frequency divider 1 and 2 */ 00191 if ((lvds_tmp->lvds_idiv_set >= VDC5_LVDS_NDIV_NUM) || (lvds_tmp->lvds_odiv_set >= VDC5_LVDS_NDIV_NUM)) { 00192 error = VDC5_ERR_PARAM_UNDEFINED ; 00193 goto END; 00194 } 00195 /* Internal parameter setting for LVDS PLL */ 00196 if (((uint32_t)lvds_tmp->lvdspll_tst & (uint32_t)~VDC5_CPARA_RANGE_0X0000003F) != 0u) { 00197 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00198 goto END; 00199 } 00200 /* A channel in VDC5 whose data is to be output through the LVDS */ 00201 if (lvds_tmp->lvds_vdc_sel >= VDC5_CHANNEL_NUM ) { 00202 error = VDC5_ERR_PARAM_CHANNEL ; 00203 goto END; 00204 } 00205 if (param->panel_icksel != VDC5_PANEL_ICKSEL_LVDS_DIV7 ) { 00206 /* When using the clock output from the LVDS PLL as the clock for the LVDS output interface, 00207 both channel number should match. */ 00208 if (ch != lvds_tmp->lvds_vdc_sel ) { 00209 /* Channel mismatch error */ 00210 error = VDC5_ERR_PARAM_CONDITION ; 00211 goto END; 00212 } 00213 } 00214 /* The frequency dividing value (NFD) for the feedback frequency */ 00215 if (((uint32_t)lvds_tmp->lvdspll_fd & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00216 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00217 goto END; 00218 } 00219 if ((uint32_t)lvds_tmp->lvdspll_fd < (uint32_t)VDC5_CPARA_LVDSPLL_FD_LIMIT_56) { 00220 if ((uint32_t)lvds_tmp->lvdspll_fd < (uint32_t)VDC5_CPARA_LVDSPLL_FD_LIMIT_24) { 00221 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00222 goto END; 00223 } 00224 if (((uint32_t)lvds_tmp->lvdspll_fd >= (uint32_t)VDC5_CPARA_LVDSPLL_FD_LIMIT_28) && ((uint32_t)lvds_tmp->lvdspll_fd <= (uint32_t)VDC5_CPARA_LVDSPLL_FD_LIMIT_31)) { 00225 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00226 goto END; 00227 } 00228 if (((uint32_t)lvds_tmp->lvdspll_fd >= (uint32_t)VDC5_CPARA_LVDSPLL_FD_LIMIT_37) && ((uint32_t)lvds_tmp->lvdspll_fd <= (uint32_t)VDC5_CPARA_LVDSPLL_FD_LIMIT_39)) { 00229 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00230 goto END; 00231 } 00232 if (((uint32_t)lvds_tmp->lvdspll_fd == (uint32_t)VDC5_CPARA_LVDSPLL_FD_LIMIT_46) || 00233 ((uint32_t)lvds_tmp->lvdspll_fd == (uint32_t)VDC5_CPARA_LVDSPLL_FD_LIMIT_47) || 00234 ((uint32_t)lvds_tmp->lvdspll_fd == (uint32_t)VDC5_CPARA_LVDSPLL_FD_LIMIT_55)) { 00235 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00236 goto END; 00237 } 00238 } 00239 /* The frequency dividing value (NRD) for the input frequency */ 00240 if (((uint32_t)lvds_tmp->lvdspll_rd & (uint32_t)~VDC5_CPARA_RANGE_0X0000001F) != 0u) { 00241 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00242 goto END; 00243 } 00244 /* The frequency dividing value (NOD) for the output frequency */ 00245 if (lvds_tmp->lvdspll_od >= VDC5_LVDS_PLL_NOD_NUM) { 00246 error = VDC5_ERR_PARAM_UNDEFINED ; 00247 goto END; 00248 } 00249 } 00250 END: 00251 return error; 00252 } /* End of function VDC5_InitializeCheckPrm() */ 00253 00254 /**************************************************************************//** 00255 * @brief Checks on parameters in R_VDC5_Terminate 00256 * @param[in] ch : Channel 00257 * @retval Error code 00258 *****************************************************************************/ 00259 vdc5_error_t VDC5_TerminateCheckPrm (const vdc5_channel_t ch) 00260 { 00261 vdc5_error_t error; 00262 00263 error = CheckChannel(ch); 00264 if (error != VDC5_OK ) { 00265 goto END; 00266 } 00267 END: 00268 return error; 00269 } /* End of function VDC5_TerminateCheckPrm() */ 00270 00271 /**************************************************************************//** 00272 * @brief Checks on video input setup parameter 00273 * @param[in] ch : Channel 00274 * @param[in] param : Video input setup parameter 00275 * @retval Error code 00276 *****************************************************************************/ 00277 vdc5_error_t VDC5_VideoInputCheckPrm (const vdc5_channel_t ch, const vdc5_input_t * const param) 00278 { 00279 vdc5_error_t error; 00280 const vdc5_sync_delay_t * dly_tmp; 00281 const vdc5_ext_in_sig_t * ext_sig_tmp; 00282 vdc5_panel_clksel_t panel_clksel; 00283 vdc5_resource_state_t rsrc_state; 00284 00285 error = CheckChannel(ch); 00286 if (error != VDC5_OK ) { 00287 goto END; 00288 } 00289 00290 if (param == NULL) { 00291 error = VDC5_ERR_PARAM_NULL ; 00292 goto END; 00293 } 00294 00295 rsrc_state = VDC5_ShrdPrmGetResource(ch, VDC5_RESOURCE_PANEL_CLK ); 00296 if (rsrc_state != VDC5_RESOURCE_ST_INVALID ) { 00297 panel_clksel = VDC5_ShrdPrmGetPanelClkSel(ch); 00298 if (param->inp_sel == VDC5_INPUT_SEL_VDEC ) { 00299 /* Video decoder output signals */ 00300 if (panel_clksel == VDC5_PANEL_ICKSEL_IMG_DV ) { 00301 /* Video image clock, DV_CLK */ 00302 error = VDC5_ERR_PARAM_CONDITION ; 00303 goto END; 00304 } 00305 } else { 00306 /* Signals supplied via the external input pins */ 00307 if (panel_clksel == VDC5_PANEL_ICKSEL_IMG ) { 00308 /* Video image clock, VIDEO_X1 */ 00309 error = VDC5_ERR_PARAM_CONDITION ; 00310 goto END; 00311 } 00312 } 00313 } 00314 00315 /* Vsync signal 1/2fH phase timing */ 00316 if (((uint32_t)param->inp_fh50 & (uint32_t)~VDC5_CPARA_RANGE_0X000003FF) != 0u) { 00317 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00318 goto END; 00319 } 00320 /* Vsync signal 1/4fH phase timing */ 00321 if (((uint32_t)param->inp_fh25 & (uint32_t)~VDC5_CPARA_RANGE_0X000003FF) != 0u) { 00322 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00323 goto END; 00324 } 00325 00326 /* Sync signal delay adjustment */ 00327 dly_tmp = param->dly ; 00328 if (dly_tmp != NULL) { 00329 /* Number of lines for delaying Vsync signal and field differentiation signal */ 00330 if (((uint32_t)dly_tmp->inp_vs_dly_l & (uint32_t)~VDC5_CPARA_RANGE_0X00000007) != 0u) { 00331 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00332 goto END; 00333 } 00334 /* Field differentiation signal delay amount */ 00335 if (((uint32_t)dly_tmp->inp_fld_dly & (uint32_t)~VDC5_CPARA_RANGE_0X000000FF) != 0u) { 00336 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00337 goto END; 00338 } 00339 if ((uint32_t)dly_tmp->inp_fld_dly > (uint32_t)VDC5_CPARA_INP_FLD_DLY_MAX) { 00340 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00341 goto END; 00342 } 00343 /* Vsync signal delay amount */ 00344 if (((uint32_t)dly_tmp->inp_vs_dly & (uint32_t)~VDC5_CPARA_RANGE_0X000000FF) != 0u) { 00345 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00346 goto END; 00347 } 00348 if ((uint32_t)dly_tmp->inp_vs_dly > (uint32_t)VDC5_CPARA_INP_VS_DLY_MAX) { 00349 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00350 goto END; 00351 } 00352 /* Hsync signal delay amount */ 00353 if (((uint32_t)dly_tmp->inp_hs_dly & (uint32_t)~VDC5_CPARA_RANGE_0X000000FF) != 0u) { 00354 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00355 goto END; 00356 } 00357 if ((uint32_t)dly_tmp->inp_hs_dly > (uint32_t)VDC5_CPARA_INP_HS_DLY_MAX) { 00358 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00359 goto END; 00360 } 00361 } 00362 00363 /* External input signal */ 00364 ext_sig_tmp = param->ext_sig ; 00365 if (ext_sig_tmp == NULL) { 00366 if (param->inp_sel != VDC5_INPUT_SEL_VDEC ) { 00367 error = VDC5_ERR_PARAM_NULL ; 00368 goto END; 00369 } 00370 } else { 00371 /* External input format select */ 00372 if (ext_sig_tmp->inp_format >= VDC5_EXTIN_FORMAT_NUM) { 00373 error = VDC5_ERR_PARAM_UNDEFINED ; 00374 goto END; 00375 } 00376 /* Y/Cb/Y/Cr data string start timing to Hsync reference */ 00377 if (ext_sig_tmp->inp_h_pos >= VDC5_EXTIN_H_POS_NUM) { 00378 error = VDC5_ERR_PARAM_UNDEFINED ; 00379 goto END; 00380 } 00381 if ((ext_sig_tmp->inp_h_pos == VDC5_EXTIN_H_POS_YCRYCB ) || (ext_sig_tmp->inp_h_pos == VDC5_EXTIN_H_POS_CRYCBY )) { 00382 if (ext_sig_tmp->inp_format == VDC5_EXTIN_FORMAT_YCBCR422 ) { 00383 error = VDC5_ERR_PARAM_CONDITION ; 00384 goto END; 00385 } 00386 } 00387 } 00388 END: 00389 return error; 00390 } /* End of function VDC5_VideoInputCheckPrm() */ 00391 00392 /**************************************************************************//** 00393 * @brief Checks on sync control parameter 00394 * @param[in] ch : Channel 00395 * @param[in] param : Sync control parameter 00396 * @retval Error code 00397 *****************************************************************************/ 00398 vdc5_error_t VDC5_SyncControlCheckPrm (const vdc5_channel_t ch, const vdc5_sync_ctrl_t * const param) 00399 { 00400 vdc5_error_t error; 00401 00402 error = CheckChannel(ch); 00403 if (error != VDC5_OK ) { 00404 goto END; 00405 } 00406 00407 if (param == NULL) { 00408 error = VDC5_ERR_PARAM_NULL ; 00409 goto END; 00410 } 00411 00412 if (param->res_vs_sel != VDC5_OFF ) { 00413 /* Free-running Vsync period setting */ 00414 if (((uint32_t)param->res_fv & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00415 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00416 goto END; 00417 } 00418 } 00419 /* Hsync period setting */ 00420 if (((uint32_t)param->res_fh & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00421 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00422 goto END; 00423 } 00424 /* Vsync signal delay control */ 00425 if (((uint32_t)param->res_vsdly & (uint32_t)~VDC5_CPARA_RANGE_0X000000FF) != 0u) { 00426 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00427 goto END; 00428 } 00429 00430 /* Full-screen enable control */ 00431 error = CheckRect(¶m->res_f ); 00432 if (error != VDC5_OK ) { 00433 goto END; 00434 } 00435 END: 00436 return error; 00437 } /* End of function VDC5_SyncControlCheckPrm() */ 00438 00439 /**************************************************************************//** 00440 * @brief Checks on display output configuration parameter 00441 * @param[in] ch : Channel 00442 * @param[in] param : Display output configuration parameter 00443 * @retval Error code 00444 *****************************************************************************/ 00445 vdc5_error_t VDC5_DisplayOutputCheckPrm (const vdc5_channel_t ch, const vdc5_output_t * const param) 00446 { 00447 vdc5_error_t error; 00448 uint32_t tcon_sig_index; 00449 static vdc5_error_t (* const tcon_function_tbl[VDC5_LCD_TCONSIG_NUM])( 00450 const vdc5_lcd_tcon_timing_t * const lcd_tcon_timing) = { 00451 &CheckTcon_Vertical, /* STVA/VS */ 00452 &CheckTcon_Vertical, /* STVB/VE */ 00453 &CheckTcon_Horizontal, /* STH/HS */ 00454 &CheckTcon_Horizontal, /* STB/HE */ 00455 &CheckTcon_Horizontal, /* CPV/GCK */ 00456 &CheckTcon_HorizontalPol, /* POLA */ 00457 &CheckTcon_HorizontalPol, /* POLB */ 00458 &CheckTcon_DataEnable /* DE */ 00459 }; 00460 00461 error = CheckChannel(ch); 00462 if (error != VDC5_OK ) { 00463 goto END; 00464 } 00465 00466 if (param == NULL) { 00467 error = VDC5_ERR_PARAM_NULL ; 00468 goto END; 00469 } 00470 00471 /* 1/2fH timing */ 00472 if (((uint32_t)param->tcon_half & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00473 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00474 goto END; 00475 } 00476 /* Offset Hsync signal timing */ 00477 if (((uint32_t)param->tcon_offset & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00478 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00479 goto END; 00480 } 00481 00482 /* LCD TCON timing setting */ 00483 for (tcon_sig_index = 0; tcon_sig_index < VDC5_LCD_TCONSIG_NUM; tcon_sig_index++) { 00484 if (param->outctrl [tcon_sig_index] != NULL) { 00485 error = tcon_function_tbl[tcon_sig_index](param->outctrl [tcon_sig_index]); 00486 if (error != VDC5_OK ) { 00487 goto END; 00488 } 00489 } 00490 } 00491 00492 /* LCD output format select */ 00493 if (param->out_format >= VDC5_LCD_OUTFORMAT_NUM) { 00494 error = VDC5_ERR_PARAM_UNDEFINED ; 00495 goto END; 00496 } 00497 if (param->out_format == VDC5_LCD_OUTFORMAT_SERIAL_RGB ) { 00498 /* Clock frequency control */ 00499 if (param->out_frq_sel >= VDC5_LCD_SERIAL_CLKFRQ_NUM) { 00500 error = VDC5_ERR_PARAM_UNDEFINED ; 00501 goto END; 00502 } 00503 if (param->out_frq_sel == VDC5_LCD_PARALLEL_CLKFRQ_1 ) { 00504 error = VDC5_ERR_PARAM_CONDITION ; 00505 goto END; 00506 } 00507 /* Clock phase adjustment */ 00508 if (param->out_phase >= VDC5_LCD_SERIAL_CLKPHASE_NUM) { 00509 error = VDC5_ERR_PARAM_UNDEFINED ; 00510 goto END; 00511 } 00512 if (param->out_frq_sel == VDC5_LCD_SERIAL_CLKFRQ_3 ) { 00513 if (param->out_phase == VDC5_LCD_SERIAL_CLKPHASE_3 ) { 00514 error = VDC5_ERR_PARAM_CONDITION ; 00515 goto END; 00516 } 00517 } 00518 } 00519 /* Background color in 24-bit RGB color format */ 00520 if ((param->bg_color & (uint32_t)~VDC5_CPARA_RANGE_0X00FFFFFF) != 0u) { 00521 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00522 goto END; 00523 } 00524 END: 00525 return error; 00526 } /* End of function VDC5_DisplayOutputCheckPrm() */ 00527 00528 /**************************************************************************//** 00529 * @brief Checks on interrupt callback setup parameter 00530 * @param[in] ch : Channel 00531 * @param[in] param : Interrupt callback setup parameter 00532 * @retval Error code 00533 *****************************************************************************/ 00534 vdc5_error_t VDC5_CallbackISRCheckPrm (const vdc5_channel_t ch, const vdc5_int_t * const param) 00535 { 00536 vdc5_error_t error; 00537 00538 error = CheckChannel(ch); 00539 if (error != VDC5_OK ) { 00540 goto END; 00541 } 00542 00543 if (param == NULL) { 00544 error = VDC5_ERR_PARAM_NULL ; 00545 goto END; 00546 } 00547 00548 /* VDC5 interrupt type */ 00549 if (param->type >= VDC5_INT_TYPE_NUM ) { 00550 error = VDC5_ERR_PARAM_UNDEFINED ; 00551 goto END; 00552 } 00553 /* Interrupt callback function pointer */ 00554 if (param->callback != 0) { 00555 if ((param->type == VDC5_INT_TYPE_VLINE ) || 00556 (param->type == VDC5_INT_TYPE_S0_WLINE ) || 00557 (param->type == VDC5_INT_TYPE_S1_WLINE ) || 00558 (param->type == VDC5_INT_TYPE_OIR_VLINE )) { 00559 /* Line interrupt set */ 00560 if (((uint32_t)param->line_num & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00561 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00562 goto END; 00563 } 00564 } 00565 } 00566 END: 00567 return error; 00568 } /* End of function VDC5_CallbackISRCheckPrm() */ 00569 00570 /**************************************************************************//** 00571 * @brief Checks on data write control parameter 00572 * @param[in] ch : Channel 00573 * @param[in] layer_id : Layer ID 00574 * @param[in] param : Data write control parameter 00575 * @retval Error code 00576 *****************************************************************************/ 00577 vdc5_error_t VDC5_WriteDataControlCheckPrm ( 00578 const vdc5_channel_t ch, 00579 const vdc5_layer_id_t layer_id, 00580 const vdc5_write_t * const param) 00581 { 00582 vdc5_error_t error; 00583 const vdc5_scalingdown_rot_t * scldw_rt_tmp; 00584 00585 error = CheckChannel(ch); 00586 if (error != VDC5_OK ) { 00587 goto END; 00588 } 00589 if ((layer_id != VDC5_LAYER_ID_0_WR ) && (layer_id != VDC5_LAYER_ID_1_WR ) && (layer_id != VDC5_LAYER_ID_OIR_WR )) { 00590 error = VDC5_ERR_PARAM_LAYER_ID ; 00591 goto END; 00592 } 00593 00594 if (param == NULL) { 00595 error = VDC5_ERR_PARAM_NULL ; 00596 goto END; 00597 } 00598 00599 /* Scaling-down and rotation parameter */ 00600 scldw_rt_tmp = ¶m->scalingdown_rot ; 00601 /* Image area to be captured */ 00602 error = CheckRect(&scldw_rt_tmp->res ); 00603 if (error != VDC5_OK ) { 00604 goto END; 00605 } 00606 /* Number of valid lines in vertical direction output by scaling-down control block */ 00607 if (((uint32_t)scldw_rt_tmp->res_out_vw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00608 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00609 goto END; 00610 } 00611 if (((uint32_t)scldw_rt_tmp->res_out_vw & (uint32_t)VDC5_MULTIPLE_4_MASK) != 0u) { 00612 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00613 goto END; 00614 } 00615 /* Number of valid horizontal pixels output by scaling-down control block */ 00616 if (((uint32_t)scldw_rt_tmp->res_out_hw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00617 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00618 goto END; 00619 } 00620 if (((uint32_t)scldw_rt_tmp->res_out_hw & (uint32_t)VDC5_MULTIPLE_4_MASK) != 0u) { 00621 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00622 goto END; 00623 } 00624 /* Frame buffer writing mode for image processing */ 00625 if (scldw_rt_tmp->res_ds_wr_md >= VDC5_WR_MD_NUM) { 00626 error = VDC5_ERR_PARAM_UNDEFINED ; 00627 goto END; 00628 } 00629 00630 /* Swap setting in frame buffer writing */ 00631 if (param->res_wrswa >= VDC5_WR_RD_WRSWA_NUM) { 00632 error = VDC5_ERR_PARAM_UNDEFINED ; 00633 goto END; 00634 } 00635 /* Frame buffer video-signal writing format */ 00636 if (param->res_md >= VDC5_RES_MD_NUM) { 00637 error = VDC5_ERR_PARAM_UNDEFINED ; 00638 goto END; 00639 } 00640 /* Writing rate */ 00641 if (param->res_fs_rate >= VDC5_RES_FS_RATE_NUM) { 00642 error = VDC5_ERR_PARAM_UNDEFINED ; 00643 goto END; 00644 } 00645 /* Frame buffer base address */ 00646 if (param->base == NULL) { 00647 error = VDC5_ERR_PARAM_NULL ; 00648 goto END; 00649 } 00650 /* Frame buffer line offset address [byte] */ 00651 if ((param->ln_off & (uint32_t)~VDC5_CPARA_RANGE_0X00007FFF) != 0u) { 00652 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00653 goto END; 00654 } 00655 if (param->res_bst_md == VDC5_BST_MD_32BYTE ) { 00656 /* 32-byte transfer */ 00657 if ((param->ln_off & (uint32_t)VDC5_MULTIPLE_32_MASK) != 0u) { 00658 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00659 goto END; 00660 } 00661 } else { 00662 /* 128-byte transfer */ 00663 if ((param->ln_off & (uint32_t)VDC5_MULTIPLE_128_MASK) != 0u) { 00664 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00665 goto END; 00666 } 00667 } 00668 /* Number of frames of buffer to be written to (res_flm_num + 1) */ 00669 if ((param->flm_num & (uint32_t)~VDC5_CPARA_RANGE_0X000003FF) != 0u) { 00670 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00671 goto END; 00672 } 00673 /* Frame buffer frame offset address [byte] */ 00674 if (param->flm_num != 0u) { 00675 if ((param->flm_off & (uint32_t)~VDC5_CPARA_RANGE_0X007FFFFF) != 0u) { 00676 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00677 goto END; 00678 } 00679 if (param->res_bst_md == VDC5_BST_MD_32BYTE ) { 00680 /* 32-byte transfer */ 00681 if ((param->flm_off & (uint32_t)VDC5_MULTIPLE_32_MASK) != 0u) { 00682 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00683 goto END; 00684 } 00685 } else { 00686 /* 128-byte transfer */ 00687 if ((param->flm_off & (uint32_t)VDC5_MULTIPLE_128_MASK) != 0u) { 00688 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00689 goto END; 00690 } 00691 } 00692 } 00693 END: 00694 return error; 00695 } /* End of function VDC5_WriteDataControlCheckPrm() */ 00696 00697 /**************************************************************************//** 00698 * @brief Checks on data write change parameter 00699 * @param[in] ch : Channel 00700 * @param[in] layer_id : Layer ID 00701 * @param[in] param : Data write change parameter 00702 * @retval Error code 00703 *****************************************************************************/ 00704 vdc5_error_t VDC5_ChangeWriteProcessCheckPrm ( 00705 const vdc5_channel_t ch, 00706 const vdc5_layer_id_t layer_id, 00707 const vdc5_write_chg_t * const param) 00708 { 00709 vdc5_error_t error; 00710 const vdc5_scalingdown_rot_t * scldw_rt_tmp; 00711 00712 error = CheckChannel(ch); 00713 if (error != VDC5_OK ) { 00714 goto END; 00715 } 00716 if ((layer_id != VDC5_LAYER_ID_0_WR ) && (layer_id != VDC5_LAYER_ID_1_WR ) && (layer_id != VDC5_LAYER_ID_OIR_WR )) { 00717 error = VDC5_ERR_PARAM_LAYER_ID ; 00718 goto END; 00719 } 00720 00721 if (param == NULL) { 00722 error = VDC5_ERR_PARAM_NULL ; 00723 goto END; 00724 } 00725 00726 /* Scaling-down and rotation parameter */ 00727 scldw_rt_tmp = ¶m->scalingdown_rot ; 00728 /* Image area to be captured */ 00729 error = CheckRect(&scldw_rt_tmp->res ); 00730 if (error != VDC5_OK ) { 00731 goto END; 00732 } 00733 /* Number of valid lines in vertical direction output by scaling-down control block */ 00734 if (((uint32_t)scldw_rt_tmp->res_out_vw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00735 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00736 goto END; 00737 } 00738 if (((uint32_t)scldw_rt_tmp->res_out_vw & (uint32_t)VDC5_MULTIPLE_4_MASK) != 0u) { 00739 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00740 goto END; 00741 } 00742 /* Number of valid horizontal pixels output by scaling-down control block */ 00743 if (((uint32_t)scldw_rt_tmp->res_out_hw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00744 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00745 goto END; 00746 } 00747 if (((uint32_t)scldw_rt_tmp->res_out_hw & (uint32_t)VDC5_MULTIPLE_4_MASK) != 0u) { 00748 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00749 goto END; 00750 } 00751 /* Frame buffer writing mode */ 00752 if (scldw_rt_tmp->res_ds_wr_md >= VDC5_WR_MD_NUM) { 00753 error = VDC5_ERR_PARAM_UNDEFINED ; 00754 goto END; 00755 } 00756 END: 00757 return error; 00758 } /* End of function VDC5_ChangeWriteProcessCheckPrm() */ 00759 00760 /**************************************************************************//** 00761 * @brief Checks on data read control parameter 00762 * @param[in] ch : Channel 00763 * @param[in] layer_id : Layer ID 00764 * @param[in] graphics_id : Graphics type ID 00765 * @param[in] param : Data read control parameter 00766 * @retval Error code 00767 *****************************************************************************/ 00768 vdc5_error_t VDC5_ReadDataControlCheckPrm ( 00769 const vdc5_channel_t ch, 00770 const vdc5_layer_id_t layer_id, 00771 const vdc5_graphics_type_t graphics_id, 00772 const vdc5_read_t * const param) 00773 { 00774 vdc5_error_t error; 00775 void * btm_base_tmp; 00776 vdc5_resource_state_t rsrc_state; 00777 00778 error = CheckChannel(ch); 00779 if (error != VDC5_OK ) { 00780 goto END; 00781 } 00782 error = CheckGraphicsTypeLayerId(layer_id); 00783 if (error != VDC5_OK ) { 00784 goto END; 00785 } 00786 00787 if (param == NULL) { 00788 error = VDC5_ERR_PARAM_NULL ; 00789 goto END; 00790 } 00791 00792 /* Frame buffer address setting signal */ 00793 if (param->gr_flm_sel >= VDC5_GR_FLM_SEL_NUM) { 00794 error = VDC5_ERR_PARAM_UNDEFINED ; 00795 goto END; 00796 } 00797 btm_base_tmp = NULL; 00798 rsrc_state = VDC5_RESOURCE_ST_INVALID ; 00799 switch (graphics_id) { 00800 case VDC5_GR_TYPE_GR0 : 00801 btm_base_tmp = VDC5_ShrdPrmGetFrBuffBtm(ch, VDC5_SC_TYPE_SC0 ); 00802 rsrc_state = VDC5_ShrdPrmGetLayerResource(ch, VDC5_LAYER_ID_0_WR ); 00803 break; 00804 case VDC5_GR_TYPE_GR1 : 00805 if (param->gr_flm_sel == VDC5_GR_FLM_SEL_DISTORTION ) { 00806 /* IMR-LS2 is implemented in scaler 0 only. */ 00807 error = VDC5_ERR_PARAM_CONDITION ; 00808 goto END; 00809 } 00810 btm_base_tmp = VDC5_ShrdPrmGetFrBuffBtm(ch, VDC5_SC_TYPE_SC1 ); 00811 rsrc_state = VDC5_ShrdPrmGetLayerResource(ch, VDC5_LAYER_ID_1_WR ); 00812 break; 00813 /* The following two cases are intentionally combined. */ 00814 case VDC5_GR_TYPE_GR2 : 00815 case VDC5_GR_TYPE_GR3 : 00816 if (param->gr_flm_sel != VDC5_GR_FLM_SEL_FLM_NUM ) { 00817 error = VDC5_ERR_PARAM_CONDITION ; 00818 goto END; 00819 } 00820 break; 00821 case VDC5_GR_TYPE_OIR : 00822 if (param->gr_flm_sel == VDC5_GR_FLM_SEL_POINTER_BUFF ) { 00823 error = VDC5_ERR_PARAM_CONDITION ; 00824 goto END; 00825 } 00826 if ((ch != VDC5_CHANNEL_0 ) && (param->gr_flm_sel == VDC5_GR_FLM_SEL_DISTORTION )) { 00827 /* IMR-LSD is implemented in channel 0 only. */ 00828 error = VDC5_ERR_PARAM_CONDITION ; 00829 goto END; 00830 } 00831 break; 00832 default: 00833 /* DO NOTHING */ 00834 break; 00835 } 00836 if ((btm_base_tmp != NULL) && (rsrc_state != VDC5_RESOURCE_ST_INVALID )) { 00837 /* btm_base_tmp is valid only when rsrc_state is valid. */ 00838 if (param->gr_flm_sel == VDC5_GR_FLM_SEL_SCALE_DOWN ) { 00839 error = VDC5_ERR_PARAM_CONDITION ; 00840 goto END; 00841 } 00842 } 00843 /* Frame buffer base address */ 00844 if (param->gr_base == NULL) { 00845 if (param->gr_flm_sel != VDC5_GR_FLM_SEL_POINTER_BUFF ) { 00846 error = VDC5_ERR_PARAM_NULL ; 00847 goto END; 00848 } 00849 } 00850 /* Frame buffer line offset address */ 00851 if ((param->gr_ln_off & (uint32_t)~VDC5_CPARA_RANGE_0X00007FFF) != 0u) { 00852 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00853 goto END; 00854 } 00855 if (param->gr_bst_md == VDC5_BST_MD_32BYTE ) { 00856 /* 32-byte transfer */ 00857 if ((param->gr_ln_off & (uint32_t)VDC5_MULTIPLE_32_MASK) != 0u) { 00858 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00859 goto END; 00860 } 00861 } else { 00862 /* 128-byte transfer */ 00863 if ((param->gr_ln_off & (uint32_t)VDC5_MULTIPLE_128_MASK) != 0u) { 00864 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00865 goto END; 00866 } 00867 } 00868 if (param->width_read_fb != NULL) { 00869 /* Number of lines in a frame */ 00870 if (((uint32_t)param->width_read_fb ->in_vw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00871 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00872 goto END; 00873 } 00874 if ((uint32_t)param->width_read_fb ->in_vw == 0u) { 00875 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00876 goto END; 00877 } 00878 /* Width of the horizontal valid period */ 00879 if (((uint32_t)param->width_read_fb ->in_hw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00880 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00881 goto END; 00882 } 00883 if ((uint32_t)param->width_read_fb ->in_hw < (uint32_t)VDC5_CPARA_RANGE_0X00000003) { 00884 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00885 goto END; 00886 } 00887 } 00888 /* Format of the frame buffer read signal */ 00889 if (param->gr_format >= VDC5_GR_FORMAT_NUM ) { 00890 error = VDC5_ERR_PARAM_UNDEFINED ; 00891 goto END; 00892 } 00893 if ((param->gr_format == VDC5_GR_FORMAT_YCBCR422 ) || (param->gr_format == VDC5_GR_FORMAT_YCBCR444 )) { 00894 /* YCbCr422 and YCbCr444 are supported for the graphics 0 and 1. */ 00895 if ((graphics_id != VDC5_GR_TYPE_GR0 ) && (graphics_id != VDC5_GR_TYPE_GR1 )) { 00896 error = VDC5_ERR_PARAM_CONDITION ; 00897 goto END; 00898 } 00899 } 00900 if (param->gr_format == VDC5_GR_FORMAT_YCBCR422 ) { 00901 /* Swapping of data read from buffer in the YCbCr422 format */ 00902 if (param->gr_ycc_swap >= VDC5_GR_YCCSWAP_NUM) { 00903 error = VDC5_ERR_PARAM_UNDEFINED ; 00904 goto END; 00905 } 00906 } 00907 /* Swap setting in frame buffer reading */ 00908 if (param->gr_rdswa >= VDC5_WR_RD_WRSWA_NUM) { 00909 error = VDC5_ERR_PARAM_UNDEFINED ; 00910 goto END; 00911 } 00912 /* Graphics display area */ 00913 error = CheckRect(¶m->gr_grc ); 00914 if (error != VDC5_OK ) { 00915 goto END; 00916 } 00917 END: 00918 return error; 00919 } /* End of function VDC5_ReadDataControlCheckPrm() */ 00920 00921 /**************************************************************************//** 00922 * @brief Checks on data read change parameter 00923 * @param[in] ch : Channel 00924 * @param[in] layer_id : Layer ID 00925 * @param[in] param : Data read change parameter 00926 * @retval Error code 00927 *****************************************************************************/ 00928 vdc5_error_t VDC5_ChangeReadProcessCheckPrm ( 00929 const vdc5_channel_t ch, 00930 const vdc5_layer_id_t layer_id, 00931 const vdc5_read_chg_t * const param) 00932 { 00933 vdc5_error_t error; 00934 00935 error = CheckChannel(ch); 00936 if (error != VDC5_OK ) { 00937 goto END; 00938 } 00939 error = CheckGraphicsTypeLayerId(layer_id); 00940 if (error != VDC5_OK ) { 00941 goto END; 00942 } 00943 00944 if (param == NULL) { 00945 error = VDC5_ERR_PARAM_NULL ; 00946 goto END; 00947 } 00948 /* Width of the image read from frame buffer */ 00949 if (param->width_read_fb != NULL) { 00950 /* Number of lines in a frame */ 00951 if (((uint32_t)param->width_read_fb ->in_vw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00952 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00953 goto END; 00954 } 00955 if ((uint32_t)param->width_read_fb ->in_vw == 0u) { 00956 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00957 goto END; 00958 } 00959 /* Width of the horizontal valid period */ 00960 if (((uint32_t)param->width_read_fb ->in_hw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 00961 error = VDC5_ERR_PARAM_BIT_WIDTH ; 00962 goto END; 00963 } 00964 if ((uint32_t)param->width_read_fb ->in_hw < (uint32_t)VDC5_CPARA_RANGE_0X00000003) { 00965 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 00966 goto END; 00967 } 00968 } 00969 /* Graphics display area */ 00970 if (param->gr_grc != NULL) { 00971 error = CheckRect(param->gr_grc ); 00972 if (error != VDC5_OK ) { 00973 goto END; 00974 } 00975 } 00976 /* Graphics display mode */ 00977 if (param->gr_disp_sel != NULL) { 00978 if ((*(param->gr_disp_sel ) < VDC5_DISPSEL_IGNORED ) || (*(param->gr_disp_sel ) >= VDC5_DISPSEL_NUM )) { 00979 error = VDC5_ERR_PARAM_UNDEFINED ; 00980 goto END; 00981 } 00982 } 00983 END: 00984 return error; 00985 } /* End of function VDC5_ChangeReadProcessCheckPrm() */ 00986 00987 /**************************************************************************//** 00988 * @brief Checks on data write/read start parameter 00989 * @param[in] ch : Channel 00990 * @param[in] layer_id : Layer ID 00991 * @param[in] param : Data write/read start parameter 00992 * @retval Error code 00993 *****************************************************************************/ 00994 vdc5_error_t VDC5_StartProcessCheckPrm ( 00995 const vdc5_channel_t ch, 00996 const vdc5_layer_id_t layer_id, 00997 const vdc5_start_t * const param) 00998 { 00999 vdc5_error_t error; 01000 uint32_t graphics_types; 01001 const vdc5_gr_disp_sel_t * gr_disp_sel_tmp; 01002 01003 error = CheckChannel(ch); 01004 if (error != VDC5_OK ) { 01005 goto END; 01006 } 01007 error = CheckLayerId(layer_id); 01008 if (error != VDC5_OK ) { 01009 goto END; 01010 } 01011 01012 if (param == NULL) { 01013 error = VDC5_ERR_PARAM_NULL ; 01014 goto END; 01015 } 01016 01017 gr_disp_sel_tmp = param->gr_disp_sel ; 01018 if (gr_disp_sel_tmp == NULL) { 01019 error = VDC5_OK ; 01020 goto END; 01021 } 01022 /* Graphics display mode */ 01023 if (layer_id == VDC5_LAYER_ID_ALL ) { 01024 for (graphics_types = 0; graphics_types < VDC5_GR_TYPE_NUM ; graphics_types++) { 01025 if ((gr_disp_sel_tmp[graphics_types] < VDC5_DISPSEL_IGNORED ) || 01026 (gr_disp_sel_tmp[graphics_types] >= VDC5_DISPSEL_NUM )) { 01027 error = VDC5_ERR_PARAM_UNDEFINED ; 01028 goto END; 01029 } 01030 } 01031 } else { 01032 if ((*gr_disp_sel_tmp < VDC5_DISPSEL_IGNORED ) || (*gr_disp_sel_tmp >= VDC5_DISPSEL_NUM )) { 01033 error = VDC5_ERR_PARAM_UNDEFINED ; 01034 goto END; 01035 } 01036 } 01037 END: 01038 return error; 01039 } /* End of function VDC5_StartProcessCheckPrm() */ 01040 01041 /**************************************************************************//** 01042 * @brief Checks on parameters in R_VDC5_StopProcess 01043 * @param[in] ch : Channel 01044 * @param[in] layer_id : Layer ID 01045 * @retval Error code 01046 *****************************************************************************/ 01047 vdc5_error_t VDC5_StopProcessCheckPrm (const vdc5_channel_t ch, const vdc5_layer_id_t layer_id) 01048 { 01049 vdc5_error_t error; 01050 01051 error = CheckChannel(ch); 01052 if (error != VDC5_OK ) { 01053 goto END; 01054 } 01055 error = CheckLayerId(layer_id); 01056 if (error != VDC5_OK ) { 01057 goto END; 01058 } 01059 END: 01060 return error; 01061 } /* End of function VDC5_StopProcessCheckPrm() */ 01062 01063 /**************************************************************************//** 01064 * @brief Checks on parameters in R_VDC5_ReleaseDataControl 01065 * @param[in] ch : Channel 01066 * @param[in] layer_id : Layer ID 01067 * @retval Error code 01068 *****************************************************************************/ 01069 vdc5_error_t VDC5_ReleaseDataControlCheckPrm (const vdc5_channel_t ch, const vdc5_layer_id_t layer_id) 01070 { 01071 vdc5_error_t error; 01072 01073 error = CheckChannel(ch); 01074 if (error != VDC5_OK ) { 01075 goto END; 01076 } 01077 error = CheckLayerId(layer_id); 01078 if (error != VDC5_OK ) { 01079 goto END; 01080 } 01081 END: 01082 return error; 01083 } /* End of function VDC5_ReleaseDataControlCheckPrm() */ 01084 01085 /**************************************************************************//** 01086 * @brief Checks on noise reduction setup parameter 01087 * @param[in] ch : Channel 01088 * @param[in] param : Noise reduction setup parameter 01089 * @retval Error code 01090 *****************************************************************************/ 01091 vdc5_error_t VDC5_VideoNoiseReductCheckPrm (const vdc5_channel_t ch, const vdc5_noise_reduction_t * const param) 01092 { 01093 vdc5_error_t error; 01094 const vdc5_nr_param_t * nr_param; 01095 01096 error = CheckChannel(ch); 01097 if (error != VDC5_OK ) { 01098 goto END; 01099 } 01100 01101 if (param == NULL) { 01102 error = VDC5_OK ; 01103 goto END; 01104 } 01105 01106 /* Y/G signal noise reduction parameter */ 01107 nr_param = ¶m->y ; 01108 /* TAP select */ 01109 if (nr_param->nr1d_tap >= VDC5_NR_TAPSEL_NUM) { 01110 error = VDC5_ERR_PARAM_UNDEFINED ; 01111 goto END; 01112 } 01113 /* Maximum value of coring (absolute value) */ 01114 if ((nr_param->nr1d_th & (uint32_t)~VDC5_CPARA_RANGE_0X0000007F) != 0u) { 01115 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01116 goto END; 01117 } 01118 /* Noise reduction gain adjustment */ 01119 if (nr_param->nr1d_gain >= VDC5_NR_GAIN_NUM) { 01120 error = VDC5_ERR_PARAM_UNDEFINED ; 01121 goto END; 01122 } 01123 01124 /* Cb/B signal noise reduction parameter */ 01125 nr_param = ¶m->cb ; 01126 /* TAP select */ 01127 if (nr_param->nr1d_tap >= VDC5_NR_TAPSEL_NUM) { 01128 error = VDC5_ERR_PARAM_UNDEFINED ; 01129 goto END; 01130 } 01131 /* Maximum value of coring (absolute value) */ 01132 if ((nr_param->nr1d_th & (uint32_t)~VDC5_CPARA_RANGE_0X0000007F) != 0u) { 01133 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01134 goto END; 01135 } 01136 /* Noise reduction gain adjustment */ 01137 if (nr_param->nr1d_gain >= VDC5_NR_GAIN_NUM) { 01138 error = VDC5_ERR_PARAM_UNDEFINED ; 01139 goto END; 01140 } 01141 01142 /* Cr/R signal noise reduction parameter */ 01143 nr_param = ¶m->cr ; 01144 /* TAP select */ 01145 if (nr_param->nr1d_tap >= VDC5_NR_TAPSEL_NUM) { 01146 error = VDC5_ERR_PARAM_UNDEFINED ; 01147 goto END; 01148 } 01149 /* Maximum value of coring (absolute value) */ 01150 if ((nr_param->nr1d_th & (uint32_t)~VDC5_CPARA_RANGE_0X0000007F) != 0u) { 01151 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01152 goto END; 01153 } 01154 /* Noise reduction gain adjustment */ 01155 if (nr_param->nr1d_gain >= VDC5_NR_GAIN_NUM) { 01156 error = VDC5_ERR_PARAM_UNDEFINED ; 01157 goto END; 01158 } 01159 END: 01160 return error; 01161 } /* End of function VDC5_VideoNoiseReductCheckPrm() */ 01162 01163 /**************************************************************************//** 01164 * @brief Checks on color matrix setup parameter 01165 * @param[in] ch : Channel 01166 * @param[in] param : Color matrix setup parameter 01167 * @retval Error code 01168 *****************************************************************************/ 01169 vdc5_error_t VDC5_ImageColorMatrixCheckPrm (const vdc5_channel_t ch, const vdc5_color_matrix_t * const param) 01170 { 01171 vdc5_error_t error; 01172 int32_t colormtx_index; 01173 01174 error = CheckChannel(ch); 01175 if (error != VDC5_OK ) { 01176 goto END; 01177 } 01178 01179 if (param == NULL) { 01180 error = VDC5_ERR_PARAM_NULL ; 01181 goto END; 01182 } 01183 01184 /* Color matrix module */ 01185 if (param->module >= VDC5_COLORMTX_NUM) { 01186 error = VDC5_ERR_PARAM_UNDEFINED ; 01187 goto END; 01188 } 01189 /* Operating mode */ 01190 if (param->mtx_mode >= VDC5_COLORMTX_MODE_NUM ) { 01191 error = VDC5_ERR_PARAM_UNDEFINED ; 01192 goto END; 01193 } 01194 if (param->module != VDC5_COLORMTX_IMGCNT ) { 01195 if ((param->mtx_mode == VDC5_COLORMTX_GBR_YCBCR ) || (param->mtx_mode == VDC5_COLORMTX_YCBCR_YCBCR )) { 01196 error = VDC5_ERR_PARAM_CONDITION ; 01197 goto END; 01198 } 01199 } 01200 /* Offset (DC) adjustment of Y/G, B, and R signal */ 01201 for (colormtx_index = 0; colormtx_index < VDC5_COLORMTX_OFFST_NUM ; colormtx_index++) { 01202 if (((uint32_t)param->offset [colormtx_index] & (uint32_t)~VDC5_CPARA_RANGE_0X000000FF) != 0u) { 01203 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01204 goto END; 01205 } 01206 } 01207 /* GG, GB, GR, BG, BB, BR, RG, RB, and RR signal gain adjustment */ 01208 for (colormtx_index = 0; colormtx_index < VDC5_COLORMTX_GAIN_NUM ; colormtx_index++) { 01209 if (((uint32_t)param->gain [colormtx_index] & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01210 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01211 goto END; 01212 } 01213 } 01214 END: 01215 return error; 01216 } /* End of function VDC5_ImageColorMatrixCheckPrm() */ 01217 01218 /**************************************************************************//** 01219 * @brief Checks on sharpness setup parameter and enhancer-enabled area setup parameter 01220 * @param[in] ch : Channel 01221 * @param[in] imgimprv_id : Image quality improver ID 01222 * @param[in] sharp_param : Sharpness setup parameter 01223 * @param[in] enh_area : Enhancer-enabled area setup parameter 01224 * @retval Error code 01225 *****************************************************************************/ 01226 vdc5_error_t VDC5_ImageEnhancementCheckPrm ( 01227 const vdc5_channel_t ch, 01228 const vdc5_imgimprv_id_t imgimprv_id, 01229 const vdc5_enhance_sharp_t * const sharp_param, 01230 const vdc5_period_rect_t * const enh_area) 01231 { 01232 vdc5_error_t error; 01233 01234 error = CheckChannel(ch); 01235 if (error != VDC5_OK ) { 01236 goto END; 01237 } 01238 01239 /* Image quality improver ID */ 01240 if (imgimprv_id >= VDC5_IMG_IMPRV_NUM ) { 01241 error = VDC5_ERR_PARAM_UNDEFINED ; 01242 goto END; 01243 } 01244 01245 /* Sharpness parameter */ 01246 if (sharp_param != NULL) { 01247 /* Sharpness control parameter (H1, H2, and H3) */ 01248 if (((uint32_t)sharp_param->hrz_sharp [VDC5_IMGENH_SHARP_H1 ].shp_core & (uint32_t)~VDC5_CPARA_RANGE_0X0000007F) != 0u) { 01249 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01250 goto END; 01251 } 01252 if (((uint32_t)sharp_param->hrz_sharp [VDC5_IMGENH_SHARP_H2 ].shp_core & (uint32_t)~VDC5_CPARA_RANGE_0X0000007F) != 0u) { 01253 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01254 goto END; 01255 } 01256 if (((uint32_t)sharp_param->hrz_sharp [VDC5_IMGENH_SHARP_H3 ].shp_core & (uint32_t)~VDC5_CPARA_RANGE_0X0000007F) != 0u) { 01257 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01258 goto END; 01259 } 01260 } 01261 /* Enhancer area */ 01262 if (enh_area != NULL) { 01263 /* Vertical start position */ 01264 if (((uint32_t)enh_area->vs & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01265 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01266 goto END; 01267 } 01268 if ((uint32_t)enh_area->vs < (uint32_t)VDC5_CPARA_ENH_VS_LIMIT) { 01269 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01270 goto END; 01271 } 01272 /* Height (vertical width) */ 01273 if (((uint32_t)enh_area->vw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01274 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01275 goto END; 01276 } 01277 /* Horizontal start position */ 01278 if (((uint32_t)enh_area->hs & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01279 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01280 goto END; 01281 } 01282 if ((uint32_t)enh_area->hs < (uint32_t)VDC5_CPARA_ENH_HS_LIMIT) { 01283 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01284 goto END; 01285 } 01286 /* Horizontal width */ 01287 if (((uint32_t)enh_area->hw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01288 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01289 goto END; 01290 } 01291 } 01292 END: 01293 return error; 01294 } /* End of function VDC5_ImageEnhancementCheckPrm() */ 01295 01296 /**************************************************************************//** 01297 * @brief Checks on black stretch setup parameter 01298 * @param[in] ch : Channel 01299 * @param[in] imgimprv_id : Image quality improver ID 01300 * @param[in] param : Black stretch setup parameter 01301 * @retval Error code 01302 *****************************************************************************/ 01303 vdc5_error_t VDC5_ImageBlackStretchCheckPrm ( 01304 const vdc5_channel_t ch, 01305 const vdc5_imgimprv_id_t imgimprv_id, 01306 const vdc5_black_t * const param) 01307 { 01308 vdc5_error_t error; 01309 01310 error = CheckChannel(ch); 01311 if (error != VDC5_OK ) { 01312 goto END; 01313 } 01314 01315 /* Image quality improver ID */ 01316 if (imgimprv_id >= VDC5_IMG_IMPRV_NUM ) { 01317 error = VDC5_ERR_PARAM_UNDEFINED ; 01318 goto END; 01319 } 01320 01321 if (param != NULL) { 01322 /* Black stretch start point */ 01323 if (((uint32_t)param->bkstr_st & (uint32_t)~VDC5_CPARA_RANGE_0X0000000F) != 0u) { 01324 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01325 goto END; 01326 } 01327 /* Black stretch depth */ 01328 if (((uint32_t)param->bkstr_d & (uint32_t)~VDC5_CPARA_RANGE_0X0000000F) != 0u) { 01329 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01330 goto END; 01331 } 01332 /* Black stretch time constant (T1) */ 01333 if (((uint32_t)param->bkstr_t1 & (uint32_t)~VDC5_CPARA_RANGE_0X0000001F) != 0u) { 01334 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01335 goto END; 01336 } 01337 /* Black stretch time constant (T2) */ 01338 if (((uint32_t)param->bkstr_t2 & (uint32_t)~VDC5_CPARA_RANGE_0X0000001F) != 0u) { 01339 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01340 goto END; 01341 } 01342 if ((uint32_t)param->bkstr_t2 == VDC5_BKSTR_T2_PROHIBITED) { 01343 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01344 goto END; 01345 } 01346 01347 } 01348 END: 01349 return error; 01350 } /* End of function VDC5_ImageBlackStretchCheckPrm() */ 01351 01352 /**************************************************************************//** 01353 * @brief Checks on alpha blending setup parameter 01354 * @param[in] ch : Channel 01355 * @param[in] layer_id : Layer ID 01356 * @param[in] param : Alpha blending setup parameter 01357 * @retval Error code 01358 *****************************************************************************/ 01359 vdc5_error_t VDC5_AlphaBlendingCheckPrm ( 01360 const vdc5_channel_t ch, 01361 const vdc5_layer_id_t layer_id, 01362 const vdc5_alpha_blending_t * const param) 01363 { 01364 vdc5_error_t error; 01365 01366 error = CheckChannel(ch); 01367 if (error != VDC5_OK ) { 01368 goto END; 01369 } 01370 if ((layer_id != VDC5_LAYER_ID_1_RD ) && (layer_id != VDC5_LAYER_ID_2_RD ) && (layer_id != VDC5_LAYER_ID_3_RD )) { 01371 error = VDC5_ERR_PARAM_LAYER_ID ; 01372 goto END; 01373 } 01374 01375 if (param == NULL) { 01376 error = VDC5_ERR_PARAM_NULL ; 01377 goto END; 01378 } 01379 END: 01380 return error; 01381 } /* End of function VDC5_AlphaBlendingCheckPrm() */ 01382 01383 /**************************************************************************//** 01384 * @brief Checks on setup parameter for alpha blending in a rectangular area 01385 * @param[in] ch : Channel 01386 * @param[in] layer_id : Layer ID 01387 * @param[in] param : Setup parameter for alpha blending in a rectangular area 01388 * @retval Error code 01389 *****************************************************************************/ 01390 vdc5_error_t VDC5_AlphaBlendingRectCheckPrm ( 01391 const vdc5_channel_t ch, 01392 const vdc5_layer_id_t layer_id, 01393 const vdc5_alpha_blending_rect_t * const param) 01394 { 01395 vdc5_error_t error; 01396 01397 error = CheckChannel(ch); 01398 if (error != VDC5_OK ) { 01399 goto END; 01400 } 01401 if ((layer_id != VDC5_LAYER_ID_1_RD ) && 01402 (layer_id != VDC5_LAYER_ID_2_RD ) && 01403 (layer_id != VDC5_LAYER_ID_3_RD ) && 01404 (layer_id != VDC5_LAYER_ID_VIN_RD )) { 01405 error = VDC5_ERR_PARAM_LAYER_ID ; 01406 goto END; 01407 } 01408 01409 if (param != NULL) { 01410 /* Rectangular area subjected to alpha blending */ 01411 if (param->gr_arc != NULL) { 01412 /* Vertical start position */ 01413 if (((uint32_t)param->gr_arc ->vs_rel & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01414 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01415 goto END; 01416 } 01417 /* Height (vertical width) */ 01418 if (((uint32_t)param->gr_arc ->vw_rel & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01419 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01420 goto END; 01421 } 01422 /* Horizontal start position */ 01423 if (((uint32_t)param->gr_arc ->hs_rel & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01424 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01425 goto END; 01426 } 01427 /* Horizontal width */ 01428 if (((uint32_t)param->gr_arc ->hw_rel & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01429 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01430 goto END; 01431 } 01432 } 01433 /* Alpha Blending in a rectangular area */ 01434 if (param->alpha_rect != NULL) { 01435 /* Frame rate for alpha blending in a rectangular area */ 01436 if ((param->alpha_rect ->gr_arc_coef < (int16_t)VDC5_CPARA_GR_ARC_COEF_MIN) || (param->alpha_rect ->gr_arc_coef > (int16_t)VDC5_CPARA_GR_ARC_COEF_MAX)) { 01437 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01438 goto END; 01439 } 01440 } 01441 } 01442 END: 01443 return error; 01444 } /* End of function VDC5_AlphaBlendingRectCheckPrm() */ 01445 01446 /**************************************************************************//** 01447 * @brief Checks on chroma-key setup parameter 01448 * @param[in] ch : Channel 01449 * @param[in] layer_id : Layer ID 01450 * @param[in] graphics_id : Graphics type ID 01451 * @param[in] param : Chroma-key setup parameter 01452 * @retval Error code 01453 *****************************************************************************/ 01454 vdc5_error_t VDC5_ChromakeyCheckPrm ( 01455 const vdc5_channel_t ch, 01456 const vdc5_layer_id_t layer_id, 01457 const vdc5_graphics_type_t graphics_id, 01458 const vdc5_chromakey_t * const param) 01459 { 01460 vdc5_error_t error; 01461 vdc5_gr_format_t gr_format_tmp; 01462 01463 error = CheckChannel(ch); 01464 if (error != VDC5_OK ) { 01465 goto END; 01466 } 01467 error = CheckGraphicsTypeLayerId(layer_id); 01468 if (error != VDC5_OK ) { 01469 goto END; 01470 } 01471 01472 if (param != NULL) { 01473 gr_format_tmp = VDC5_ShrdPrmGetGraphicsFormat(ch, graphics_id); 01474 switch (gr_format_tmp) { 01475 /* The following four cases are intentionally combined, 01476 since the four types of graphics format are represented as 16 bit unsigned integer. */ 01477 case VDC5_GR_FORMAT_RGB565 : 01478 case VDC5_GR_FORMAT_ARGB1555 : 01479 case VDC5_GR_FORMAT_ARGB4444 : 01480 case VDC5_GR_FORMAT_RGBA5551 : 01481 if (((param->ck_color & (uint32_t)~VDC5_CPARA_RANGE_0X0000FFFF) != 0u) || 01482 ((param->rep_color & (uint32_t)~VDC5_CPARA_RANGE_0X0000FFFF) != 0u)) { 01483 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01484 } 01485 break; 01486 case VDC5_GR_FORMAT_RGB888 : 01487 if (((param->ck_color & (uint32_t)~VDC5_CPARA_RANGE_0X00FFFFFF) != 0u) || 01488 ((param->rep_color & (uint32_t)~VDC5_CPARA_RANGE_0X00FFFFFF) != 0u)) { 01489 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01490 } 01491 break; 01492 case VDC5_GR_FORMAT_CLUT8 : 01493 if ((param->ck_color & (uint32_t)~VDC5_CPARA_RANGE_0X000000FF) != 0u) { 01494 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01495 } 01496 break; 01497 case VDC5_GR_FORMAT_CLUT4 : 01498 if ((param->ck_color & (uint32_t)~VDC5_CPARA_RANGE_0X0000000F) != 0u) { 01499 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01500 } 01501 break; 01502 case VDC5_GR_FORMAT_CLUT1 : 01503 if ((param->ck_color & (uint32_t)~VDC5_CPARA_RANGE_0X00000001) != 0u) { 01504 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01505 } 01506 break; 01507 default: 01508 /* DO NOTHING */ 01509 break; 01510 } 01511 } 01512 END: 01513 return error; 01514 } /* End of function VDC5_ChromakeyCheckPrm() */ 01515 01516 /**************************************************************************//** 01517 * @brief Checks on CLUT setup parameter 01518 * @param[in] ch : Channel 01519 * @param[in] layer_id : Layer ID 01520 * @param[in] graphics_id : Graphics type ID 01521 * @param[in] param : CLUT setup parameter 01522 * @retval Error code 01523 *****************************************************************************/ 01524 vdc5_error_t VDC5_CLUTCheckPrm ( 01525 const vdc5_channel_t ch, 01526 const vdc5_layer_id_t layer_id, 01527 const vdc5_graphics_type_t graphics_id, 01528 const vdc5_clut_t * const param) 01529 { 01530 vdc5_error_t error; 01531 vdc5_gr_format_t gr_format_tmp; 01532 01533 error = CheckChannel(ch); 01534 if (error != VDC5_OK ) { 01535 goto END; 01536 } 01537 error = CheckGraphicsTypeLayerId(layer_id); 01538 if (error != VDC5_OK ) { 01539 goto END; 01540 } 01541 01542 if (param == NULL) { 01543 error = VDC5_ERR_PARAM_NULL ; 01544 goto END; 01545 } 01546 01547 /* The number of colors in CLUT */ 01548 if (param->color_num == 0u) { 01549 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01550 goto END; 01551 } 01552 gr_format_tmp = VDC5_ShrdPrmGetGraphicsFormat(ch, graphics_id); 01553 if (gr_format_tmp == VDC5_GR_FORMAT_CLUT1 ) { 01554 /* CLUT1 */ 01555 if (param->color_num > (uint32_t)VDC5_CPARA_CLUT1_NUM) { 01556 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01557 goto END; 01558 } 01559 } else if (gr_format_tmp == VDC5_GR_FORMAT_CLUT4 ) { 01560 /* CLUT4 */ 01561 if (param->color_num > (uint32_t)VDC5_CPARA_CLUT4_NUM) { 01562 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01563 goto END; 01564 } 01565 } else { 01566 /* CLUT8 */ 01567 if (param->color_num > (uint32_t)VDC5_CPARA_CLUT8_NUM) { 01568 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01569 goto END; 01570 } 01571 } 01572 01573 /* Address of the area storing the CLUT data (in ARGB8888 format) */ 01574 if (param->clut == NULL) { 01575 error = VDC5_ERR_PARAM_NULL ; 01576 goto END; 01577 } 01578 END: 01579 return error; 01580 } /* End of function VDC5_CLUTCheckPrm() */ 01581 01582 /**************************************************************************//** 01583 * @brief Checks on display calibration parameter 01584 * @param[in] ch : Channel 01585 * @param[in] param : Display calibration parameter 01586 * @retval Error code 01587 *****************************************************************************/ 01588 vdc5_error_t VDC5_DisplayCalibrationCheckPrm (const vdc5_channel_t ch, const vdc5_disp_calibration_t * const param) 01589 { 01590 vdc5_error_t error; 01591 const vdc5_calibr_bright_t * bright_tmp; 01592 const vdc5_calibr_dither_t * panel_dither_tmp; 01593 01594 error = CheckChannel(ch); 01595 if (error != VDC5_OK ) { 01596 goto END; 01597 } 01598 01599 if (param == NULL) { 01600 error = VDC5_ERR_PARAM_NULL ; 01601 goto END; 01602 } 01603 01604 /* Brightness (DC) adjustment */ 01605 bright_tmp = param->bright ; 01606 if (bright_tmp != NULL) { 01607 /* Brightness (DC) adjustment of G signal */ 01608 if (((uint32_t)bright_tmp->pbrt_g & (uint32_t)~VDC5_CPARA_RANGE_0X000003FF) != 0u) { 01609 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01610 goto END; 01611 } 01612 /* Brightness (DC) adjustment of B signal */ 01613 if (((uint32_t)bright_tmp->pbrt_b & (uint32_t)~VDC5_CPARA_RANGE_0X000003FF) != 0u) { 01614 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01615 goto END; 01616 } 01617 /* Brightness (DC) adjustment of R signal */ 01618 if (((uint32_t)bright_tmp->pbrt_r & (uint32_t)~VDC5_CPARA_RANGE_0X000003FF) != 0u) { 01619 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01620 goto END; 01621 } 01622 } 01623 /* Panel dithering */ 01624 panel_dither_tmp = param->panel_dither ; 01625 if (panel_dither_tmp != NULL) { 01626 /* Panel dither operation mode */ 01627 if (panel_dither_tmp->pdth_sel >= VDC5_PDTH_MD_NUM) { 01628 error = VDC5_ERR_PARAM_UNDEFINED ; 01629 goto END; 01630 } 01631 if (panel_dither_tmp->pdth_sel == VDC5_PDTH_MD_2X2 ) { 01632 /* Pattern value (A)-(D) of 2x2 pattern dither */ 01633 if (((uint32_t)panel_dither_tmp->pdth_pa & (uint32_t)~VDC5_CPARA_RANGE_0X00000003) != 0u) { 01634 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01635 goto END; 01636 } 01637 if (((uint32_t)panel_dither_tmp->pdth_pb & (uint32_t)~VDC5_CPARA_RANGE_0X00000003) != 0u) { 01638 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01639 goto END; 01640 } 01641 if (((uint32_t)panel_dither_tmp->pdth_pc & (uint32_t)~VDC5_CPARA_RANGE_0X00000003) != 0u) { 01642 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01643 goto END; 01644 } 01645 if (((uint32_t)panel_dither_tmp->pdth_pd & (uint32_t)~VDC5_CPARA_RANGE_0X00000003) != 0u) { 01646 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01647 goto END; 01648 } 01649 } 01650 } 01651 END: 01652 return error; 01653 } /* End of function VDC5_DisplayCalibrationCheckPrm() */ 01654 01655 /**************************************************************************//** 01656 * @brief Checks on gamma correction setup parameter 01657 * @param[in] ch : Channel 01658 * @param[in] param : Gamma correction setup parameter 01659 * @retval Error code 01660 *****************************************************************************/ 01661 vdc5_error_t VDC5_GammaCorrectionCheckPrm (const vdc5_channel_t ch, const vdc5_gamma_correction_t * const param) 01662 { 01663 vdc5_error_t error; 01664 01665 error = CheckChannel(ch); 01666 if (error != VDC5_OK ) { 01667 goto END; 01668 } 01669 01670 if (param != NULL) { 01671 /* Gain adjustment of area 0 to 31 of G signal */ 01672 error = CheckGammaCrct_GainAdjustment(param->gam_g_gain ); 01673 if (error != VDC5_OK ) { 01674 goto END; 01675 } 01676 /* Gain adjustment of area 0 to 31 of B signal */ 01677 error = CheckGammaCrct_GainAdjustment(param->gam_b_gain ); 01678 if (error != VDC5_OK ) { 01679 goto END; 01680 } 01681 /* Gain adjustment of area 0 to 31 of R signal */ 01682 error = CheckGammaCrct_GainAdjustment(param->gam_r_gain ); 01683 if (error != VDC5_OK ) { 01684 goto END; 01685 } 01686 } 01687 END: 01688 return error; 01689 } /* End of function VDC5_GammaCorrectionCheckPrm() */ 01690 01691 /****************************************************************************** 01692 Local Functions 01693 ******************************************************************************/ 01694 /**************************************************************************//** 01695 * @brief Checks on VDC5 channel 01696 * @param[in] ch : Channel 01697 * @retval Error code 01698 ******************************************************************************/ 01699 static vdc5_error_t CheckChannel (const vdc5_channel_t ch) 01700 { 01701 vdc5_error_t error; 01702 01703 error = VDC5_OK ; 01704 01705 if (ch >= VDC5_CHANNEL_NUM ) { 01706 error = VDC5_ERR_PARAM_CHANNEL ; 01707 goto END; 01708 } 01709 END: 01710 return error; 01711 } /* End of function CheckChannel() */ 01712 01713 /**************************************************************************//** 01714 * @brief Checks on layer ID 01715 * @param[in] layer_id : Layer ID 01716 * @retval Error code 01717 ******************************************************************************/ 01718 static vdc5_error_t CheckLayerId (const vdc5_layer_id_t layer_id) 01719 { 01720 vdc5_error_t error; 01721 01722 error = VDC5_OK ; 01723 01724 if ((layer_id < VDC5_LAYER_ID_ALL ) || (layer_id >= VDC5_LAYER_ID_NUM )) { 01725 error = VDC5_ERR_PARAM_LAYER_ID ; 01726 goto END; 01727 } 01728 if (layer_id == VDC5_LAYER_ID_VIN_RD ) { 01729 error = VDC5_ERR_PARAM_LAYER_ID ; 01730 goto END; 01731 } 01732 END: 01733 return error; 01734 } /* End of function CheckLayerId() */ 01735 01736 /**************************************************************************//** 01737 * @brief Checks on layer ID related to graphics 01738 * @param[in] layer_id : Layer ID 01739 * @retval Error code 01740 ******************************************************************************/ 01741 static vdc5_error_t CheckGraphicsTypeLayerId (const vdc5_layer_id_t layer_id) 01742 { 01743 vdc5_error_t error; 01744 01745 error = VDC5_OK ; 01746 01747 if ((layer_id < VDC5_LAYER_ID_0_RD ) || (layer_id > VDC5_LAYER_ID_OIR_RD )) { 01748 error = VDC5_ERR_PARAM_LAYER_ID ; 01749 goto END; 01750 } 01751 if (layer_id == VDC5_LAYER_ID_VIN_RD ) { 01752 error = VDC5_ERR_PARAM_LAYER_ID ; 01753 goto END; 01754 } 01755 END: 01756 return error; 01757 } /* End of function CheckGraphicsTypeLayerId() */ 01758 01759 /**************************************************************************//** 01760 * @brief Checks on horizontal/vertical timing of the VDC5 signals 01761 * @param[in] rect : Horizontal/vertical timing of the VDC5 signals 01762 * @retval Error code 01763 ******************************************************************************/ 01764 static vdc5_error_t CheckRect (const vdc5_period_rect_t * const rect) 01765 { 01766 vdc5_error_t error; 01767 01768 error = VDC5_OK ; 01769 01770 /* Vertical start position */ 01771 if (((uint32_t)rect->vs & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01772 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01773 goto END; 01774 } 01775 if ((uint32_t)rect->vs < (uint32_t)VDC5_CPARA_VS_MIN) { 01776 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01777 goto END; 01778 } 01779 /* Height (vertical width) */ 01780 if (((uint32_t)rect->vw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01781 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01782 goto END; 01783 } 01784 if (((uint32_t)rect->vs + (uint32_t)rect->vw ) > (uint32_t)VDC5_CPARA_VS_VW_MAX) { 01785 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01786 goto END; 01787 } 01788 01789 /* Horizontal start position */ 01790 if (((uint32_t)rect->hs & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01791 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01792 goto END; 01793 } 01794 if ((uint32_t)rect->hs < (uint32_t)VDC5_CPARA_HS_MIN) { 01795 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01796 goto END; 01797 } 01798 /* Horizontal width */ 01799 if (((uint32_t)rect->hw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01800 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01801 goto END; 01802 } 01803 if (((uint32_t)rect->hs + (uint32_t)rect->hw ) > (uint32_t)VDC5_CPARA_HS_HW_MAX) { 01804 error = VDC5_ERR_PARAM_EXCEED_RANGE ; 01805 goto END; 01806 } 01807 END: 01808 return error; 01809 } /* End of function CheckRect() */ 01810 01811 /**************************************************************************//** 01812 * @brief Checks on LCD TCON timing signal parameter for horizontal panel driver signal 01813 * @param[in] lcd_tcon_timing : LCD TCON timing signal parameter 01814 * @retval Error code 01815 ******************************************************************************/ 01816 static vdc5_error_t CheckTcon_Horizontal (const vdc5_lcd_tcon_timing_t * const lcd_tcon_timing) 01817 { 01818 vdc5_error_t error; 01819 01820 error = VDC5_OK ; 01821 01822 /* Signal pulse start position */ 01823 if (((uint32_t)lcd_tcon_timing->tcon_hsvs & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01824 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01825 goto END; 01826 } 01827 /* Pulse width */ 01828 if (((uint32_t)lcd_tcon_timing->tcon_hwvw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01829 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01830 goto END; 01831 } 01832 /* LCD TCON output pin select */ 01833 if ((lcd_tcon_timing->tcon_pin < VDC5_LCD_TCON_PIN_NON ) || (lcd_tcon_timing->tcon_pin >= VDC5_LCD_TCON_PIN_NUM)) { 01834 error = VDC5_ERR_PARAM_UNDEFINED ; 01835 goto END; 01836 } 01837 END: 01838 return error; 01839 } /* End of function CheckTcon_Horizontal() */ 01840 01841 /**************************************************************************//** 01842 * @brief Checks on LCD TCON timing signal parameter for horizontal panel driver signal (POLA/POLB) 01843 * @param[in] lcd_tcon_timing : LCD TCON timing signal parameter 01844 * @retval Error code 01845 ******************************************************************************/ 01846 static vdc5_error_t CheckTcon_HorizontalPol (const vdc5_lcd_tcon_timing_t * const lcd_tcon_timing) 01847 { 01848 vdc5_error_t error; 01849 01850 error = VDC5_OK ; 01851 01852 /* Signal pulse start position */ 01853 if (((uint32_t)lcd_tcon_timing->tcon_hsvs & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01854 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01855 goto END; 01856 } 01857 /* Pulse width */ 01858 if (((uint32_t)lcd_tcon_timing->tcon_hwvw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01859 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01860 goto END; 01861 } 01862 /* POLA/POLB signal generation mode select */ 01863 if (lcd_tcon_timing->tcon_md >= VDC5_LCD_TCON_POLMD_NUM) { 01864 error = VDC5_ERR_PARAM_UNDEFINED ; 01865 goto END; 01866 } 01867 /* LCD TCON output pin select */ 01868 if ((lcd_tcon_timing->tcon_pin < VDC5_LCD_TCON_PIN_NON ) || (lcd_tcon_timing->tcon_pin >= VDC5_LCD_TCON_PIN_NUM)) { 01869 error = VDC5_ERR_PARAM_UNDEFINED ; 01870 goto END; 01871 } 01872 END: 01873 return error; 01874 } /* End of function CheckTcon_HorizontalPol() */ 01875 01876 /**************************************************************************//** 01877 * @brief Checks on LCD TCON timing signal parameter for vertical panel driver signal 01878 * @param[in] lcd_tcon_timing : LCD TCON timing signal parameter 01879 * @retval Error code 01880 ******************************************************************************/ 01881 static vdc5_error_t CheckTcon_Vertical (const vdc5_lcd_tcon_timing_t * const lcd_tcon_timing) 01882 { 01883 vdc5_error_t error; 01884 01885 error = VDC5_OK ; 01886 01887 /* Signal pulse start position */ 01888 if (((uint32_t)lcd_tcon_timing->tcon_hsvs & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01889 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01890 goto END; 01891 } 01892 /* Pulse width */ 01893 if (((uint32_t)lcd_tcon_timing->tcon_hwvw & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01894 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01895 goto END; 01896 } 01897 /* LCD TCON output pin select */ 01898 if ((lcd_tcon_timing->tcon_pin < VDC5_LCD_TCON_PIN_NON ) || (lcd_tcon_timing->tcon_pin >= VDC5_LCD_TCON_PIN_NUM)) { 01899 error = VDC5_ERR_PARAM_UNDEFINED ; 01900 goto END; 01901 } 01902 END: 01903 return error; 01904 } /* End of function CheckTcon_Vertical() */ 01905 01906 /**************************************************************************//** 01907 * @brief Checks on LCD TCON timing signal parameter for DE timing signal 01908 * @param[in] lcd_tcon_timing : LCD TCON timing signal parameter 01909 * @retval Error code 01910 ******************************************************************************/ 01911 static vdc5_error_t CheckTcon_DataEnable (const vdc5_lcd_tcon_timing_t * const lcd_tcon_timing) 01912 { 01913 vdc5_error_t error; 01914 01915 error = VDC5_OK ; 01916 01917 /* LCD TCON output pin select */ 01918 if ((lcd_tcon_timing->tcon_pin < VDC5_LCD_TCON_PIN_NON ) || (lcd_tcon_timing->tcon_pin >= VDC5_LCD_TCON_PIN_NUM)) { 01919 error = VDC5_ERR_PARAM_UNDEFINED ; 01920 goto END; 01921 } 01922 END: 01923 return error; 01924 } /* End of function CheckTcon_DataEnable() */ 01925 01926 /**************************************************************************//** 01927 * @brief Checks on gain adjustment of area 0 to 31 of G/B/R signal 01928 * @param[in] gam_gain : Gain adjustment of area 0 to 31 of G/B/R signal 01929 * @retval Error code 01930 ******************************************************************************/ 01931 static vdc5_error_t CheckGammaCrct_GainAdjustment (const uint16_t * gam_gain) 01932 { 01933 uint32_t gain_index; 01934 vdc5_error_t error; 01935 01936 error = VDC5_OK ; 01937 01938 if (gam_gain != NULL) { 01939 for (gain_index = 0; gain_index < VDC5_GAM_GAIN_ADJ_NUM; gain_index++) { 01940 if (((uint32_t)*gam_gain & (uint32_t)~VDC5_CPARA_RANGE_0X000007FF) != 0u) { 01941 error = VDC5_ERR_PARAM_BIT_WIDTH ; 01942 goto END; 01943 } 01944 gam_gain++; 01945 } 01946 } 01947 END: 01948 return error; 01949 } /* End of function CheckGammaCrct_GainAdjustment() */ 01950 01951 #endif /* R_VDC5_CHECK_PARAMETERS */ 01952
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