This driver is a stripped down version of the Radiohead 1.45 driver, and covers fewer radios. Threading and an event queue have been added to make the ISR's more stable across architectures. Specifically The STM32L4 parts
Dependents: Threaded_LoRa_Modem
RHNRFSPIDriver.h@7:250d1c72df36, 2021-06-23 (annotated)
- Committer:
- rlanders73
- Date:
- Wed Jun 23 15:53:12 2021 +0000
- Revision:
- 7:250d1c72df36
- Parent:
- 0:ab4e012489ef
explicitly not disabling interrupts for mbed
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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davidr99 | 0:ab4e012489ef | 1 | // RHNRFSPIDriver.h |
davidr99 | 0:ab4e012489ef | 2 | // Author: Mike McCauley (mikem@airspayce.com) |
davidr99 | 0:ab4e012489ef | 3 | // Copyright (C) 2014 Mike McCauley |
davidr99 | 0:ab4e012489ef | 4 | // $Id: RHNRFSPIDriver.h,v 1.2 2014/08/12 00:54:52 mikem Exp $ |
davidr99 | 0:ab4e012489ef | 5 | |
davidr99 | 0:ab4e012489ef | 6 | #ifndef RHNRFSPIDriver_h |
davidr99 | 0:ab4e012489ef | 7 | #define RHNRFSPIDriver_h |
davidr99 | 0:ab4e012489ef | 8 | |
davidr99 | 0:ab4e012489ef | 9 | #include <RHGenericDriver.h> |
davidr99 | 0:ab4e012489ef | 10 | #include <RHHardwareSPI.h> |
davidr99 | 0:ab4e012489ef | 11 | |
davidr99 | 0:ab4e012489ef | 12 | class RHGenericSPI; |
davidr99 | 0:ab4e012489ef | 13 | |
davidr99 | 0:ab4e012489ef | 14 | ///////////////////////////////////////////////////////////////////// |
davidr99 | 0:ab4e012489ef | 15 | /// \class RHNRFSPIDriver RHNRFSPIDriver.h <RHNRFSPIDriver.h> |
davidr99 | 0:ab4e012489ef | 16 | /// \brief Base class for a RadioHead driver that use the SPI bus |
davidr99 | 0:ab4e012489ef | 17 | /// to communicate with its transport hardware. |
davidr99 | 0:ab4e012489ef | 18 | /// |
davidr99 | 0:ab4e012489ef | 19 | /// This class can be subclassed by Drivers that require to use the SPI bus. |
davidr99 | 0:ab4e012489ef | 20 | /// It can be configured to use either the RHHardwareSPI class (if there is one available on the platform) |
davidr99 | 0:ab4e012489ef | 21 | /// of the bitbanged RHSoftwareSPI class. The dfault behaviour is to use a pre-instantiated built-in RHHardwareSPI |
davidr99 | 0:ab4e012489ef | 22 | /// interface. |
davidr99 | 0:ab4e012489ef | 23 | /// |
davidr99 | 0:ab4e012489ef | 24 | /// SPI bus access is protected by ATOMIC_BLOCK_START and ATOMIC_BLOCK_END, which will ensure interrupts |
davidr99 | 0:ab4e012489ef | 25 | /// are disabled during access. |
davidr99 | 0:ab4e012489ef | 26 | /// |
davidr99 | 0:ab4e012489ef | 27 | /// The read and write routines use SPI conventions as used by Nordic NRF radios and otehr devices, |
davidr99 | 0:ab4e012489ef | 28 | /// but these can be overriden |
davidr99 | 0:ab4e012489ef | 29 | /// in subclasses if necessary. |
davidr99 | 0:ab4e012489ef | 30 | /// |
davidr99 | 0:ab4e012489ef | 31 | /// Application developers are not expected to instantiate this class directly: |
davidr99 | 0:ab4e012489ef | 32 | /// it is for the use of Driver developers. |
davidr99 | 0:ab4e012489ef | 33 | class RHNRFSPIDriver : public RHGenericDriver |
davidr99 | 0:ab4e012489ef | 34 | { |
davidr99 | 0:ab4e012489ef | 35 | public: |
davidr99 | 0:ab4e012489ef | 36 | /// Constructor |
davidr99 | 0:ab4e012489ef | 37 | /// \param[in] slaveSelectPin The controller pin to use to select the desired SPI device. This pin will be driven LOW |
davidr99 | 0:ab4e012489ef | 38 | /// during SPI communications with the SPI device that uis iused by this Driver. |
davidr99 | 0:ab4e012489ef | 39 | /// \param[in] spi Reference to the SPI interface to use. The default is to use a default built-in Hardware interface. |
davidr99 | 0:ab4e012489ef | 40 | RHNRFSPIDriver(PINS slaveSelectPin, RHGenericSPI& spi = hardware_spi); |
davidr99 | 0:ab4e012489ef | 41 | |
davidr99 | 0:ab4e012489ef | 42 | /// Initialise the Driver transport hardware and software. |
davidr99 | 0:ab4e012489ef | 43 | /// Make sure the Driver is properly configured before calling init(). |
davidr99 | 0:ab4e012489ef | 44 | /// \return true if initialisation succeeded. |
davidr99 | 0:ab4e012489ef | 45 | bool init(); |
davidr99 | 0:ab4e012489ef | 46 | |
davidr99 | 0:ab4e012489ef | 47 | /// Sends a single command to the device |
davidr99 | 0:ab4e012489ef | 48 | /// \param[in] command The command code to send to the device. |
davidr99 | 0:ab4e012489ef | 49 | /// \return Some devices return a status byte during the first data transfer. This byte is returned. |
davidr99 | 0:ab4e012489ef | 50 | /// it may or may not be meaningfule depending on the the type of device being accessed. |
davidr99 | 0:ab4e012489ef | 51 | uint8_t spiCommand(uint8_t command); |
davidr99 | 0:ab4e012489ef | 52 | |
davidr99 | 0:ab4e012489ef | 53 | /// Reads a single register from the SPI device |
davidr99 | 0:ab4e012489ef | 54 | /// \param[in] reg Register number |
davidr99 | 0:ab4e012489ef | 55 | /// \return The value of the register |
davidr99 | 0:ab4e012489ef | 56 | uint8_t spiRead(uint8_t reg); |
davidr99 | 0:ab4e012489ef | 57 | |
davidr99 | 0:ab4e012489ef | 58 | /// Writes a single byte to the SPI device |
davidr99 | 0:ab4e012489ef | 59 | /// \param[in] reg Register number |
davidr99 | 0:ab4e012489ef | 60 | /// \param[in] val The value to write |
davidr99 | 0:ab4e012489ef | 61 | /// \return Some devices return a status byte during the first data transfer. This byte is returned. |
davidr99 | 0:ab4e012489ef | 62 | /// it may or may not be meaningfule depending on the the type of device being accessed. |
davidr99 | 0:ab4e012489ef | 63 | uint8_t spiWrite(uint8_t reg, uint8_t val); |
davidr99 | 0:ab4e012489ef | 64 | |
davidr99 | 0:ab4e012489ef | 65 | /// Reads a number of consecutive registers from the SPI device using burst read mode |
davidr99 | 0:ab4e012489ef | 66 | /// \param[in] reg Register number of the first register |
davidr99 | 0:ab4e012489ef | 67 | /// \param[in] dest Array to write the register values to. Must be at least len bytes |
davidr99 | 0:ab4e012489ef | 68 | /// \param[in] len Number of bytes to read |
davidr99 | 0:ab4e012489ef | 69 | /// \return Some devices return a status byte during the first data transfer. This byte is returned. |
davidr99 | 0:ab4e012489ef | 70 | /// it may or may not be meaningfule depending on the the type of device being accessed. |
davidr99 | 0:ab4e012489ef | 71 | uint8_t spiBurstRead(uint8_t reg, uint8_t* dest, uint8_t len); |
davidr99 | 0:ab4e012489ef | 72 | |
davidr99 | 0:ab4e012489ef | 73 | /// Write a number of consecutive registers using burst write mode |
davidr99 | 0:ab4e012489ef | 74 | /// \param[in] reg Register number of the first register |
davidr99 | 0:ab4e012489ef | 75 | /// \param[in] src Array of new register values to write. Must be at least len bytes |
davidr99 | 0:ab4e012489ef | 76 | /// \param[in] len Number of bytes to write |
davidr99 | 0:ab4e012489ef | 77 | /// \return Some devices return a status byte during the first data transfer. This byte is returned. |
davidr99 | 0:ab4e012489ef | 78 | /// it may or may not be meaningfule depending on the the type of device being accessed. |
davidr99 | 0:ab4e012489ef | 79 | uint8_t spiBurstWrite(uint8_t reg, const uint8_t* src, uint8_t len); |
davidr99 | 0:ab4e012489ef | 80 | |
davidr99 | 0:ab4e012489ef | 81 | protected: |
davidr99 | 0:ab4e012489ef | 82 | /// Reference to the RHGenericSPI instance to use to trasnfer data with teh SPI device |
davidr99 | 0:ab4e012489ef | 83 | RHGenericSPI& _spi; |
davidr99 | 0:ab4e012489ef | 84 | |
davidr99 | 0:ab4e012489ef | 85 | /// The pin number of the Slave Selct pin that is used to select the desired device. |
davidr99 | 0:ab4e012489ef | 86 | #if (RH_PLATFORM == RH_PLATFORM_MBED) |
davidr99 | 0:ab4e012489ef | 87 | DigitalOut _slaveSelectPin; |
davidr99 | 0:ab4e012489ef | 88 | #else |
davidr99 | 0:ab4e012489ef | 89 | uint8_t _slaveSelectPin; |
davidr99 | 0:ab4e012489ef | 90 | #endif |
davidr99 | 0:ab4e012489ef | 91 | }; |
davidr99 | 0:ab4e012489ef | 92 | |
davidr99 | 0:ab4e012489ef | 93 | #endif |