capstone_finish
Dependencies: BufferedSerial motor_sn7544
ov7670.h@2:e98408458d2b, 2019-08-12 (annotated)
- Committer:
- kangmingyo
- Date:
- Mon Aug 12 07:12:38 2019 +0000
- Revision:
- 2:e98408458d2b
- Parent:
- 1:509676f3be32
- Child:
- 3:2a3664dc6634
al422b;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mio | 0:f3f80a0695ff | 1 | #include "mbed.h" |
mio | 0:f3f80a0695ff | 2 | #include "ov7670reg.h" |
mio | 0:f3f80a0695ff | 3 | |
mio | 0:f3f80a0695ff | 4 | #define OV7670_WRITE (0x42) |
mio | 0:f3f80a0695ff | 5 | #define OV7670_READ (0x43) |
mio | 0:f3f80a0695ff | 6 | #define OV7670_WRITEWAIT (20) |
mio | 0:f3f80a0695ff | 7 | #define OV7670_NOACK (0) |
mio | 0:f3f80a0695ff | 8 | #define OV7670_REGMAX (201) |
mio | 0:f3f80a0695ff | 9 | #define OV7670_I2CFREQ (50000) |
mio | 0:f3f80a0695ff | 10 | |
mio | 0:f3f80a0695ff | 11 | // |
mio | 0:f3f80a0695ff | 12 | // OV7670 + FIFO AL422B camera board test |
mio | 0:f3f80a0695ff | 13 | // |
kangmingyo | 2:e98408458d2b | 14 | class OV7670 |
mio | 0:f3f80a0695ff | 15 | { |
mio | 0:f3f80a0695ff | 16 | public: |
mio | 0:f3f80a0695ff | 17 | I2C camera ; |
mio | 0:f3f80a0695ff | 18 | InterruptIn vsync,href; |
mio | 0:f3f80a0695ff | 19 | DigitalOut wen ; |
mio | 0:f3f80a0695ff | 20 | PortIn data ; |
mio | 0:f3f80a0695ff | 21 | DigitalOut rrst,oe,rclk ; |
mio | 0:f3f80a0695ff | 22 | volatile int LineCounter ; |
mio | 0:f3f80a0695ff | 23 | volatile int LastLines ; |
mio | 0:f3f80a0695ff | 24 | volatile bool CaptureReq ; |
mio | 0:f3f80a0695ff | 25 | volatile bool Busy ; |
mio | 0:f3f80a0695ff | 26 | volatile bool Done ; |
mio | 0:f3f80a0695ff | 27 | |
mio | 0:f3f80a0695ff | 28 | OV7670( |
mio | 0:f3f80a0695ff | 29 | PinName sda,// Camera I2C port |
mio | 0:f3f80a0695ff | 30 | PinName scl,// Camera I2C port |
mio | 0:f3f80a0695ff | 31 | PinName vs, // VSYNC |
mio | 0:f3f80a0695ff | 32 | PinName hr, // HREF |
mio | 0:f3f80a0695ff | 33 | PinName we, // WEN |
mio | 0:f3f80a0695ff | 34 | PortName port, // 8bit bus port |
mio | 0:f3f80a0695ff | 35 | int mask, // 0b0000_0M65_4000_0321_L000_0000_0000_0000 = 0x07878000 |
mio | 0:f3f80a0695ff | 36 | PinName rt, // /RRST |
mio | 0:f3f80a0695ff | 37 | PinName o, // /OE |
kangmingyo | 2:e98408458d2b | 38 | PinName rc // RCLK |
kangmingyo | 2:e98408458d2b | 39 | ) : camera(sda,scl),vsync(vs),href(hr),wen(we),data(port,mask),rrst(rt),oe(o),rclk(rc) |
mio | 0:f3f80a0695ff | 40 | { |
mio | 0:f3f80a0695ff | 41 | camera.stop() ; |
mio | 0:f3f80a0695ff | 42 | camera.frequency(OV7670_I2CFREQ) ; |
mio | 0:f3f80a0695ff | 43 | vsync.fall(this,&OV7670::VsyncHandler) ; |
mio | 0:f3f80a0695ff | 44 | href.rise(this,&OV7670::HrefHandler) ; |
mio | 0:f3f80a0695ff | 45 | CaptureReq = false ; |
mio | 0:f3f80a0695ff | 46 | Busy = false ; |
mio | 0:f3f80a0695ff | 47 | Done = false ; |
mio | 0:f3f80a0695ff | 48 | LineCounter = 0 ; |
mio | 0:f3f80a0695ff | 49 | rrst = 1 ; |
mio | 0:f3f80a0695ff | 50 | oe = 1 ; |
mio | 0:f3f80a0695ff | 51 | rclk = 1 ; |
mio | 0:f3f80a0695ff | 52 | wen = 0 ; |
mio | 0:f3f80a0695ff | 53 | } |
mio | 0:f3f80a0695ff | 54 | |
mio | 0:f3f80a0695ff | 55 | // capture request |
mio | 0:f3f80a0695ff | 56 | void CaptureNext(void) |
mio | 0:f3f80a0695ff | 57 | { |
mio | 0:f3f80a0695ff | 58 | CaptureReq = true ; |
mio | 0:f3f80a0695ff | 59 | Busy = true ; |
mio | 0:f3f80a0695ff | 60 | } |
kangmingyo | 2:e98408458d2b | 61 | |
mio | 0:f3f80a0695ff | 62 | // capture done? (with clear) |
mio | 0:f3f80a0695ff | 63 | bool CaptureDone(void) |
mio | 0:f3f80a0695ff | 64 | { |
mio | 0:f3f80a0695ff | 65 | bool result ; |
mio | 0:f3f80a0695ff | 66 | if (Busy) { |
mio | 0:f3f80a0695ff | 67 | result = false ; |
mio | 0:f3f80a0695ff | 68 | } else { |
mio | 0:f3f80a0695ff | 69 | result = Done ; |
mio | 0:f3f80a0695ff | 70 | Done = false ; |
mio | 0:f3f80a0695ff | 71 | } |
mio | 0:f3f80a0695ff | 72 | return result ; |
mio | 0:f3f80a0695ff | 73 | } |
mio | 0:f3f80a0695ff | 74 | |
mio | 0:f3f80a0695ff | 75 | // write to camera |
mio | 0:f3f80a0695ff | 76 | void WriteReg(int addr,int data) |
mio | 0:f3f80a0695ff | 77 | { |
mio | 0:f3f80a0695ff | 78 | // WRITE 0x42,ADDR,DATA |
mio | 0:f3f80a0695ff | 79 | camera.start() ; |
mio | 0:f3f80a0695ff | 80 | camera.write(OV7670_WRITE) ; |
mio | 0:f3f80a0695ff | 81 | wait_us(OV7670_WRITEWAIT); |
mio | 0:f3f80a0695ff | 82 | camera.write(addr) ; |
mio | 0:f3f80a0695ff | 83 | wait_us(OV7670_WRITEWAIT); |
mio | 0:f3f80a0695ff | 84 | camera.write(data) ; |
mio | 0:f3f80a0695ff | 85 | camera.stop() ; |
mio | 0:f3f80a0695ff | 86 | } |
mio | 0:f3f80a0695ff | 87 | |
mio | 0:f3f80a0695ff | 88 | // read from camera |
mio | 0:f3f80a0695ff | 89 | int ReadReg(int addr) |
mio | 0:f3f80a0695ff | 90 | { |
mio | 0:f3f80a0695ff | 91 | int data ; |
mio | 0:f3f80a0695ff | 92 | |
mio | 0:f3f80a0695ff | 93 | // WRITE 0x42,ADDR |
mio | 0:f3f80a0695ff | 94 | camera.start() ; |
mio | 0:f3f80a0695ff | 95 | camera.write(OV7670_WRITE) ; |
mio | 0:f3f80a0695ff | 96 | wait_us(OV7670_WRITEWAIT); |
mio | 0:f3f80a0695ff | 97 | camera.write(addr) ; |
mio | 0:f3f80a0695ff | 98 | camera.stop() ; |
kangmingyo | 2:e98408458d2b | 99 | wait_us(OV7670_WRITEWAIT); |
mio | 0:f3f80a0695ff | 100 | |
mio | 0:f3f80a0695ff | 101 | // WRITE 0x43,READ |
mio | 0:f3f80a0695ff | 102 | camera.start() ; |
mio | 0:f3f80a0695ff | 103 | camera.write(OV7670_READ) ; |
mio | 0:f3f80a0695ff | 104 | wait_us(OV7670_WRITEWAIT); |
mio | 0:f3f80a0695ff | 105 | data = camera.read(OV7670_NOACK) ; |
mio | 0:f3f80a0695ff | 106 | camera.stop() ; |
kangmingyo | 2:e98408458d2b | 107 | |
mio | 0:f3f80a0695ff | 108 | return data ; |
mio | 0:f3f80a0695ff | 109 | } |
mio | 0:f3f80a0695ff | 110 | |
kangmingyo | 2:e98408458d2b | 111 | void Reset(void) |
kangmingyo | 2:e98408458d2b | 112 | { |
mio | 0:f3f80a0695ff | 113 | WriteReg(0x12,0x80) ; // RESET CAMERA |
mio | 0:f3f80a0695ff | 114 | wait_ms(200) ; |
mio | 0:f3f80a0695ff | 115 | } |
kangmingyo | 2:e98408458d2b | 116 | |
kangmingyo | 2:e98408458d2b | 117 | void InitQQVGA565(bool flipv,bool fliph) |
kangmingyo | 2:e98408458d2b | 118 | { |
mio | 0:f3f80a0695ff | 119 | // QQVGA RGB565 |
mio | 0:f3f80a0695ff | 120 | WriteReg(REG_CLKRC,0x80); |
kangmingyo | 2:e98408458d2b | 121 | WriteReg(REG_COM11,0x0A) ; |
mio | 0:f3f80a0695ff | 122 | WriteReg(REG_TSLB,0x04); |
mio | 0:f3f80a0695ff | 123 | WriteReg(REG_COM7,0x04) ; |
mio | 0:f3f80a0695ff | 124 | WriteReg(REG_RGB444, 0x00); |
mio | 0:f3f80a0695ff | 125 | WriteReg(REG_COM15, 0xd0); |
mio | 0:f3f80a0695ff | 126 | WriteReg(REG_HSTART,0x16) ; |
mio | 0:f3f80a0695ff | 127 | WriteReg(REG_HSTOP,0x04) ; |
mio | 0:f3f80a0695ff | 128 | WriteReg(REG_HREF,0x24) ; |
mio | 0:f3f80a0695ff | 129 | WriteReg(REG_VSTART,0x02) ; |
mio | 0:f3f80a0695ff | 130 | WriteReg(REG_VSTOP,0x7a) ; |
mio | 0:f3f80a0695ff | 131 | WriteReg(REG_VREF,0x0a) ; |
mio | 0:f3f80a0695ff | 132 | WriteReg(REG_COM10,0x02) ; |
mio | 0:f3f80a0695ff | 133 | WriteReg(REG_COM3, 0x04); |
mio | 0:f3f80a0695ff | 134 | WriteReg(REG_COM14, 0x1a); |
mio | 1:509676f3be32 | 135 | WriteReg(REG_MVFP,0x07 | (flipv ? 0x10:0) | (fliph ? 0x20:0)) ; |
mio | 0:f3f80a0695ff | 136 | WriteReg(0x72, 0x22); |
mio | 0:f3f80a0695ff | 137 | WriteReg(0x73, 0xf2); |
mio | 0:f3f80a0695ff | 138 | |
mio | 0:f3f80a0695ff | 139 | // COLOR SETTING |
mio | 0:f3f80a0695ff | 140 | WriteReg(0x4f,0x80); |
mio | 0:f3f80a0695ff | 141 | WriteReg(0x50,0x80); |
mio | 0:f3f80a0695ff | 142 | WriteReg(0x51,0x00); |
mio | 0:f3f80a0695ff | 143 | WriteReg(0x52,0x22); |
mio | 0:f3f80a0695ff | 144 | WriteReg(0x53,0x5e); |
mio | 0:f3f80a0695ff | 145 | WriteReg(0x54,0x80); |
mio | 0:f3f80a0695ff | 146 | WriteReg(0x56,0x40); |
mio | 0:f3f80a0695ff | 147 | WriteReg(0x58,0x9e); |
mio | 0:f3f80a0695ff | 148 | WriteReg(0x59,0x88); |
mio | 0:f3f80a0695ff | 149 | WriteReg(0x5a,0x88); |
mio | 0:f3f80a0695ff | 150 | WriteReg(0x5b,0x44); |
mio | 0:f3f80a0695ff | 151 | WriteReg(0x5c,0x67); |
mio | 0:f3f80a0695ff | 152 | WriteReg(0x5d,0x49); |
mio | 0:f3f80a0695ff | 153 | WriteReg(0x5e,0x0e); |
mio | 0:f3f80a0695ff | 154 | WriteReg(0x69,0x00); |
mio | 0:f3f80a0695ff | 155 | WriteReg(0x6a,0x40); |
mio | 0:f3f80a0695ff | 156 | WriteReg(0x6b,0x0a); |
mio | 0:f3f80a0695ff | 157 | WriteReg(0x6c,0x0a); |
mio | 0:f3f80a0695ff | 158 | WriteReg(0x6d,0x55); |
mio | 0:f3f80a0695ff | 159 | WriteReg(0x6e,0x11); |
mio | 0:f3f80a0695ff | 160 | WriteReg(0x6f,0x9f); |
mio | 0:f3f80a0695ff | 161 | |
mio | 0:f3f80a0695ff | 162 | WriteReg(0xb0,0x84); |
kangmingyo | 2:e98408458d2b | 163 | } |
mio | 0:f3f80a0695ff | 164 | |
kangmingyo | 2:e98408458d2b | 165 | void InitQVGA565(bool flipv,bool fliph) |
kangmingyo | 2:e98408458d2b | 166 | { |
mio | 0:f3f80a0695ff | 167 | // QVGA RGB565 |
mio | 0:f3f80a0695ff | 168 | WriteReg(REG_CLKRC,0x80); |
mio | 0:f3f80a0695ff | 169 | WriteReg(REG_COM11,0x0A) ; |
mio | 0:f3f80a0695ff | 170 | WriteReg(REG_TSLB,0x04); |
mio | 0:f3f80a0695ff | 171 | WriteReg(REG_COM7,0x04) ; |
mio | 0:f3f80a0695ff | 172 | WriteReg(REG_RGB444, 0x00); |
mio | 0:f3f80a0695ff | 173 | WriteReg(REG_COM15, 0xd0); |
mio | 0:f3f80a0695ff | 174 | WriteReg(REG_HSTART,0x16) ; |
mio | 0:f3f80a0695ff | 175 | WriteReg(REG_HSTOP,0x04) ; |
mio | 0:f3f80a0695ff | 176 | WriteReg(REG_HREF,0x80) ; |
mio | 0:f3f80a0695ff | 177 | WriteReg(REG_VSTART,0x02) ; |
mio | 0:f3f80a0695ff | 178 | WriteReg(REG_VSTOP,0x7a) ; |
mio | 0:f3f80a0695ff | 179 | WriteReg(REG_VREF,0x0a) ; |
mio | 0:f3f80a0695ff | 180 | WriteReg(REG_COM10,0x02) ; |
mio | 0:f3f80a0695ff | 181 | WriteReg(REG_COM3, 0x04); |
mio | 0:f3f80a0695ff | 182 | WriteReg(REG_COM14, 0x19); |
mio | 1:509676f3be32 | 183 | WriteReg(REG_MVFP,0x07 | (flipv ? 0x10:0) | (fliph ? 0x20:0)) ; |
mio | 0:f3f80a0695ff | 184 | WriteReg(0x72, 0x11); |
mio | 0:f3f80a0695ff | 185 | WriteReg(0x73, 0xf1); |
mio | 0:f3f80a0695ff | 186 | |
mio | 0:f3f80a0695ff | 187 | // COLOR SETTING |
mio | 0:f3f80a0695ff | 188 | WriteReg(0x4f,0x80); |
mio | 0:f3f80a0695ff | 189 | WriteReg(0x50,0x80); |
mio | 0:f3f80a0695ff | 190 | WriteReg(0x51,0x00); |
mio | 0:f3f80a0695ff | 191 | WriteReg(0x52,0x22); |
mio | 0:f3f80a0695ff | 192 | WriteReg(0x53,0x5e); |
mio | 0:f3f80a0695ff | 193 | WriteReg(0x54,0x80); |
mio | 0:f3f80a0695ff | 194 | WriteReg(0x56,0x40); |
mio | 0:f3f80a0695ff | 195 | WriteReg(0x58,0x9e); |
mio | 0:f3f80a0695ff | 196 | WriteReg(0x59,0x88); |
mio | 0:f3f80a0695ff | 197 | WriteReg(0x5a,0x88); |
mio | 0:f3f80a0695ff | 198 | WriteReg(0x5b,0x44); |
mio | 0:f3f80a0695ff | 199 | WriteReg(0x5c,0x67); |
mio | 0:f3f80a0695ff | 200 | WriteReg(0x5d,0x49); |
mio | 0:f3f80a0695ff | 201 | WriteReg(0x5e,0x0e); |
mio | 0:f3f80a0695ff | 202 | WriteReg(0x69,0x00); |
mio | 0:f3f80a0695ff | 203 | WriteReg(0x6a,0x40); |
mio | 0:f3f80a0695ff | 204 | WriteReg(0x6b,0x0a); |
mio | 0:f3f80a0695ff | 205 | WriteReg(0x6c,0x0a); |
mio | 0:f3f80a0695ff | 206 | WriteReg(0x6d,0x55); |
mio | 0:f3f80a0695ff | 207 | WriteReg(0x6e,0x11); |
mio | 0:f3f80a0695ff | 208 | WriteReg(0x6f,0x9f); |
mio | 0:f3f80a0695ff | 209 | |
mio | 0:f3f80a0695ff | 210 | WriteReg(0xb0,0x84); |
kangmingyo | 2:e98408458d2b | 211 | } |
kangmingyo | 2:e98408458d2b | 212 | void InitQVGAYUV(bool flipv,bool fliph) |
kangmingyo | 2:e98408458d2b | 213 | { |
kangmingyo | 2:e98408458d2b | 214 | WriteReg(REG_COM7, 0x00); // YUV |
kangmingyo | 2:e98408458d2b | 215 | WriteReg(REG_COM17, 0x00); // color bar disable |
kangmingyo | 2:e98408458d2b | 216 | WriteReg(REG_COM3, 0x0C); |
kangmingyo | 2:e98408458d2b | 217 | WriteReg(0x12, 0x00);//COM7 |
kangmingyo | 2:e98408458d2b | 218 | WriteReg(0x8C, 0x00);//RGB444 |
kangmingyo | 2:e98408458d2b | 219 | WriteReg(0x04, 0x00);//COM1 |
kangmingyo | 2:e98408458d2b | 220 | WriteReg(0x40, 0xC0);//COM15 |
kangmingyo | 2:e98408458d2b | 221 | WriteReg(0x14, 0x1A);//COM9 |
kangmingyo | 2:e98408458d2b | 222 | WriteReg(0x3D, 0x40);//COM13 |
kangmingyo | 2:e98408458d2b | 223 | |
kangmingyo | 2:e98408458d2b | 224 | WriteReg(REG_COM15, 0xC0); |
kangmingyo | 2:e98408458d2b | 225 | WriteReg(REG_COM14, 0x1a); // divide by 4 |
kangmingyo | 2:e98408458d2b | 226 | WriteReg(0x72, 0x22); // downsample by 4 |
kangmingyo | 2:e98408458d2b | 227 | WriteReg(0x73, 0xf2); // divide by 4 |
kangmingyo | 2:e98408458d2b | 228 | WriteReg(REG_HREF, 0xa4); |
kangmingyo | 2:e98408458d2b | 229 | WriteReg(REG_HSTART, 0x16); |
kangmingyo | 2:e98408458d2b | 230 | WriteReg(REG_HSTOP, 0x04); |
kangmingyo | 2:e98408458d2b | 231 | WriteReg(REG_VREF, 0x0a); |
kangmingyo | 2:e98408458d2b | 232 | WriteReg(REG_VSTART, 0x02); |
kangmingyo | 2:e98408458d2b | 233 | WriteReg(REG_VSTOP, 0x7a); |
kangmingyo | 2:e98408458d2b | 234 | |
kangmingyo | 2:e98408458d2b | 235 | WriteReg(0x7a, 0x20); |
kangmingyo | 2:e98408458d2b | 236 | WriteReg(0x7b, 0x1c); |
kangmingyo | 2:e98408458d2b | 237 | WriteReg(0x7c, 0x28); |
kangmingyo | 2:e98408458d2b | 238 | WriteReg(0x7d, 0x3c); |
kangmingyo | 2:e98408458d2b | 239 | WriteReg(0x7e, 0x5a); |
kangmingyo | 2:e98408458d2b | 240 | WriteReg(0x7f, 0x68); |
kangmingyo | 2:e98408458d2b | 241 | WriteReg(0x80, 0x76); |
kangmingyo | 2:e98408458d2b | 242 | WriteReg(0x81, 0x80); |
kangmingyo | 2:e98408458d2b | 243 | WriteReg(0x82, 0x88); |
kangmingyo | 2:e98408458d2b | 244 | WriteReg(0x83, 0x8f); |
kangmingyo | 2:e98408458d2b | 245 | WriteReg(0x84, 0x96); |
kangmingyo | 2:e98408458d2b | 246 | WriteReg(0x85, 0xa3); |
kangmingyo | 2:e98408458d2b | 247 | WriteReg(0x86, 0xaf); |
kangmingyo | 2:e98408458d2b | 248 | WriteReg(0x87, 0xc4); |
kangmingyo | 2:e98408458d2b | 249 | WriteReg(0x88, 0xd7); |
kangmingyo | 2:e98408458d2b | 250 | WriteReg(0x89, 0xe8); |
kangmingyo | 2:e98408458d2b | 251 | |
kangmingyo | 2:e98408458d2b | 252 | WriteReg(0x13, 0xe0); |
kangmingyo | 2:e98408458d2b | 253 | WriteReg(0x00, 0x00); |
kangmingyo | 2:e98408458d2b | 254 | WriteReg(0x10, 0x00); |
kangmingyo | 2:e98408458d2b | 255 | WriteReg(0x0d, 0x40); |
kangmingyo | 2:e98408458d2b | 256 | WriteReg(0x14, 0x18); |
kangmingyo | 2:e98408458d2b | 257 | WriteReg(0xa5, 0x05); |
kangmingyo | 2:e98408458d2b | 258 | WriteReg(0xab, 0x07); |
kangmingyo | 2:e98408458d2b | 259 | WriteReg(0x24, 0x95); |
kangmingyo | 2:e98408458d2b | 260 | WriteReg(0x25, 0x33); |
kangmingyo | 2:e98408458d2b | 261 | WriteReg(0x26, 0xe3); |
kangmingyo | 2:e98408458d2b | 262 | WriteReg(0x9f, 0x78); |
kangmingyo | 2:e98408458d2b | 263 | WriteReg(0xa0, 0x68); |
kangmingyo | 2:e98408458d2b | 264 | WriteReg(0xa1, 0x03); |
kangmingyo | 2:e98408458d2b | 265 | WriteReg(0xa6, 0xd8); |
kangmingyo | 2:e98408458d2b | 266 | WriteReg(0xa7, 0xd8); |
kangmingyo | 2:e98408458d2b | 267 | WriteReg(0xa8, 0xf0); |
kangmingyo | 2:e98408458d2b | 268 | WriteReg(0xa9, 0x90); |
kangmingyo | 2:e98408458d2b | 269 | WriteReg(0xaa, 0x94); |
kangmingyo | 2:e98408458d2b | 270 | WriteReg(0x13, 0xe5); |
kangmingyo | 2:e98408458d2b | 271 | |
kangmingyo | 2:e98408458d2b | 272 | WriteReg(0x0e, 0x61); |
kangmingyo | 2:e98408458d2b | 273 | WriteReg(0x0f, 0x4b); |
kangmingyo | 2:e98408458d2b | 274 | WriteReg(0x16, 0x02); |
kangmingyo | 2:e98408458d2b | 275 | |
kangmingyo | 2:e98408458d2b | 276 | WriteReg(0x21, 0x02); |
kangmingyo | 2:e98408458d2b | 277 | WriteReg(0x22, 0x91); |
kangmingyo | 2:e98408458d2b | 278 | WriteReg(0x29, 0x07); |
kangmingyo | 2:e98408458d2b | 279 | WriteReg(0x33, 0x0b); |
kangmingyo | 2:e98408458d2b | 280 | WriteReg(0x35, 0x0b); |
kangmingyo | 2:e98408458d2b | 281 | WriteReg(0x37, 0x1d); |
kangmingyo | 2:e98408458d2b | 282 | WriteReg(0x38, 0x71); |
kangmingyo | 2:e98408458d2b | 283 | WriteReg(0x39, 0x2a); |
kangmingyo | 2:e98408458d2b | 284 | WriteReg(0x3c, 0x78); |
kangmingyo | 2:e98408458d2b | 285 | WriteReg(0x4d, 0x40); |
kangmingyo | 2:e98408458d2b | 286 | WriteReg(0x4e, 0x20); |
kangmingyo | 2:e98408458d2b | 287 | WriteReg(0x69, 0x00); |
kangmingyo | 2:e98408458d2b | 288 | |
kangmingyo | 2:e98408458d2b | 289 | WriteReg(0x74, 0x10); |
kangmingyo | 2:e98408458d2b | 290 | WriteReg(0x8d, 0x4f); |
kangmingyo | 2:e98408458d2b | 291 | WriteReg(0x8e, 0x00); |
kangmingyo | 2:e98408458d2b | 292 | WriteReg(0x8f, 0x00); |
kangmingyo | 2:e98408458d2b | 293 | WriteReg(0x90, 0x00); |
kangmingyo | 2:e98408458d2b | 294 | WriteReg(0x91, 0x00); |
kangmingyo | 2:e98408458d2b | 295 | WriteReg(0x92, 0x00); |
kangmingyo | 2:e98408458d2b | 296 | |
kangmingyo | 2:e98408458d2b | 297 | WriteReg(0x96, 0x00); |
kangmingyo | 2:e98408458d2b | 298 | WriteReg(0x9a, 0x80); |
kangmingyo | 2:e98408458d2b | 299 | WriteReg(0xb0, 0x84); |
kangmingyo | 2:e98408458d2b | 300 | WriteReg(0xb1, 0x0c); |
kangmingyo | 2:e98408458d2b | 301 | WriteReg(0xb2, 0x0e); |
kangmingyo | 2:e98408458d2b | 302 | WriteReg(0xb3, 0x82); |
kangmingyo | 2:e98408458d2b | 303 | WriteReg(0xb8, 0x0a); |
kangmingyo | 2:e98408458d2b | 304 | |
kangmingyo | 2:e98408458d2b | 305 | WriteReg(0x43, 0x0a); |
kangmingyo | 2:e98408458d2b | 306 | WriteReg(0x44, 0xf0); |
kangmingyo | 2:e98408458d2b | 307 | WriteReg(0x45, 0x34); |
kangmingyo | 2:e98408458d2b | 308 | WriteReg(0x46, 0x58); |
kangmingyo | 2:e98408458d2b | 309 | WriteReg(0x47, 0x28); |
kangmingyo | 2:e98408458d2b | 310 | WriteReg(0x48, 0x3a); |
kangmingyo | 2:e98408458d2b | 311 | WriteReg(0x59, 0x88); |
kangmingyo | 2:e98408458d2b | 312 | WriteReg(0x5a, 0x88); |
kangmingyo | 2:e98408458d2b | 313 | WriteReg(0x5b, 0x44); |
kangmingyo | 2:e98408458d2b | 314 | WriteReg(0x5c, 0x67); |
kangmingyo | 2:e98408458d2b | 315 | WriteReg(0x5d, 0x49); |
kangmingyo | 2:e98408458d2b | 316 | WriteReg(0x5e, 0x0e); |
kangmingyo | 2:e98408458d2b | 317 | WriteReg(0x64, 0x04); |
kangmingyo | 2:e98408458d2b | 318 | WriteReg(0x65, 0x20); |
kangmingyo | 2:e98408458d2b | 319 | WriteReg(0x66, 0x05); |
kangmingyo | 2:e98408458d2b | 320 | WriteReg(0x94, 0x04); |
kangmingyo | 2:e98408458d2b | 321 | WriteReg(0x95, 0x08); |
kangmingyo | 2:e98408458d2b | 322 | |
kangmingyo | 2:e98408458d2b | 323 | WriteReg(0x6c, 0x0a); |
kangmingyo | 2:e98408458d2b | 324 | WriteReg(0x6d, 0x55); |
kangmingyo | 2:e98408458d2b | 325 | WriteReg(0x6e, 0x11); |
kangmingyo | 2:e98408458d2b | 326 | WriteReg(0x6f, 0x9f); |
kangmingyo | 2:e98408458d2b | 327 | WriteReg(0x6a, 0x40); |
kangmingyo | 2:e98408458d2b | 328 | WriteReg(0x01, 0x40); |
kangmingyo | 2:e98408458d2b | 329 | WriteReg(0x02, 0x40); |
kangmingyo | 2:e98408458d2b | 330 | WriteReg(0x13, 0xe7); |
kangmingyo | 2:e98408458d2b | 331 | WriteReg(0x15, 0x02); |
kangmingyo | 2:e98408458d2b | 332 | |
kangmingyo | 2:e98408458d2b | 333 | WriteReg(0x4f, 0x80); |
kangmingyo | 2:e98408458d2b | 334 | WriteReg(0x50, 0x80); |
kangmingyo | 2:e98408458d2b | 335 | WriteReg(0x51, 0x00); |
kangmingyo | 2:e98408458d2b | 336 | WriteReg(0x52, 0x22); |
kangmingyo | 2:e98408458d2b | 337 | WriteReg(0x53, 0x5e); |
kangmingyo | 2:e98408458d2b | 338 | WriteReg(0x54, 0x80); |
kangmingyo | 2:e98408458d2b | 339 | WriteReg(0x58, 0x9e); |
kangmingyo | 2:e98408458d2b | 340 | |
kangmingyo | 2:e98408458d2b | 341 | WriteReg(0x41, 0x08); |
kangmingyo | 2:e98408458d2b | 342 | WriteReg(0x3f, 0x00); |
kangmingyo | 2:e98408458d2b | 343 | WriteReg(0x75, 0x05); |
kangmingyo | 2:e98408458d2b | 344 | WriteReg(0x76, 0xe1); |
kangmingyo | 2:e98408458d2b | 345 | WriteReg(0x4c, 0x00); |
kangmingyo | 2:e98408458d2b | 346 | WriteReg(0x77, 0x01); |
kangmingyo | 2:e98408458d2b | 347 | WriteReg(0x3d, 0xc1); |
kangmingyo | 2:e98408458d2b | 348 | WriteReg(0x4b, 0x09); |
kangmingyo | 2:e98408458d2b | 349 | WriteReg(0xc9, 0x60); |
kangmingyo | 2:e98408458d2b | 350 | WriteReg(0x41, 0x38); |
kangmingyo | 2:e98408458d2b | 351 | WriteReg(0x56, 0x40); |
kangmingyo | 2:e98408458d2b | 352 | |
kangmingyo | 2:e98408458d2b | 353 | WriteReg(0x34, 0x11); |
kangmingyo | 2:e98408458d2b | 354 | WriteReg(0x3b, 0x02); |
kangmingyo | 2:e98408458d2b | 355 | WriteReg(0xa4, 0x88); |
kangmingyo | 2:e98408458d2b | 356 | WriteReg(0x96, 0x00); |
kangmingyo | 2:e98408458d2b | 357 | WriteReg(0x97, 0x30); |
kangmingyo | 2:e98408458d2b | 358 | WriteReg(0x98, 0x20); |
kangmingyo | 2:e98408458d2b | 359 | WriteReg(0x99, 0x30); |
kangmingyo | 2:e98408458d2b | 360 | WriteReg(0x9a, 0x84); |
kangmingyo | 2:e98408458d2b | 361 | WriteReg(0x9b, 0x29); |
kangmingyo | 2:e98408458d2b | 362 | WriteReg(0x9c, 0x03); |
kangmingyo | 2:e98408458d2b | 363 | WriteReg(0x9d, 0x4c); |
kangmingyo | 2:e98408458d2b | 364 | WriteReg(0x9e, 0x3f); |
kangmingyo | 2:e98408458d2b | 365 | WriteReg(0x78, 0x04); |
kangmingyo | 2:e98408458d2b | 366 | |
kangmingyo | 2:e98408458d2b | 367 | WriteReg(0x79, 0x01); |
kangmingyo | 2:e98408458d2b | 368 | WriteReg(0xc8, 0xf0); |
kangmingyo | 2:e98408458d2b | 369 | WriteReg(0x79, 0x0f); |
kangmingyo | 2:e98408458d2b | 370 | WriteReg(0xc8, 0x00); |
kangmingyo | 2:e98408458d2b | 371 | WriteReg(0x79, 0x10); |
kangmingyo | 2:e98408458d2b | 372 | WriteReg(0xc8, 0x7e); |
kangmingyo | 2:e98408458d2b | 373 | WriteReg(0x79, 0x0a); |
kangmingyo | 2:e98408458d2b | 374 | WriteReg(0xc8, 0x80); |
kangmingyo | 2:e98408458d2b | 375 | WriteReg(0x79, 0x0b); |
kangmingyo | 2:e98408458d2b | 376 | WriteReg(0xc8, 0x01); |
kangmingyo | 2:e98408458d2b | 377 | WriteReg(0x79, 0x0c); |
kangmingyo | 2:e98408458d2b | 378 | WriteReg(0xc8, 0x0f); |
kangmingyo | 2:e98408458d2b | 379 | WriteReg(0x79, 0x0d); |
kangmingyo | 2:e98408458d2b | 380 | WriteReg(0xc8, 0x20); |
kangmingyo | 2:e98408458d2b | 381 | WriteReg(0x79, 0x09); |
kangmingyo | 2:e98408458d2b | 382 | WriteReg(0xc8, 0x80); |
kangmingyo | 2:e98408458d2b | 383 | WriteReg(0x79, 0x02); |
kangmingyo | 2:e98408458d2b | 384 | WriteReg(0xc8, 0xc0); |
kangmingyo | 2:e98408458d2b | 385 | WriteReg(0x79, 0x03); |
kangmingyo | 2:e98408458d2b | 386 | WriteReg(0xc8, 0x40); |
kangmingyo | 2:e98408458d2b | 387 | WriteReg(0x79, 0x05); |
kangmingyo | 2:e98408458d2b | 388 | WriteReg(0xc8, 0x30); |
kangmingyo | 2:e98408458d2b | 389 | WriteReg(0x79, 0x26); |
kangmingyo | 2:e98408458d2b | 390 | WriteReg(0x09, 0x03); |
kangmingyo | 2:e98408458d2b | 391 | WriteReg(0x3b, 0x42); |
kangmingyo | 2:e98408458d2b | 392 | |
kangmingyo | 2:e98408458d2b | 393 | WriteReg(0xff, 0xff); /* END MARKER */ |
kangmingyo | 2:e98408458d2b | 394 | } |
mio | 0:f3f80a0695ff | 395 | |
mio | 0:f3f80a0695ff | 396 | |
mio | 0:f3f80a0695ff | 397 | // vsync handler |
mio | 0:f3f80a0695ff | 398 | void VsyncHandler(void) |
mio | 0:f3f80a0695ff | 399 | { |
mio | 0:f3f80a0695ff | 400 | // Capture Enable |
mio | 0:f3f80a0695ff | 401 | if (CaptureReq) { |
mio | 0:f3f80a0695ff | 402 | wen = 1 ; |
mio | 0:f3f80a0695ff | 403 | Done = false ; |
mio | 0:f3f80a0695ff | 404 | CaptureReq = false ; |
mio | 0:f3f80a0695ff | 405 | } else { |
mio | 0:f3f80a0695ff | 406 | wen = 0 ; |
mio | 0:f3f80a0695ff | 407 | if (Busy) { |
mio | 0:f3f80a0695ff | 408 | Busy = false ; |
mio | 0:f3f80a0695ff | 409 | Done = true ; |
mio | 0:f3f80a0695ff | 410 | } |
mio | 0:f3f80a0695ff | 411 | } |
mio | 0:f3f80a0695ff | 412 | |
mio | 0:f3f80a0695ff | 413 | // Hline Counter |
mio | 0:f3f80a0695ff | 414 | LastLines = LineCounter ; |
mio | 0:f3f80a0695ff | 415 | LineCounter = 0 ; |
mio | 0:f3f80a0695ff | 416 | } |
kangmingyo | 2:e98408458d2b | 417 | |
mio | 0:f3f80a0695ff | 418 | // href handler |
mio | 0:f3f80a0695ff | 419 | void HrefHandler(void) |
mio | 0:f3f80a0695ff | 420 | { |
mio | 0:f3f80a0695ff | 421 | LineCounter++ ; |
mio | 0:f3f80a0695ff | 422 | } |
kangmingyo | 2:e98408458d2b | 423 | |
mio | 0:f3f80a0695ff | 424 | // Data Read |
mio | 0:f3f80a0695ff | 425 | int ReadOneByte(void) |
mio | 0:f3f80a0695ff | 426 | { |
mio | 0:f3f80a0695ff | 427 | int result ; |
mio | 0:f3f80a0695ff | 428 | rclk = 1 ; |
mio | 0:f3f80a0695ff | 429 | // wait_us(1) ; |
mio | 0:f3f80a0695ff | 430 | result = data ; |
mio | 0:f3f80a0695ff | 431 | rclk = 0 ; |
mio | 0:f3f80a0695ff | 432 | return result ; |
mio | 0:f3f80a0695ff | 433 | } |
mio | 0:f3f80a0695ff | 434 | |
mio | 0:f3f80a0695ff | 435 | // Data Read (PortIn) |
mio | 0:f3f80a0695ff | 436 | int ReadOneWord(void) |
mio | 0:f3f80a0695ff | 437 | { |
kangmingyo | 2:e98408458d2b | 438 | // int r,r1,r2,r3,r4 ; |
kangmingyo | 2:e98408458d2b | 439 | // rclk = 1 ; |
kangmingyo | 2:e98408458d2b | 440 | // r = data ; |
kangmingyo | 2:e98408458d2b | 441 | // rclk = 0 ; |
kangmingyo | 2:e98408458d2b | 442 | // r1 = r & 0x07800000 ; |
kangmingyo | 2:e98408458d2b | 443 | // r1 = r1 >> (26-7-0) ; // bit26 to bit7 |
kangmingyo | 2:e98408458d2b | 444 | // r2 = r & 0x00078000 ; |
kangmingyo | 2:e98408458d2b | 445 | // r2 = r2 >> (18-3-0) ; // bit18 to bit3 |
kangmingyo | 2:e98408458d2b | 446 | // rclk = 1 ; |
kangmingyo | 2:e98408458d2b | 447 | // r = data ; |
kangmingyo | 2:e98408458d2b | 448 | // rclk = 0 ; |
kangmingyo | 2:e98408458d2b | 449 | // r3 = r & 0x07800000 ; |
kangmingyo | 2:e98408458d2b | 450 | // r3 = r3 >> (26-7-8) ; // bit26 to bit7 |
kangmingyo | 2:e98408458d2b | 451 | // r4 = r & 0x00078000 ; |
kangmingyo | 2:e98408458d2b | 452 | // r4 = r4 >> (18-3-8) ; // bit18 to bit3 |
kangmingyo | 2:e98408458d2b | 453 | |
kangmingyo | 2:e98408458d2b | 454 | int r,r1,r2; |
kangmingyo | 2:e98408458d2b | 455 | rclk=1; |
kangmingyo | 2:e98408458d2b | 456 | r = data; |
kangmingyo | 2:e98408458d2b | 457 | rclk=0; |
kangmingyo | 2:e98408458d2b | 458 | r1 = r<<8; |
kangmingyo | 2:e98408458d2b | 459 | rclk=1; |
kangmingyo | 2:e98408458d2b | 460 | r= data; |
kangmingyo | 2:e98408458d2b | 461 | rclk=0; |
kangmingyo | 2:e98408458d2b | 462 | r2 = r; |
kangmingyo | 2:e98408458d2b | 463 | |
kangmingyo | 2:e98408458d2b | 464 | |
kangmingyo | 2:e98408458d2b | 465 | return r2+r1 ; |
mio | 0:f3f80a0695ff | 466 | } |
kangmingyo | 2:e98408458d2b | 467 | |
mio | 0:f3f80a0695ff | 468 | // Data Start |
mio | 0:f3f80a0695ff | 469 | void ReadStart(void) |
kangmingyo | 2:e98408458d2b | 470 | { |
mio | 0:f3f80a0695ff | 471 | rrst = 0 ; |
mio | 0:f3f80a0695ff | 472 | oe = 0 ; |
mio | 0:f3f80a0695ff | 473 | wait_us(1) ; |
mio | 0:f3f80a0695ff | 474 | rclk = 0 ; |
mio | 0:f3f80a0695ff | 475 | wait_us(1) ; |
mio | 0:f3f80a0695ff | 476 | rclk = 1 ; |
kangmingyo | 2:e98408458d2b | 477 | wait_us(1) ; |
mio | 0:f3f80a0695ff | 478 | rrst = 1 ; |
mio | 0:f3f80a0695ff | 479 | } |
kangmingyo | 2:e98408458d2b | 480 | |
mio | 0:f3f80a0695ff | 481 | // Data Stop |
mio | 0:f3f80a0695ff | 482 | void ReadStop(void) |
mio | 0:f3f80a0695ff | 483 | { |
mio | 0:f3f80a0695ff | 484 | oe = 1 ; |
mio | 0:f3f80a0695ff | 485 | ReadOneByte() ; |
mio | 0:f3f80a0695ff | 486 | rclk = 1 ; |
mio | 0:f3f80a0695ff | 487 | } |
mio | 0:f3f80a0695ff | 488 | }; |