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Dependencies: SDFileSystem mbed
Fork of PES4_Programme by
source/main.cpp@53:1c61cadbcb35, 2018-03-30 (annotated)
- Committer:
- cittecla
- Date:
- Fri Mar 30 11:22:20 2018 +0000
- Revision:
- 53:1c61cadbcb35
- Parent:
- 52:701d0c2f47d7
- Child:
- 55:bdab541f434d
added readMedication() to sdcard.cpp;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
cittecla | 3:94026b29e994 | 1 | #include "main.h" |
cittecla | 2:72886e996098 | 2 | |
itslinear | 17:bbafd216e059 | 3 | |
cittecla | 52:701d0c2f47d7 | 4 | int state = 44; |
cittecla | 41:f054a83f9556 | 5 | int oldState; |
cittecla | 2:72886e996098 | 6 | |
cittecla | 2:72886e996098 | 7 | Serial pc(USBTX, USBRX); // tx, rx |
aeschsim | 40:b5e533e1e033 | 8 | |
aeschsim | 40:b5e533e1e033 | 9 | /* PWM Test Tool */ |
aeschsim | 40:b5e533e1e033 | 10 | int channel; |
aeschsim | 40:b5e533e1e033 | 11 | int dutyCycle; |
cittecla | 2:72886e996098 | 12 | |
cittecla | 2:72886e996098 | 13 | int main() |
cittecla | 2:72886e996098 | 14 | { |
cittecla | 2:72886e996098 | 15 | pc.baud(460800); |
cittecla | 2:72886e996098 | 16 | printf("start...\r\n"); |
cittecla | 2:72886e996098 | 17 | |
aeschsim | 34:9d6dd3a12641 | 18 | while(1) { |
cittecla | 41:f054a83f9556 | 19 | if(state != oldState) { |
aeschsim | 34:9d6dd3a12641 | 20 | printf("state: %d\r\n",state); |
cittecla | 41:f054a83f9556 | 21 | oldState = state; |
aeschsim | 34:9d6dd3a12641 | 22 | } |
aeschsim | 34:9d6dd3a12641 | 23 | switch (state) { |
aeschsim | 34:9d6dd3a12641 | 24 | case 0: |
aeschsim | 34:9d6dd3a12641 | 25 | printf("Hello World"); |
aeschsim | 40:b5e533e1e033 | 26 | state = 47; |
aeschsim | 34:9d6dd3a12641 | 27 | break; |
aeschsim | 34:9d6dd3a12641 | 28 | case 1: |
aeschsim | 34:9d6dd3a12641 | 29 | break; |
aeschsim | 34:9d6dd3a12641 | 30 | case 2: |
aeschsim | 34:9d6dd3a12641 | 31 | break; |
aeschsim | 34:9d6dd3a12641 | 32 | case 3: |
aeschsim | 34:9d6dd3a12641 | 33 | break; |
cittecla | 2:72886e996098 | 34 | |
aeschsim | 34:9d6dd3a12641 | 35 | case 10: |
aeschsim | 34:9d6dd3a12641 | 36 | break; |
aeschsim | 34:9d6dd3a12641 | 37 | case 11: |
aeschsim | 34:9d6dd3a12641 | 38 | break; |
cittecla | 2:72886e996098 | 39 | |
aeschsim | 34:9d6dd3a12641 | 40 | case 15: |
aeschsim | 34:9d6dd3a12641 | 41 | break; |
aeschsim | 34:9d6dd3a12641 | 42 | case 16: |
aeschsim | 34:9d6dd3a12641 | 43 | break; |
aeschsim | 34:9d6dd3a12641 | 44 | case 17: |
aeschsim | 34:9d6dd3a12641 | 45 | break; |
aeschsim | 34:9d6dd3a12641 | 46 | |
aeschsim | 34:9d6dd3a12641 | 47 | case 25: |
aeschsim | 34:9d6dd3a12641 | 48 | break; |
aeschsim | 34:9d6dd3a12641 | 49 | case 26: |
aeschsim | 34:9d6dd3a12641 | 50 | break; |
aeschsim | 34:9d6dd3a12641 | 51 | case 27: |
aeschsim | 34:9d6dd3a12641 | 52 | break; |
aeschsim | 34:9d6dd3a12641 | 53 | case 28: |
aeschsim | 34:9d6dd3a12641 | 54 | break; |
cittecla | 2:72886e996098 | 55 | |
cittecla | 2:72886e996098 | 56 | |
aeschsim | 34:9d6dd3a12641 | 57 | case 35: |
aeschsim | 34:9d6dd3a12641 | 58 | break; |
aeschsim | 34:9d6dd3a12641 | 59 | case 36: |
aeschsim | 34:9d6dd3a12641 | 60 | break; |
aeschsim | 34:9d6dd3a12641 | 61 | case 37: |
aeschsim | 34:9d6dd3a12641 | 62 | break; |
aeschsim | 34:9d6dd3a12641 | 63 | case 38: |
aeschsim | 34:9d6dd3a12641 | 64 | break; |
aeschsim | 27:bf0577ecfa6e | 65 | |
aeschsim | 40:b5e533e1e033 | 66 | /**************************************************************/ |
aeschsim | 40:b5e533e1e033 | 67 | /* Test Zone */ |
cittecla | 53:1c61cadbcb35 | 68 | |
cittecla | 52:701d0c2f47d7 | 69 | /* init PWM board */ |
cittecla | 52:701d0c2f47d7 | 70 | case 44: |
cittecla | 52:701d0c2f47d7 | 71 | pc.printf("Init PWM\r\n"); |
cittecla | 53:1c61cadbcb35 | 72 | initPWM(50); |
cittecla | 53:1c61cadbcb35 | 73 | enableOutput(); |
cittecla | 52:701d0c2f47d7 | 74 | state = 47; |
cittecla | 52:701d0c2f47d7 | 75 | break; |
aeschsim | 40:b5e533e1e033 | 76 | |
aeschsim | 40:b5e533e1e033 | 77 | /* Time test tool: set Time */ |
aeschsim | 34:9d6dd3a12641 | 78 | case 45: |
aeschsim | 34:9d6dd3a12641 | 79 | s_time time; |
aeschsim | 34:9d6dd3a12641 | 80 | time.second = 30; |
aeschsim | 34:9d6dd3a12641 | 81 | time.minute = 53; |
aeschsim | 34:9d6dd3a12641 | 82 | time.hour = 12; |
aeschsim | 34:9d6dd3a12641 | 83 | time.day = 27; |
aeschsim | 34:9d6dd3a12641 | 84 | time.weekday = 2; |
aeschsim | 34:9d6dd3a12641 | 85 | time.month = 3; |
aeschsim | 34:9d6dd3a12641 | 86 | time.year = 18; |
aeschsim | 34:9d6dd3a12641 | 87 | pc.printf("set now time\r\n"); |
aeschsim | 34:9d6dd3a12641 | 88 | setTime(&time); |
aeschsim | 35:a9bf045dc014 | 89 | pc.printf("read time: %02d:%02d:%02d, %02d.%02d.20%02d, weekday: %d\r\n",time.hour, time.minute, time.second, time.day, time.month, time.year, time.weekday); |
aeschsim | 40:b5e533e1e033 | 90 | state = 47; |
aeschsim | 34:9d6dd3a12641 | 91 | pc.printf("change state to: %d\r\n",state); |
aeschsim | 34:9d6dd3a12641 | 92 | break; |
aeschsim | 40:b5e533e1e033 | 93 | |
aeschsim | 40:b5e533e1e033 | 94 | /* Time test tool: get Time */ |
aeschsim | 34:9d6dd3a12641 | 95 | case 46: |
aeschsim | 34:9d6dd3a12641 | 96 | wait(5); |
aeschsim | 34:9d6dd3a12641 | 97 | time = getTime(); |
aeschsim | 35:a9bf045dc014 | 98 | pc.printf("read time: %02d:%02d:%02d, %02d.%02d.20%02d, weekday: %d\r\n",time.hour, time.minute, time.second, time.day, time.month, time.year, time.weekday); |
aeschsim | 40:b5e533e1e033 | 99 | state = 47; |
aeschsim | 40:b5e533e1e033 | 100 | break; |
aeschsim | 40:b5e533e1e033 | 101 | |
aeschsim | 40:b5e533e1e033 | 102 | /* Console State Switch */ |
aeschsim | 40:b5e533e1e033 | 103 | case 47: |
cittecla | 42:ba59ed6a2a06 | 104 | pc.printf("\n\rState Switch: Enter next State: \n\r"); |
cittecla | 53:1c61cadbcb35 | 105 | pc.printf("45\tset Time\n\r46\tread Time\n\r47\tState Switch\n\r48\tServo Board Test Tool\n\r49\tenable servo output\n\r50\tdisable servo output\n\r51\ttest SD Card\n\r52\tread medication\n\r"); |
aeschsim | 40:b5e533e1e033 | 106 | pc.scanf("%d", &state); |
aeschsim | 40:b5e533e1e033 | 107 | pc.printf("Switch to State %d\n\r",state); |
aeschsim | 40:b5e533e1e033 | 108 | fflush(stdin); |
aeschsim | 34:9d6dd3a12641 | 109 | break; |
aeschsim | 40:b5e533e1e033 | 110 | |
aeschsim | 40:b5e533e1e033 | 111 | /* Servo-Board Test Tool */ |
aeschsim | 34:9d6dd3a12641 | 112 | case 48: |
aeschsim | 46:cdc24a24e4e3 | 113 | pc.printf("\n\r\n\rServo-Board Test Tool\n\rEnter Channel Number and then Duty Cycle\n\r"); |
aeschsim | 46:cdc24a24e4e3 | 114 | pc.printf("for exit, enter Channel > 15\n\r"); |
aeschsim | 40:b5e533e1e033 | 115 | channel = 0; |
aeschsim | 40:b5e533e1e033 | 116 | while (channel < 16) { |
aeschsim | 40:b5e533e1e033 | 117 | pc.printf("Channel Number: "); |
aeschsim | 40:b5e533e1e033 | 118 | pc.scanf("%d", &channel); |
aeschsim | 46:cdc24a24e4e3 | 119 | pc.printf("\r\nchannel: %d\n\rDuty Cycle 0..4095: ",channel); |
aeschsim | 40:b5e533e1e033 | 120 | pc.scanf("%d", &dutyCycle); |
aeschsim | 46:cdc24a24e4e3 | 121 | pc.printf("\n\r%d\n\r",dutyCycle); |
aeschsim | 46:cdc24a24e4e3 | 122 | setPWM((char)channel, (int)dutyCycle); |
aeschsim | 40:b5e533e1e033 | 123 | fflush(stdin); |
aeschsim | 40:b5e533e1e033 | 124 | } |
aeschsim | 40:b5e533e1e033 | 125 | pc.printf("leave Servo-Board Test Tool\n\r"); |
aeschsim | 40:b5e533e1e033 | 126 | state = 47; |
aeschsim | 40:b5e533e1e033 | 127 | break; |
aeschsim | 40:b5e533e1e033 | 128 | |
aeschsim | 40:b5e533e1e033 | 129 | case 49: |
cittecla | 42:ba59ed6a2a06 | 130 | enableOutput(); |
cittecla | 42:ba59ed6a2a06 | 131 | pc.printf("Servo output enabled\r\n\n"); |
aeschsim | 40:b5e533e1e033 | 132 | state = 47; |
aeschsim | 34:9d6dd3a12641 | 133 | break; |
cittecla | 2:72886e996098 | 134 | |
aeschsim | 34:9d6dd3a12641 | 135 | case 50: |
cittecla | 42:ba59ed6a2a06 | 136 | disableOutput(); |
cittecla | 42:ba59ed6a2a06 | 137 | pc.printf("Servo output disabled\r\n\n"); |
aeschsim | 40:b5e533e1e033 | 138 | state = 47; |
aeschsim | 40:b5e533e1e033 | 139 | break; |
cittecla | 53:1c61cadbcb35 | 140 | |
cittecla | 42:ba59ed6a2a06 | 141 | case 51: |
cittecla | 52:701d0c2f47d7 | 142 | testSd(); |
cittecla | 52:701d0c2f47d7 | 143 | pc.printf("\rSD Card test finished\r\n\n"); |
cittecla | 42:ba59ed6a2a06 | 144 | state = 47; |
cittecla | 53:1c61cadbcb35 | 145 | break; |
aeschsim | 46:cdc24a24e4e3 | 146 | |
cittecla | 53:1c61cadbcb35 | 147 | case 52: |
cittecla | 53:1c61cadbcb35 | 148 | readMedication(0); |
cittecla | 53:1c61cadbcb35 | 149 | pc.printf("\rMedication testread finished\r\n\n"); |
cittecla | 53:1c61cadbcb35 | 150 | state = 47; |
cittecla | 53:1c61cadbcb35 | 151 | break; |
cittecla | 53:1c61cadbcb35 | 152 | |
aeschsim | 40:b5e533e1e033 | 153 | default: |
aeschsim | 40:b5e533e1e033 | 154 | state = 47; /* Go to State Switch */ |
aeschsim | 34:9d6dd3a12641 | 155 | break; |
aeschsim | 34:9d6dd3a12641 | 156 | } |
cittecla | 2:72886e996098 | 157 | } |
aeschsim | 34:9d6dd3a12641 | 158 | pc.printf("exit while 1 loop"); |
cittecla | 2:72886e996098 | 159 | } |