Diff: source/board.c

Revision:

0:dd702039127a

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/source/board.c	Thu Sep 20 19:16:34 2018 +0000
@@ -0,0 +1,66 @@
+#include "board.h"
+#include "fsl_gpio.h"
+#include "fsl_clock_config.h"
+#include "emwin_support.h"
+
+/* Initialize the LCD_DISP. */
+void BOARD_InitLcd(void)
+{
+    volatile uint32_t i = 0x100U;
+
+    gpio_pin_config_t config = {
+        kGPIO_DigitalOutput, 0,
+    };
+
+    /* Reset the LCD. */
+    GPIO_PinInit(LCD_DISP_GPIO, LCD_DISP_GPIO_PIN, &config);
+
+    GPIO_WritePinOutput(LCD_DISP_GPIO, LCD_DISP_GPIO_PIN, 0);
+
+    while (i--)
+    {
+    }
+
+    GPIO_WritePinOutput(LCD_DISP_GPIO, LCD_DISP_GPIO_PIN, 1);
+
+    /* Backlight. */
+    config.outputLogic = 1;
+    GPIO_PinInit(LCD_BL_GPIO, LCD_BL_GPIO_PIN, &config);
+
+    /*Clock setting for LPI2C*/
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, LPI2C_CLOCK_SOURCE_SELECT);
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, LPI2C_CLOCK_SOURCE_DIVIDER);
+}
+
+void BOARD_InitLcdifPixelClock(void)
+{
+    /*
+     * The desired output frame rate is 60Hz. So the pixel clock frequency is:
+     * (480 + 41 + 4 + 18) * (272 + 10 + 4 + 2) * 60 = 9.2M.
+     * Here set the LCDIF pixel clock to 9.3M.
+     */
+
+    /*
+     * Initialize the Video PLL.
+     * Video PLL output clock is OSC24M * (loopDivider + (denominator / numerator)) / postDivider = 93MHz.
+     */
+    clock_video_pll_config_t config = {
+        .loopDivider = 31, .postDivider = 8, .numerator = 0, .denominator = 0,
+    };
+
+    CLOCK_InitVideoPll(&config);
+
+    /*
+     * 000 derive clock from PLL2
+     * 001 derive clock from PLL3 PFD3
+     * 010 derive clock from PLL5
+     * 011 derive clock from PLL2 PFD0
+     * 100 derive clock from PLL2 PFD1
+     * 101 derive clock from PLL3 PFD1
+     */
+    CLOCK_SetMux(kCLOCK_LcdifPreMux, 2);
+
+    CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 4);
+
+    CLOCK_SetDiv(kCLOCK_LcdifDiv, 1);
+}