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reg_intm_glbl0_t Union Reference
INTM_GLBL0 Register. More...
#include <MAX77659_regs.h>
Detailed Description
INTM_GLBL0 Register.
Address : 0x09
Definition at line 209 of file MAX77659_regs.h.
Field Documentation
| unsigned char dod_rm |
LDO Dropout Detector Rising Interrupt Mask.
Bit 7. 0 = Unmasked. If DOD0_R goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to DOD0_R.
Definition at line 237 of file MAX77659_regs.h.
| unsigned char gpi0_fm |
GPI Falling Interrupt Mask.
Bit 0. 0 = Unmasked. If GPI_F goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to GPI_F.
Definition at line 212 of file MAX77659_regs.h.
| unsigned char gpi0_rm |
GPI Rising Interrupt Mask.
Bit 1. 0 = Unmasked. If GPI_R goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to GPI_R.
Definition at line 216 of file MAX77659_regs.h.
| unsigned char nen_fm |
nEN Falling Interrupt Mask.
Bit 2. 0 = Unmasked. If nEN_F goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to nEN_F.
Definition at line 220 of file MAX77659_regs.h.
| unsigned char nen_rm |
nEN Rising Interrupt Mask.
Bit 3. 0 = Unmasked. If nEN_R goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to nEN_R.
Definition at line 224 of file MAX77659_regs.h.
| unsigned char rsvd |
Reserved.
Unutilized bit. Write to 0. Reads are don't care. Bit 6.
Definition at line 236 of file MAX77659_regs.h.
| unsigned char tjal1_rm |
Thermal Alarm 1 Rising Interrupt Mask.
Bit 4. 0 = Unmasked. If TJAL1_R goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to TJAL1_R.
Definition at line 228 of file MAX77659_regs.h.
| unsigned char tjal2_rm |
Thermal Alarm 2 Rising Interrupt Mask.
Bit 5. 0 = Unmasked. If TJAL2_R goes from 0 to 1, then nIRQ goes low. nIRQ goes high when all interrupt bits are cleared. 1 = Masked. nIRQ does not go low due to TJAL2_R.
Definition at line 232 of file MAX77659_regs.h.
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