Maxim Integrated / OneWire

1-Wire® library for mbed. Complete 1-Wire library that supports our silicon masters along with a bit-bang master on the MAX32600MBED platform with one common interface for mbed. Slave support has also been included and more slaves will be added as time permits.

Dependents:   MAXREFDES131_Qt_Demo MAX32630FTHR_iButton_uSD_Logger MAX32630FTHR_DS18B20_uSD_Logger MAXREFDES130_131_Demo ... more

Superseded by MaximInterface.

Masters/DS2465/DS2465.cpp@76:84e6c4994e29, 2016-05-14 (annotated)

Committer:
IanBenzMaxim
Date:
Sat May 14 14:27:56 2016 -0500
Revision:
76:84e6c4994e29
Parent:
75:8b627804927c
Child:
78:0cbbac7f2016
Move ROM commands outside of OneWireMaster to increase cohesiveness of the class. Do not use subdivide OneWire namespace since it will likely not provide value on this project.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 75:8b627804927c 1 /******************************************************************//**
IanBenzMaxim 75:8b627804927c 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
IanBenzMaxim 75:8b627804927c 3 *
IanBenzMaxim 75:8b627804927c 4 * Permission is hereby granted, free of charge, to any person obtaining a
IanBenzMaxim 75:8b627804927c 5 * copy of this software and associated documentation files (the "Software"),
IanBenzMaxim 75:8b627804927c 6 * to deal in the Software without restriction, including without limitation
IanBenzMaxim 75:8b627804927c 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
IanBenzMaxim 75:8b627804927c 8 * and/or sell copies of the Software, and to permit persons to whom the
IanBenzMaxim 75:8b627804927c 9 * Software is furnished to do so, subject to the following conditions:
IanBenzMaxim 75:8b627804927c 10 *
IanBenzMaxim 75:8b627804927c 11 * The above copyright notice and this permission notice shall be included
IanBenzMaxim 75:8b627804927c 12 * in all copies or substantial portions of the Software.
IanBenzMaxim 75:8b627804927c 13 *
IanBenzMaxim 75:8b627804927c 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
IanBenzMaxim 75:8b627804927c 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
IanBenzMaxim 75:8b627804927c 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IanBenzMaxim 75:8b627804927c 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
IanBenzMaxim 75:8b627804927c 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
IanBenzMaxim 75:8b627804927c 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
IanBenzMaxim 75:8b627804927c 20 * OTHER DEALINGS IN THE SOFTWARE.
IanBenzMaxim 75:8b627804927c 21 *
IanBenzMaxim 75:8b627804927c 22 * Except as contained in this notice, the name of Maxim Integrated
IanBenzMaxim 75:8b627804927c 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
IanBenzMaxim 75:8b627804927c 24 * Products, Inc. Branding Policy.
IanBenzMaxim 75:8b627804927c 25 *
IanBenzMaxim 75:8b627804927c 26 * The mere transfer of this software does not imply any licenses
IanBenzMaxim 75:8b627804927c 27 * of trade secrets, proprietary technology, copyrights, patents,
IanBenzMaxim 75:8b627804927c 28 * trademarks, maskwork rights, or any other form of intellectual
IanBenzMaxim 75:8b627804927c 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
IanBenzMaxim 75:8b627804927c 30 * ownership rights.
IanBenzMaxim 75:8b627804927c 31 **********************************************************************/
IanBenzMaxim 75:8b627804927c 32
IanBenzMaxim 73:2cecc1372acc 33 #include "DS2465.h"
IanBenzMaxim 73:2cecc1372acc 34 #include "I2C.h"
IanBenzMaxim 73:2cecc1372acc 35 #include "wait_api.h"
IanBenzMaxim 21:00c94aeb533e 36
IanBenzMaxim 21:00c94aeb533e 37 #define I2C_WRITE 0
IanBenzMaxim 21:00c94aeb533e 38 #define I2C_READ 1
IanBenzMaxim 21:00c94aeb533e 39
IanBenzMaxim 21:00c94aeb533e 40 // DS2465 commands
IanBenzMaxim 21:00c94aeb533e 41 #define CMD_1WMR 0xF0
IanBenzMaxim 21:00c94aeb533e 42 #define CMD_WCFG 0xD2
IanBenzMaxim 21:00c94aeb533e 43 #define CMD_CHSL 0xC3
IanBenzMaxim 21:00c94aeb533e 44 #define CMD_SRP 0xE1
IanBenzMaxim 21:00c94aeb533e 45
IanBenzMaxim 21:00c94aeb533e 46 #define CMD_1WRS 0xB4
IanBenzMaxim 21:00c94aeb533e 47 #define CMD_1WWB 0xA5
IanBenzMaxim 21:00c94aeb533e 48 #define CMD_1WRB 0x96
IanBenzMaxim 21:00c94aeb533e 49 #define CMD_1WSB 0x87
IanBenzMaxim 21:00c94aeb533e 50 #define CMD_1WT 0x78
IanBenzMaxim 21:00c94aeb533e 51 #define CMD_1WTB 0x69
IanBenzMaxim 21:00c94aeb533e 52 #define CMD_1WRF 0xE1
IanBenzMaxim 21:00c94aeb533e 53 #define CMD_CPS 0x5A
IanBenzMaxim 21:00c94aeb533e 54 #define CMD_CSS 0x4B
IanBenzMaxim 21:00c94aeb533e 55 #define CMD_CSAM 0x3C
IanBenzMaxim 21:00c94aeb533e 56 #define CMD_CSWM 0x2D
IanBenzMaxim 21:00c94aeb533e 57 #define CMD_CNMS 0x1E
IanBenzMaxim 21:00c94aeb533e 58 #define CMD_SPR 0x0F
IanBenzMaxim 21:00c94aeb533e 59
IanBenzMaxim 21:00c94aeb533e 60 // DS2465 status bits
IanBenzMaxim 21:00c94aeb533e 61 #define STATUS_1WB 0x01
IanBenzMaxim 21:00c94aeb533e 62 #define STATUS_PPD 0x02
IanBenzMaxim 21:00c94aeb533e 63 #define STATUS_SD 0x04
IanBenzMaxim 21:00c94aeb533e 64 #define STATUS_LL 0x08
IanBenzMaxim 21:00c94aeb533e 65 #define STATUS_RST 0x10
IanBenzMaxim 21:00c94aeb533e 66 #define STATUS_SBR 0x20
IanBenzMaxim 21:00c94aeb533e 67 #define STATUS_TSB 0x40
IanBenzMaxim 21:00c94aeb533e 68 #define STATUS_DIR 0x80
IanBenzMaxim 21:00c94aeb533e 69
IanBenzMaxim 76:84e6c4994e29 70 using namespace OneWire;
IanBenzMaxim 73:2cecc1372acc 71
IanBenzMaxim 21:00c94aeb533e 72 static const int I2C_WRITE_OK = 0;
IanBenzMaxim 21:00c94aeb533e 73
IanBenzMaxim 73:2cecc1372acc 74 uint8_t DS2465::Config::readByte() const
IanBenzMaxim 24:8942d8478d68 75 {
IanBenzMaxim 74:23be10c32fa3 76 uint8_t config = 0;
IanBenzMaxim 74:23be10c32fa3 77 if (get1WS())
IanBenzMaxim 74:23be10c32fa3 78 {
IanBenzMaxim 74:23be10c32fa3 79 config |= 0x08;
IanBenzMaxim 74:23be10c32fa3 80 }
IanBenzMaxim 74:23be10c32fa3 81 if (getSPU())
IanBenzMaxim 74:23be10c32fa3 82 {
IanBenzMaxim 74:23be10c32fa3 83 config |= 0x04;
IanBenzMaxim 74:23be10c32fa3 84 }
IanBenzMaxim 74:23be10c32fa3 85 if (getPDN())
IanBenzMaxim 74:23be10c32fa3 86 {
IanBenzMaxim 74:23be10c32fa3 87 config |= 0x02;
IanBenzMaxim 74:23be10c32fa3 88 }
IanBenzMaxim 74:23be10c32fa3 89 if (getAPU())
IanBenzMaxim 74:23be10c32fa3 90 {
IanBenzMaxim 74:23be10c32fa3 91 config |= 0x01;
IanBenzMaxim 74:23be10c32fa3 92 }
IanBenzMaxim 74:23be10c32fa3 93 return config;
IanBenzMaxim 24:8942d8478d68 94 }
IanBenzMaxim 24:8942d8478d68 95
IanBenzMaxim 73:2cecc1372acc 96 uint8_t DS2465::Config::writeByte() const
IanBenzMaxim 24:8942d8478d68 97 {
IanBenzMaxim 74:23be10c32fa3 98 uint8_t config = readByte();
IanBenzMaxim 74:23be10c32fa3 99 return ((~config << 4) | config);
IanBenzMaxim 24:8942d8478d68 100 }
IanBenzMaxim 24:8942d8478d68 101
IanBenzMaxim 24:8942d8478d68 102 void DS2465::Config::reset()
IanBenzMaxim 24:8942d8478d68 103 {
IanBenzMaxim 74:23be10c32fa3 104 set1WS(false);
IanBenzMaxim 74:23be10c32fa3 105 setSPU(false);
IanBenzMaxim 74:23be10c32fa3 106 setPDN(false);
IanBenzMaxim 74:23be10c32fa3 107 setAPU(true);
IanBenzMaxim 24:8942d8478d68 108 }
IanBenzMaxim 24:8942d8478d68 109
IanBenzMaxim 73:2cecc1372acc 110 DS2465::DS2465(mbed::I2C & I2C_interface, uint8_t I2C_address)
IanBenzMaxim 74:23be10c32fa3 111 : m_I2C_interface(I2C_interface), m_I2C_address(I2C_address)
IanBenzMaxim 21:00c94aeb533e 112 {
IanBenzMaxim 74:23be10c32fa3 113
IanBenzMaxim 21:00c94aeb533e 114 }
IanBenzMaxim 21:00c94aeb533e 115
IanBenzMaxim 21:00c94aeb533e 116 OneWireMaster::CmdResult DS2465::OWInitMaster()
IanBenzMaxim 21:00c94aeb533e 117 {
IanBenzMaxim 74:23be10c32fa3 118 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 119
IanBenzMaxim 74:23be10c32fa3 120 // reset DS2465
IanBenzMaxim 74:23be10c32fa3 121 result = reset();
IanBenzMaxim 74:23be10c32fa3 122 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 123 {
IanBenzMaxim 74:23be10c32fa3 124 return result;
IanBenzMaxim 74:23be10c32fa3 125 }
IanBenzMaxim 74:23be10c32fa3 126
IanBenzMaxim 74:23be10c32fa3 127 // write the default configuration setup
IanBenzMaxim 74:23be10c32fa3 128 Config defaultConfig;
IanBenzMaxim 74:23be10c32fa3 129 result = writeConfig(defaultConfig, true);
IanBenzMaxim 47:307dc45952db 130 return result;
IanBenzMaxim 21:00c94aeb533e 131 }
IanBenzMaxim 21:00c94aeb533e 132
IanBenzMaxim 33:a4c015046956 133 OneWireMaster::CmdResult DS2465::computeNextMasterSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 134 {
IanBenzMaxim 74:23be10c32fa3 135 uint8_t command[2] = { CMD_CNMS, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 74:23be10c32fa3 136 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 137 }
IanBenzMaxim 21:00c94aeb533e 138
IanBenzMaxim 33:a4c015046956 139 OneWireMaster::CmdResult DS2465::computeWriteMac(bool regwrite, bool swap, unsigned int pageNum, unsigned int segmentNum) const
IanBenzMaxim 21:00c94aeb533e 140 {
IanBenzMaxim 74:23be10c32fa3 141 uint8_t command[2] = { CMD_CSWM, (uint8_t)((regwrite << 7) | (swap << 6) | (pageNum << 4) | segmentNum) };
IanBenzMaxim 74:23be10c32fa3 142 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 143 }
IanBenzMaxim 21:00c94aeb533e 144
IanBenzMaxim 33:a4c015046956 145 OneWireMaster::CmdResult DS2465::computeAuthMac(bool swap, unsigned int pageNum, PageRegion region) const
IanBenzMaxim 21:00c94aeb533e 146 {
IanBenzMaxim 74:23be10c32fa3 147 uint8_t command[2] = { CMD_CSAM, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 74:23be10c32fa3 148 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 149 }
IanBenzMaxim 21:00c94aeb533e 150
IanBenzMaxim 33:a4c015046956 151 OneWireMaster::CmdResult DS2465::computeSlaveSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 152 {
IanBenzMaxim 74:23be10c32fa3 153 uint8_t command[2] = { CMD_CSS, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 74:23be10c32fa3 154 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 155 }
IanBenzMaxim 21:00c94aeb533e 156
IanBenzMaxim 73:2cecc1372acc 157 ISha256MacCoproc::CmdResult DS2465::setMasterSecret(const Secret & masterSecret)
IanBenzMaxim 21:00c94aeb533e 158 {
IanBenzMaxim 74:23be10c32fa3 159 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 160 result = writeMemory(ADDR_SPAD, masterSecret, masterSecret.length);
IanBenzMaxim 74:23be10c32fa3 161 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 162 {
IanBenzMaxim 74:23be10c32fa3 163 result = copyScratchpadToSecret();
IanBenzMaxim 74:23be10c32fa3 164 }
IanBenzMaxim 74:23be10c32fa3 165 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 166 {
IanBenzMaxim 74:23be10c32fa3 167 wait_ms(eepromPageWriteDelayMs);
IanBenzMaxim 74:23be10c32fa3 168 }
IanBenzMaxim 74:23be10c32fa3 169 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 170 }
IanBenzMaxim 21:00c94aeb533e 171
IanBenzMaxim 73:2cecc1372acc 172 ISha256MacCoproc::CmdResult DS2465::computeWriteMac(const WriteMacData & writeMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 173 {
IanBenzMaxim 74:23be10c32fa3 174 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 175 // Write input data to scratchpad
IanBenzMaxim 74:23be10c32fa3 176 result = writeScratchpad(writeMacData, writeMacData.length);
IanBenzMaxim 74:23be10c32fa3 177 // Compute MAC
IanBenzMaxim 74:23be10c32fa3 178 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 179 {
IanBenzMaxim 74:23be10c32fa3 180 result = computeWriteMac(false);
IanBenzMaxim 74:23be10c32fa3 181 }
IanBenzMaxim 74:23be10c32fa3 182 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 183 {
IanBenzMaxim 74:23be10c32fa3 184 wait_ms(shaComputationDelayMs);
IanBenzMaxim 74:23be10c32fa3 185 // Read MAC from register
IanBenzMaxim 74:23be10c32fa3 186 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 74:23be10c32fa3 187 }
IanBenzMaxim 74:23be10c32fa3 188 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 189 }
IanBenzMaxim 21:00c94aeb533e 190
IanBenzMaxim 73:2cecc1372acc 191 ISha256MacCoproc::CmdResult DS2465::computeAuthMac(const DevicePage & devicePage, const DeviceScratchpad & challenge, const AuthMacData & authMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 192 {
IanBenzMaxim 74:23be10c32fa3 193 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 194 int addr = ADDR_SPAD;
IanBenzMaxim 74:23be10c32fa3 195 // Write input data to scratchpad
IanBenzMaxim 74:23be10c32fa3 196 result = cWriteMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 74:23be10c32fa3 197 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 198 {
IanBenzMaxim 74:23be10c32fa3 199 addr += devicePage.length;
IanBenzMaxim 74:23be10c32fa3 200 result = cWriteMemory(addr, challenge, challenge.length);
IanBenzMaxim 74:23be10c32fa3 201 }
IanBenzMaxim 74:23be10c32fa3 202 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 203 {
IanBenzMaxim 74:23be10c32fa3 204 addr += challenge.length;
IanBenzMaxim 74:23be10c32fa3 205 result = cWriteMemory(addr, authMacData, authMacData.length);
IanBenzMaxim 74:23be10c32fa3 206 }
IanBenzMaxim 74:23be10c32fa3 207 // Compute MAC
IanBenzMaxim 74:23be10c32fa3 208 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 209 {
IanBenzMaxim 74:23be10c32fa3 210 result = computeAuthMac();
IanBenzMaxim 74:23be10c32fa3 211 }
IanBenzMaxim 74:23be10c32fa3 212 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 213 {
IanBenzMaxim 74:23be10c32fa3 214 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 74:23be10c32fa3 215 // Read MAC from register
IanBenzMaxim 74:23be10c32fa3 216 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 74:23be10c32fa3 217 }
IanBenzMaxim 74:23be10c32fa3 218 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 219 }
IanBenzMaxim 21:00c94aeb533e 220
IanBenzMaxim 73:2cecc1372acc 221 ISha256MacCoproc::CmdResult DS2465::computeSlaveSecret(const DevicePage & devicePage, const DeviceScratchpad & deviceScratchpad, const SlaveSecretData & slaveSecretData)
IanBenzMaxim 21:00c94aeb533e 222 {
IanBenzMaxim 74:23be10c32fa3 223 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 224 int addr = ADDR_SPAD;
IanBenzMaxim 74:23be10c32fa3 225 // Write input data to scratchpad
IanBenzMaxim 74:23be10c32fa3 226 result = writeMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 74:23be10c32fa3 227 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 228 {
IanBenzMaxim 74:23be10c32fa3 229 addr += devicePage.length;
IanBenzMaxim 74:23be10c32fa3 230 result = writeMemory(addr, deviceScratchpad, deviceScratchpad.length);
IanBenzMaxim 74:23be10c32fa3 231 }
IanBenzMaxim 74:23be10c32fa3 232 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 233 {
IanBenzMaxim 74:23be10c32fa3 234 addr += deviceScratchpad.length;
IanBenzMaxim 74:23be10c32fa3 235 result = writeMemory(addr, slaveSecretData, slaveSecretData.length);
IanBenzMaxim 74:23be10c32fa3 236 }
IanBenzMaxim 74:23be10c32fa3 237 // Compute secret
IanBenzMaxim 74:23be10c32fa3 238 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 239 {
IanBenzMaxim 74:23be10c32fa3 240 result = computeSlaveSecret();
IanBenzMaxim 74:23be10c32fa3 241 }
IanBenzMaxim 74:23be10c32fa3 242 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 243 {
IanBenzMaxim 74:23be10c32fa3 244 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 74:23be10c32fa3 245 }
IanBenzMaxim 74:23be10c32fa3 246 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 247 }
IanBenzMaxim 21:00c94aeb533e 248
IanBenzMaxim 74:23be10c32fa3 249 OneWireMaster::CmdResult DS2465::copyScratchpad(bool destSecret, unsigned int pageNum, bool notFull, unsigned int segmentNum)
IanBenzMaxim 21:00c94aeb533e 250 {
IanBenzMaxim 74:23be10c32fa3 251 uint8_t command[2] = { CMD_CPS, (uint8_t)(destSecret ? 0 : (0x80 | (pageNum << 4) | (notFull << 3) | segmentNum)) };
IanBenzMaxim 74:23be10c32fa3 252 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 253 }
IanBenzMaxim 21:00c94aeb533e 254
IanBenzMaxim 34:11fffbe98ef9 255 OneWireMaster::CmdResult DS2465::configureLevel(OWLevel level)
IanBenzMaxim 26:a361e3f42ba5 256 {
IanBenzMaxim 74:23be10c32fa3 257 OneWireMaster::CmdResult result;
IanBenzMaxim 75:8b627804927c 258 if (m_curConfig.getSPU() != (level == StrongLevel))
IanBenzMaxim 74:23be10c32fa3 259 {
IanBenzMaxim 74:23be10c32fa3 260 Config newConfig = m_curConfig;
IanBenzMaxim 75:8b627804927c 261 newConfig.setSPU(level == StrongLevel);
IanBenzMaxim 74:23be10c32fa3 262 result = writeConfig(newConfig, true);
IanBenzMaxim 74:23be10c32fa3 263 }
IanBenzMaxim 74:23be10c32fa3 264 else
IanBenzMaxim 74:23be10c32fa3 265 {
IanBenzMaxim 74:23be10c32fa3 266 result = OneWireMaster::Success;
IanBenzMaxim 74:23be10c32fa3 267 }
IanBenzMaxim 74:23be10c32fa3 268 return result;
IanBenzMaxim 21:00c94aeb533e 269 }
IanBenzMaxim 21:00c94aeb533e 270
IanBenzMaxim 75:8b627804927c 271 OneWireMaster::CmdResult DS2465::OWSetLevel(OWLevel newLevel)
IanBenzMaxim 21:00c94aeb533e 272 {
IanBenzMaxim 75:8b627804927c 273 if (newLevel == StrongLevel)
IanBenzMaxim 74:23be10c32fa3 274 {
IanBenzMaxim 74:23be10c32fa3 275 return OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 276 }
IanBenzMaxim 74:23be10c32fa3 277
IanBenzMaxim 75:8b627804927c 278 return configureLevel(newLevel);
IanBenzMaxim 21:00c94aeb533e 279 }
IanBenzMaxim 21:00c94aeb533e 280
IanBenzMaxim 75:8b627804927c 281 OneWireMaster::CmdResult DS2465::OWSetSpeed(OWSpeed newSpeed)
IanBenzMaxim 21:00c94aeb533e 282 {
IanBenzMaxim 74:23be10c32fa3 283 // Requested speed is already set
IanBenzMaxim 75:8b627804927c 284 if (m_curConfig.get1WS() == (newSpeed == OverdriveSpeed))
IanBenzMaxim 74:23be10c32fa3 285 {
IanBenzMaxim 74:23be10c32fa3 286 return OneWireMaster::Success;
IanBenzMaxim 74:23be10c32fa3 287 }
IanBenzMaxim 21:00c94aeb533e 288
IanBenzMaxim 74:23be10c32fa3 289 // set the speed
IanBenzMaxim 74:23be10c32fa3 290 Config newConfig = m_curConfig;
IanBenzMaxim 75:8b627804927c 291 newConfig.set1WS(newSpeed == OverdriveSpeed);
IanBenzMaxim 74:23be10c32fa3 292
IanBenzMaxim 74:23be10c32fa3 293 // write the new config
IanBenzMaxim 74:23be10c32fa3 294 return writeConfig(newConfig, true);
IanBenzMaxim 21:00c94aeb533e 295 }
IanBenzMaxim 21:00c94aeb533e 296
IanBenzMaxim 75:8b627804927c 297 OneWireMaster::CmdResult DS2465::OWTriplet(SearchDirection & searchDirection, uint8_t & sbr, uint8_t & tsb)
IanBenzMaxim 21:00c94aeb533e 298 {
IanBenzMaxim 74:23be10c32fa3 299 // 1-Wire Triplet (Case B)
IanBenzMaxim 74:23be10c32fa3 300 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 301 // \--------/
IanBenzMaxim 74:23be10c32fa3 302 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 303 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 304 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 74:23be10c32fa3 305
IanBenzMaxim 74:23be10c32fa3 306 OneWireMaster::CmdResult result;
IanBenzMaxim 75:8b627804927c 307 uint8_t command[2] = { CMD_1WT, (uint8_t)((searchDirection == WriteOne) ? 0x80 : 0x00) };
IanBenzMaxim 74:23be10c32fa3 308 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 32:bce180b544ed 309 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 310 {
IanBenzMaxim 74:23be10c32fa3 311 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 312 result = pollBusy(&status);
IanBenzMaxim 74:23be10c32fa3 313 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 314 {
IanBenzMaxim 74:23be10c32fa3 315 // check bit results in status byte
IanBenzMaxim 74:23be10c32fa3 316 sbr = ((status & STATUS_SBR) == STATUS_SBR);
IanBenzMaxim 74:23be10c32fa3 317 tsb = ((status & STATUS_TSB) == STATUS_TSB);
IanBenzMaxim 75:8b627804927c 318 searchDirection = ((status & STATUS_DIR) == STATUS_DIR) ? WriteOne : WriteZero;
IanBenzMaxim 74:23be10c32fa3 319 }
IanBenzMaxim 32:bce180b544ed 320 }
IanBenzMaxim 74:23be10c32fa3 321 return result;
IanBenzMaxim 21:00c94aeb533e 322 }
IanBenzMaxim 21:00c94aeb533e 323
IanBenzMaxim 75:8b627804927c 324 OneWireMaster::CmdResult DS2465::OWReadBlock(uint8_t *recvBuf, uint8_t recvLen)
IanBenzMaxim 21:00c94aeb533e 325 {
IanBenzMaxim 74:23be10c32fa3 326 // 1-Wire Receive Block (Case A)
IanBenzMaxim 74:23be10c32fa3 327 // S AD,0 [A] ADDR_CMD_REG [A] 1WRF [A] PR [A] P
IanBenzMaxim 74:23be10c32fa3 328 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 329 // PR indicates byte containing parameter
IanBenzMaxim 74:23be10c32fa3 330
IanBenzMaxim 74:23be10c32fa3 331 OneWireMaster::CmdResult result;
IanBenzMaxim 75:8b627804927c 332 uint8_t command[2] = { CMD_1WRF, recvLen };
IanBenzMaxim 21:00c94aeb533e 333
IanBenzMaxim 74:23be10c32fa3 334 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 74:23be10c32fa3 335 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 336 {
IanBenzMaxim 74:23be10c32fa3 337 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 338 }
IanBenzMaxim 74:23be10c32fa3 339 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 340 {
IanBenzMaxim 75:8b627804927c 341 result = readMemory(ADDR_SPAD, recvBuf, recvLen, false);
IanBenzMaxim 74:23be10c32fa3 342 }
IanBenzMaxim 21:00c94aeb533e 343
IanBenzMaxim 74:23be10c32fa3 344 return result;
IanBenzMaxim 21:00c94aeb533e 345 }
IanBenzMaxim 21:00c94aeb533e 346
IanBenzMaxim 75:8b627804927c 347 OneWireMaster::CmdResult DS2465::OWWriteBlock(const uint8_t *sendBuf, uint8_t sendLen)
IanBenzMaxim 21:00c94aeb533e 348 {
IanBenzMaxim 75:8b627804927c 349 return OWWriteBlock(false, sendBuf, sendLen);
IanBenzMaxim 21:00c94aeb533e 350 }
IanBenzMaxim 21:00c94aeb533e 351
IanBenzMaxim 47:307dc45952db 352 OneWireMaster::CmdResult DS2465::OWWriteBlockMac()
IanBenzMaxim 47:307dc45952db 353 {
IanBenzMaxim 74:23be10c32fa3 354 return OWWriteBlock(true, NULL, 0);
IanBenzMaxim 47:307dc45952db 355 }
IanBenzMaxim 47:307dc45952db 356
IanBenzMaxim 73:2cecc1372acc 357 OneWireMaster::CmdResult DS2465::OWWriteBlock(bool tx_mac, const uint8_t *tran_buf, uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 358 {
IanBenzMaxim 74:23be10c32fa3 359 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 360 uint8_t command[2] = { CMD_1WTB, (uint8_t)(tx_mac ? 0xFF : tran_len) };
IanBenzMaxim 21:00c94aeb533e 361
IanBenzMaxim 74:23be10c32fa3 362 if (!tx_mac)
IanBenzMaxim 74:23be10c32fa3 363 {
IanBenzMaxim 74:23be10c32fa3 364 // prefill scratchpad with required data
IanBenzMaxim 74:23be10c32fa3 365 result = writeMemory(ADDR_SPAD, tran_buf, tran_len);
IanBenzMaxim 74:23be10c32fa3 366 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 367 {
IanBenzMaxim 74:23be10c32fa3 368 return result;
IanBenzMaxim 74:23be10c32fa3 369 }
IanBenzMaxim 74:23be10c32fa3 370 }
IanBenzMaxim 21:00c94aeb533e 371
IanBenzMaxim 74:23be10c32fa3 372 // 1-Wire Transmit Block (Case A)
IanBenzMaxim 74:23be10c32fa3 373 // S AD,0 [A] ADDR_CMD_REG [A] 1WTB [A] PR [A] P
IanBenzMaxim 74:23be10c32fa3 374 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 375 // PR indicates byte containing parameter
IanBenzMaxim 74:23be10c32fa3 376
IanBenzMaxim 74:23be10c32fa3 377 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 378
IanBenzMaxim 74:23be10c32fa3 379 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 380 {
IanBenzMaxim 74:23be10c32fa3 381 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 382 }
IanBenzMaxim 74:23be10c32fa3 383
IanBenzMaxim 74:23be10c32fa3 384 return result;
IanBenzMaxim 21:00c94aeb533e 385 }
IanBenzMaxim 21:00c94aeb533e 386
IanBenzMaxim 75:8b627804927c 387 OneWireMaster::CmdResult DS2465::OWReadByteSetLevel(uint8_t & recvByte, OWLevel afterLevel)
IanBenzMaxim 21:00c94aeb533e 388 {
IanBenzMaxim 74:23be10c32fa3 389 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 74:23be10c32fa3 390 // S AD,0 [A] ADDR_CMD_REG [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A
IanBenzMaxim 74:23be10c32fa3 391 // \--------/
IanBenzMaxim 74:23be10c32fa3 392 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 393 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 74:23be10c32fa3 394 //
IanBenzMaxim 74:23be10c32fa3 395 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 396 // DD data read
IanBenzMaxim 74:23be10c32fa3 397
IanBenzMaxim 74:23be10c32fa3 398 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 399 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 400
IanBenzMaxim 75:8b627804927c 401 result = configureLevel(afterLevel);
IanBenzMaxim 74:23be10c32fa3 402 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 403 {
IanBenzMaxim 74:23be10c32fa3 404 return result;
IanBenzMaxim 74:23be10c32fa3 405 }
IanBenzMaxim 74:23be10c32fa3 406
IanBenzMaxim 74:23be10c32fa3 407 buf = CMD_1WRB;
IanBenzMaxim 74:23be10c32fa3 408 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 74:23be10c32fa3 409
IanBenzMaxim 74:23be10c32fa3 410 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 411 {
IanBenzMaxim 74:23be10c32fa3 412 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 413 }
IanBenzMaxim 74:23be10c32fa3 414
IanBenzMaxim 74:23be10c32fa3 415 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 416 {
IanBenzMaxim 74:23be10c32fa3 417 result = readMemory(ADDR_DATA_REG, &buf, 1);
IanBenzMaxim 74:23be10c32fa3 418 }
IanBenzMaxim 74:23be10c32fa3 419
IanBenzMaxim 74:23be10c32fa3 420 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 421 {
IanBenzMaxim 75:8b627804927c 422 recvByte = buf;
IanBenzMaxim 74:23be10c32fa3 423 }
IanBenzMaxim 74:23be10c32fa3 424
IanBenzMaxim 26:a361e3f42ba5 425 return result;
IanBenzMaxim 21:00c94aeb533e 426 }
IanBenzMaxim 21:00c94aeb533e 427
IanBenzMaxim 75:8b627804927c 428 OneWireMaster::CmdResult DS2465::OWWriteByteSetLevel(uint8_t sendByte, OWLevel afterLevel)
IanBenzMaxim 74:23be10c32fa3 429 {
IanBenzMaxim 74:23be10c32fa3 430 // 1-Wire Write Byte (Case B)
IanBenzMaxim 74:23be10c32fa3 431 // S AD,0 [A] ADDR_CMD_REG [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 432 // \--------/
IanBenzMaxim 74:23be10c32fa3 433 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 434 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 435 // DD data to write
IanBenzMaxim 74:23be10c32fa3 436
IanBenzMaxim 74:23be10c32fa3 437 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 438
IanBenzMaxim 75:8b627804927c 439 result = configureLevel(afterLevel);
IanBenzMaxim 74:23be10c32fa3 440 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 441 {
IanBenzMaxim 74:23be10c32fa3 442 return result;
IanBenzMaxim 74:23be10c32fa3 443 }
IanBenzMaxim 74:23be10c32fa3 444
IanBenzMaxim 75:8b627804927c 445 uint8_t command[2] = { CMD_1WWB, sendByte };
IanBenzMaxim 74:23be10c32fa3 446
IanBenzMaxim 74:23be10c32fa3 447 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 74:23be10c32fa3 448 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 449 {
IanBenzMaxim 74:23be10c32fa3 450 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 451 }
IanBenzMaxim 74:23be10c32fa3 452
IanBenzMaxim 26:a361e3f42ba5 453 return result;
IanBenzMaxim 21:00c94aeb533e 454 }
IanBenzMaxim 21:00c94aeb533e 455
IanBenzMaxim 75:8b627804927c 456 OneWireMaster::CmdResult DS2465::OWTouchBitSetLevel(uint8_t & sendRecvBit, OWLevel afterLevel)
IanBenzMaxim 21:00c94aeb533e 457 {
IanBenzMaxim 74:23be10c32fa3 458 // 1-Wire bit (Case B)
IanBenzMaxim 74:23be10c32fa3 459 // S AD,0 [A] ADDR_CMD_REG [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 460 // \--------/
IanBenzMaxim 74:23be10c32fa3 461 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 462 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 463 // BB indicates byte containing bit value in msbit
IanBenzMaxim 74:23be10c32fa3 464
IanBenzMaxim 74:23be10c32fa3 465 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 466
IanBenzMaxim 75:8b627804927c 467 result = configureLevel(afterLevel);
IanBenzMaxim 74:23be10c32fa3 468 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 469 {
IanBenzMaxim 74:23be10c32fa3 470 return result;
IanBenzMaxim 74:23be10c32fa3 471 }
IanBenzMaxim 21:00c94aeb533e 472
IanBenzMaxim 75:8b627804927c 473 uint8_t command[2] = { CMD_1WSB, (uint8_t)(sendRecvBit ? 0x80 : 0x00) };
IanBenzMaxim 74:23be10c32fa3 474 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 475
IanBenzMaxim 74:23be10c32fa3 476 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 74:23be10c32fa3 477
IanBenzMaxim 74:23be10c32fa3 478 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 479 {
IanBenzMaxim 74:23be10c32fa3 480 result = pollBusy(&status);
IanBenzMaxim 74:23be10c32fa3 481 }
IanBenzMaxim 74:23be10c32fa3 482
IanBenzMaxim 74:23be10c32fa3 483 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 484 {
IanBenzMaxim 75:8b627804927c 485 sendRecvBit = (status & STATUS_SBR);
IanBenzMaxim 74:23be10c32fa3 486 }
IanBenzMaxim 74:23be10c32fa3 487
IanBenzMaxim 26:a361e3f42ba5 488 return result;
IanBenzMaxim 21:00c94aeb533e 489 }
IanBenzMaxim 21:00c94aeb533e 490
IanBenzMaxim 73:2cecc1372acc 491 OneWireMaster::CmdResult DS2465::cWriteMemory(uint8_t addr, const uint8_t * buf, size_t bufLen) const
IanBenzMaxim 21:00c94aeb533e 492 {
IanBenzMaxim 74:23be10c32fa3 493 int i;
IanBenzMaxim 21:00c94aeb533e 494
IanBenzMaxim 74:23be10c32fa3 495 // Write SRAM (Case A)
IanBenzMaxim 74:23be10c32fa3 496 // S AD,0 [A] VSA [A] DD [A] P
IanBenzMaxim 74:23be10c32fa3 497 // \-----/
IanBenzMaxim 74:23be10c32fa3 498 // Repeat for each data byte
IanBenzMaxim 74:23be10c32fa3 499 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 500 // VSA valid SRAM memory address
IanBenzMaxim 74:23be10c32fa3 501 // DD memory data to write
IanBenzMaxim 74:23be10c32fa3 502
IanBenzMaxim 74:23be10c32fa3 503 m_I2C_interface.start();
IanBenzMaxim 74:23be10c32fa3 504 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 505 {
IanBenzMaxim 21:00c94aeb533e 506 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 507 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 508 }
IanBenzMaxim 74:23be10c32fa3 509 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 510 {
IanBenzMaxim 74:23be10c32fa3 511 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 512 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 513 }
IanBenzMaxim 74:23be10c32fa3 514 // loop to write each byte
IanBenzMaxim 74:23be10c32fa3 515 for (i = 0; i < bufLen; i++)
IanBenzMaxim 74:23be10c32fa3 516 {
IanBenzMaxim 74:23be10c32fa3 517 if (m_I2C_interface.write(buf[i]) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 518 {
IanBenzMaxim 74:23be10c32fa3 519 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 520 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 521 }
IanBenzMaxim 74:23be10c32fa3 522 }
IanBenzMaxim 74:23be10c32fa3 523 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 524
IanBenzMaxim 74:23be10c32fa3 525 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 526 }
IanBenzMaxim 21:00c94aeb533e 527
IanBenzMaxim 73:2cecc1372acc 528 OneWireMaster::CmdResult DS2465::readMemory(uint8_t addr, uint8_t * buf, size_t bufLen, bool skipSetPointer) const
IanBenzMaxim 21:00c94aeb533e 529 {
IanBenzMaxim 74:23be10c32fa3 530 int i;
IanBenzMaxim 74:23be10c32fa3 531
IanBenzMaxim 74:23be10c32fa3 532 // Read (Case A)
IanBenzMaxim 74:23be10c32fa3 533 // S AD,0 [A] MA [A] Sr AD,1 [A] [DD] A [DD] A\ P
IanBenzMaxim 74:23be10c32fa3 534 // \-----/
IanBenzMaxim 74:23be10c32fa3 535 // Repeat for each data byte, NAK last byte
IanBenzMaxim 74:23be10c32fa3 536 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 537 // MA memory address
IanBenzMaxim 74:23be10c32fa3 538 // DD memory data read
IanBenzMaxim 21:00c94aeb533e 539
IanBenzMaxim 74:23be10c32fa3 540 m_I2C_interface.start();
IanBenzMaxim 74:23be10c32fa3 541 if (!skipSetPointer)
IanBenzMaxim 74:23be10c32fa3 542 {
IanBenzMaxim 74:23be10c32fa3 543 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 544 {
IanBenzMaxim 74:23be10c32fa3 545 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 546 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 547 }
IanBenzMaxim 74:23be10c32fa3 548 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 549 {
IanBenzMaxim 74:23be10c32fa3 550 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 551 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 552 }
IanBenzMaxim 74:23be10c32fa3 553 m_I2C_interface.start();
IanBenzMaxim 74:23be10c32fa3 554 }
IanBenzMaxim 21:00c94aeb533e 555
IanBenzMaxim 74:23be10c32fa3 556 if (m_I2C_interface.write((m_I2C_address | I2C_READ)) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 557 {
IanBenzMaxim 47:307dc45952db 558 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 559 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 560 }
IanBenzMaxim 74:23be10c32fa3 561 // loop to read each byte, NAK last byte
IanBenzMaxim 74:23be10c32fa3 562 for (i = 0; i < bufLen; i++)
IanBenzMaxim 74:23be10c32fa3 563 {
IanBenzMaxim 74:23be10c32fa3 564 buf[i] = m_I2C_interface.read((i == (bufLen - 1)) ? mbed::I2C::NoACK : mbed::I2C::ACK);
IanBenzMaxim 74:23be10c32fa3 565 }
IanBenzMaxim 74:23be10c32fa3 566 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 567
IanBenzMaxim 74:23be10c32fa3 568 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 569 }
IanBenzMaxim 21:00c94aeb533e 570
IanBenzMaxim 34:11fffbe98ef9 571 OneWireMaster::CmdResult DS2465::writeConfig(const Config & config, bool verify)
IanBenzMaxim 21:00c94aeb533e 572 {
IanBenzMaxim 74:23be10c32fa3 573 uint8_t configBuf;
IanBenzMaxim 74:23be10c32fa3 574 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 575
IanBenzMaxim 74:23be10c32fa3 576 configBuf = config.writeByte();
IanBenzMaxim 74:23be10c32fa3 577 result = writeMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 74:23be10c32fa3 578 if (verify)
IanBenzMaxim 74:23be10c32fa3 579 {
IanBenzMaxim 74:23be10c32fa3 580 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 581 {
IanBenzMaxim 74:23be10c32fa3 582 result = readMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 74:23be10c32fa3 583 }
IanBenzMaxim 74:23be10c32fa3 584 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 585 {
IanBenzMaxim 74:23be10c32fa3 586 if (configBuf != config.readByte())
IanBenzMaxim 74:23be10c32fa3 587 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 588 }
IanBenzMaxim 74:23be10c32fa3 589 }
IanBenzMaxim 74:23be10c32fa3 590
IanBenzMaxim 35:5d23395628f6 591 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 592 {
IanBenzMaxim 74:23be10c32fa3 593 m_curConfig = config;
IanBenzMaxim 35:5d23395628f6 594 }
IanBenzMaxim 35:5d23395628f6 595
IanBenzMaxim 74:23be10c32fa3 596 return result;
IanBenzMaxim 24:8942d8478d68 597 }
IanBenzMaxim 24:8942d8478d68 598
IanBenzMaxim 73:2cecc1372acc 599 OneWireMaster::CmdResult DS2465::pollBusy(uint8_t * pStatus)
IanBenzMaxim 24:8942d8478d68 600 {
IanBenzMaxim 74:23be10c32fa3 601 const unsigned int pollLimit = 200;
IanBenzMaxim 74:23be10c32fa3 602
IanBenzMaxim 74:23be10c32fa3 603 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 604 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 605 unsigned int pollCount = 0;
IanBenzMaxim 47:307dc45952db 606
IanBenzMaxim 74:23be10c32fa3 607 do
IanBenzMaxim 74:23be10c32fa3 608 {
IanBenzMaxim 74:23be10c32fa3 609 result = readMemory(ADDR_STATUS_REG, &status, 1, true);
IanBenzMaxim 74:23be10c32fa3 610 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 611 {
IanBenzMaxim 74:23be10c32fa3 612 return result;
IanBenzMaxim 74:23be10c32fa3 613 }
IanBenzMaxim 74:23be10c32fa3 614 if (pStatus != NULL)
IanBenzMaxim 74:23be10c32fa3 615 {
IanBenzMaxim 74:23be10c32fa3 616 *pStatus = status;
IanBenzMaxim 74:23be10c32fa3 617 }
IanBenzMaxim 74:23be10c32fa3 618 if (pollCount++ >= pollLimit)
IanBenzMaxim 74:23be10c32fa3 619 {
IanBenzMaxim 74:23be10c32fa3 620 return OneWireMaster::TimeoutError;
IanBenzMaxim 74:23be10c32fa3 621 }
IanBenzMaxim 74:23be10c32fa3 622 } while (status & STATUS_1WB);
IanBenzMaxim 24:8942d8478d68 623
IanBenzMaxim 74:23be10c32fa3 624 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 625 }
IanBenzMaxim 21:00c94aeb533e 626
IanBenzMaxim 75:8b627804927c 627 OneWireMaster::CmdResult DS2465::OWReset()
IanBenzMaxim 74:23be10c32fa3 628 {
IanBenzMaxim 74:23be10c32fa3 629 // 1-Wire reset (Case B)
IanBenzMaxim 74:23be10c32fa3 630 // S AD,0 [A] ADDR_CMD_REG [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 631 // \--------/
IanBenzMaxim 74:23be10c32fa3 632 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 633 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 634
IanBenzMaxim 74:23be10c32fa3 635 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 636 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 637
IanBenzMaxim 74:23be10c32fa3 638 buf = CMD_1WRS;
IanBenzMaxim 74:23be10c32fa3 639 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 640
IanBenzMaxim 74:23be10c32fa3 641 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 642 {
IanBenzMaxim 74:23be10c32fa3 643 result = pollBusy(&buf);
IanBenzMaxim 74:23be10c32fa3 644 }
IanBenzMaxim 21:00c94aeb533e 645
IanBenzMaxim 74:23be10c32fa3 646 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 647 {
IanBenzMaxim 74:23be10c32fa3 648 // check for presence detect
IanBenzMaxim 74:23be10c32fa3 649 if ((buf & STATUS_PPD) != STATUS_PPD)
IanBenzMaxim 74:23be10c32fa3 650 {
IanBenzMaxim 74:23be10c32fa3 651 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 652 }
IanBenzMaxim 74:23be10c32fa3 653 }
IanBenzMaxim 74:23be10c32fa3 654
IanBenzMaxim 74:23be10c32fa3 655 return result;
IanBenzMaxim 21:00c94aeb533e 656 }
IanBenzMaxim 21:00c94aeb533e 657
IanBenzMaxim 75:8b627804927c 658 OneWireMaster::CmdResult DS2465::reset()
IanBenzMaxim 74:23be10c32fa3 659 {
IanBenzMaxim 74:23be10c32fa3 660 // Device Reset
IanBenzMaxim 74:23be10c32fa3 661 // S AD,0 [A] ADDR_CMD_REG [A] 1WMR [A] Sr AD,1 [A] [SS] A\ P
IanBenzMaxim 74:23be10c32fa3 662 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 663 // SS status byte to read to verify state
IanBenzMaxim 74:23be10c32fa3 664
IanBenzMaxim 74:23be10c32fa3 665 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 666 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 667
IanBenzMaxim 74:23be10c32fa3 668 buf = CMD_1WMR;
IanBenzMaxim 74:23be10c32fa3 669 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 24:8942d8478d68 670
IanBenzMaxim 74:23be10c32fa3 671 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 672 {
IanBenzMaxim 74:23be10c32fa3 673 result = readMemory(ADDR_STATUS_REG, &buf, 1, true);
IanBenzMaxim 74:23be10c32fa3 674 }
IanBenzMaxim 21:00c94aeb533e 675
IanBenzMaxim 74:23be10c32fa3 676 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 677 {
IanBenzMaxim 74:23be10c32fa3 678 if ((buf & 0xF7) != 0x10)
IanBenzMaxim 74:23be10c32fa3 679 {
IanBenzMaxim 74:23be10c32fa3 680 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 681 }
IanBenzMaxim 74:23be10c32fa3 682 }
IanBenzMaxim 74:23be10c32fa3 683
IanBenzMaxim 74:23be10c32fa3 684 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 685 {
IanBenzMaxim 74:23be10c32fa3 686 OWReset(); // do a command to get 1-Wire master reset out of holding state
IanBenzMaxim 74:23be10c32fa3 687 }
IanBenzMaxim 74:23be10c32fa3 688
IanBenzMaxim 74:23be10c32fa3 689 return result;
IanBenzMaxim 21:00c94aeb533e 690 }