Maxim Integrated / OneWire

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Dependents:   MAXREFDES131_Qt_Demo MAX32630FTHR_iButton_uSD_Logger MAX32630FTHR_DS18B20_uSD_Logger MAXREFDES130_131_Demo ... more

OneWire_Masters/GPIO/owlink.s@63:422be898443a, 2016-04-19 (annotated)

Committer:
j3
Date:
Tue Apr 19 21:52:49 2016 +0000
Revision:
63:422be898443a
Parent:
59:f35aa61c59dd
Child:
66:5083a49163af
DS2480B development, working but needs work

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 63:422be898443a 1
j3 63:422be898443a 2 #if(TARGET_MAX32600)
IanBenzMaxim 52:4cba20c21941 3 // ow_usdelay configuration
IanBenzMaxim 40:590791ecac1c 4 #define PROC_CLOCK_MHZ (__SYSTEM_HFX / 1000000) // Processor clock in MHz
IanBenzMaxim 59:f35aa61c59dd 5 #define OVERHEAD_TUNING 18 // Fraction where OverheadTime(us) = OVERHEAD_TUNING / PROC_CLOCK_MHZ
IanBenzMaxim 31:7c684e49fa8f 6 // Make PROC_CLOCK_MHZ and OVERHEAD_TUNING divisible by PROC_CYCLES_PER_LOOP for best results
IanBenzMaxim 28:057bb14d3cee 7
IanBenzMaxim 52:4cba20c21941 8 // ow_usdelay constants
IanBenzMaxim 31:7c684e49fa8f 9 #define PIPELINE_REFILL_PROC_CYCLES 1 // ARM specifies 1-3 cycles for pipeline refill following a branch
IanBenzMaxim 31:7c684e49fa8f 10 #define PROC_CYCLES_PER_LOOP (2 + PIPELINE_REFILL_PROC_CYCLES)
IanBenzMaxim 31:7c684e49fa8f 11 #define LOOPS_PER_US (PROC_CLOCK_MHZ / PROC_CYCLES_PER_LOOP) // Number of loop passes for a 1 us delay
IanBenzMaxim 31:7c684e49fa8f 12 #define LOOPS_REMOVED_TUNING (OVERHEAD_TUNING / PROC_CYCLES_PER_LOOP)
IanBenzMaxim 46:afe466c96069 13
IanBenzMaxim 52:4cba20c21941 14 // OwTiming offsets
IanBenzMaxim 52:4cba20c21941 15 #define tRSTL_OFFSET 0
IanBenzMaxim 52:4cba20c21941 16 #define tMSP_OFFSET 2
IanBenzMaxim 52:4cba20c21941 17 #define tW0L_OFFSET 4
IanBenzMaxim 52:4cba20c21941 18 #define tW1L_OFFSET 6
IanBenzMaxim 52:4cba20c21941 19 #define tMSR_OFFSET 8
IanBenzMaxim 52:4cba20c21941 20 #define tSLOT_OFFSET 10
IanBenzMaxim 52:4cba20c21941 21
IanBenzMaxim 46:afe466c96069 22 // LABEL macro
IanBenzMaxim 46:afe466c96069 23 #ifdef TOOLCHAIN_GCC_ARM
IanBenzMaxim 46:afe466c96069 24 #define LABEL(x) x:
IanBenzMaxim 46:afe466c96069 25 #else // TOOLCHAIN_IAR or TOOLCHAIN_ARM_STD
IanBenzMaxim 46:afe466c96069 26 #define LABEL(x) x
IanBenzMaxim 46:afe466c96069 27 #endif
IanBenzMaxim 46:afe466c96069 28
IanBenzMaxim 46:afe466c96069 29 // EXPORT_LABEL macro
IanBenzMaxim 46:afe466c96069 30 #ifdef TOOLCHAIN_GCC_ARM
IanBenzMaxim 46:afe466c96069 31 #define EXPORT_LABEL(x) .global x
IanBenzMaxim 46:afe466c96069 32 #else // TOOLCHAIN_IAR or TOOLCHAIN_ARM_STD
IanBenzMaxim 46:afe466c96069 33 #define EXPORT_LABEL(x) EXPORT x
IanBenzMaxim 46:afe466c96069 34 #endif
IanBenzMaxim 46:afe466c96069 35
IanBenzMaxim 46:afe466c96069 36 // THUMB_FUNC macro
IanBenzMaxim 46:afe466c96069 37 #ifdef TOOLCHAIN_GCC_ARM
IanBenzMaxim 46:afe466c96069 38 #define THUMB_FUNC .thumb_func
IanBenzMaxim 46:afe466c96069 39 #else // TOOLCHAIN_IAR or TOOLCHAIN_ARM_STD
IanBenzMaxim 46:afe466c96069 40 #define THUMB_FUNC
IanBenzMaxim 46:afe466c96069 41 #endif
IanBenzMaxim 52:4cba20c21941 42
IanBenzMaxim 53:071ae5d090d1 43 // MACRO_ARM_BEGIN macro
IanBenzMaxim 53:071ae5d090d1 44 #ifdef TOOLCHAIN_ARM_STD
IanBenzMaxim 53:071ae5d090d1 45 #define MACRO_ARM_BEGIN MACRO
IanBenzMaxim 53:071ae5d090d1 46 #else // TOOLCHAIN_IAR or TOOLCHAIN_GCC_ARM
IanBenzMaxim 53:071ae5d090d1 47 #define MACRO_ARM_BEGIN
IanBenzMaxim 53:071ae5d090d1 48 #endif
IanBenzMaxim 53:071ae5d090d1 49
IanBenzMaxim 53:071ae5d090d1 50 // MACRO_BEGIN macro
IanBenzMaxim 53:071ae5d090d1 51 #if defined TOOLCHAIN_IAR
IanBenzMaxim 53:071ae5d090d1 52 #define MACRO_BEGIN(name) name MACRO
IanBenzMaxim 53:071ae5d090d1 53 #elif defined TOOLCHAIN_ARM_STD
IanBenzMaxim 53:071ae5d090d1 54 #define MACRO_BEGIN(name) $label name
IanBenzMaxim 53:071ae5d090d1 55 #else // TOOLCHAIN_GCC_ARM
IanBenzMaxim 53:071ae5d090d1 56 #define MACRO_BEGIN(name) .macro name
IanBenzMaxim 53:071ae5d090d1 57 #endif
IanBenzMaxim 53:071ae5d090d1 58
IanBenzMaxim 53:071ae5d090d1 59 // ENDM macro
IanBenzMaxim 53:071ae5d090d1 60 #if defined TOOLCHAIN_IAR
IanBenzMaxim 53:071ae5d090d1 61 // Use ENDM since IAR processes macros before #define directives.
IanBenzMaxim 53:071ae5d090d1 62 #elif defined TOOLCHAIN_ARM_STD
IanBenzMaxim 53:071ae5d090d1 63 #define ENDM MEND
IanBenzMaxim 53:071ae5d090d1 64 #else // TOOLCHAIN_GCC_ARM
IanBenzMaxim 53:071ae5d090d1 65 #define ENDM .endm
IanBenzMaxim 53:071ae5d090d1 66 #endif
IanBenzMaxim 53:071ae5d090d1 67
IanBenzMaxim 52:4cba20c21941 68 // Define a code section
IanBenzMaxim 31:7c684e49fa8f 69 #if defined TOOLCHAIN_IAR
IanBenzMaxim 30:fdd7a0f82f2f 70 SECTION owlink : CODE
IanBenzMaxim 31:7c684e49fa8f 71 #elif defined TOOLCHAIN_ARM_STD
IanBenzMaxim 29:5c51a17cfbf5 72 AREA owlink, CODE
IanBenzMaxim 31:7c684e49fa8f 73 #else // TOOLCHAIN_GCC_ARM
IanBenzMaxim 31:7c684e49fa8f 74 .syntax unified
IanBenzMaxim 31:7c684e49fa8f 75 .section .text
IanBenzMaxim 30:fdd7a0f82f2f 76 #endif
IanBenzMaxim 28:057bb14d3cee 77
IanBenzMaxim 31:7c684e49fa8f 78 // void ow_usdelay(unsigned int time_us)
IanBenzMaxim 46:afe466c96069 79 THUMB_FUNC
IanBenzMaxim 46:afe466c96069 80 EXPORT_LABEL(ow_usdelay)
IanBenzMaxim 46:afe466c96069 81 LABEL(ow_usdelay)
IanBenzMaxim 40:590791ecac1c 82 cmp R0, #0 // Return if time_us equals zero
IanBenzMaxim 52:4cba20c21941 83 beq ow_usdelay_return
IanBenzMaxim 52:4cba20c21941 84 mov R2, #LOOPS_PER_US
IanBenzMaxim 52:4cba20c21941 85 mul R0, R0, R2
IanBenzMaxim 28:057bb14d3cee 86 sub R0, R0, #LOOPS_REMOVED_TUNING
IanBenzMaxim 46:afe466c96069 87 LABEL(loop)
IanBenzMaxim 28:057bb14d3cee 88 subs R0, R0, #1
IanBenzMaxim 28:057bb14d3cee 89 bne loop
IanBenzMaxim 52:4cba20c21941 90 LABEL(ow_usdelay_return)
IanBenzMaxim 52:4cba20c21941 91 bx R14
IanBenzMaxim 52:4cba20c21941 92
IanBenzMaxim 52:4cba20c21941 93 // static void write_ow_gpio_low(unsigned int * portReg, unsigned int pinMask)
IanBenzMaxim 59:f35aa61c59dd 94 MACRO_ARM_BEGIN
IanBenzMaxim 59:f35aa61c59dd 95 MACRO_BEGIN(write_ow_gpio_low)
IanBenzMaxim 52:4cba20c21941 96 ldr R2, [R0]
IanBenzMaxim 52:4cba20c21941 97 bic R2, R2, R1
IanBenzMaxim 52:4cba20c21941 98 str R2, [R0]
IanBenzMaxim 59:f35aa61c59dd 99 ENDM
IanBenzMaxim 52:4cba20c21941 100
IanBenzMaxim 52:4cba20c21941 101 // static void write_ow_gpio_high(unsigned int * portReg, unsigned int pinMask)
IanBenzMaxim 59:f35aa61c59dd 102 MACRO_ARM_BEGIN
IanBenzMaxim 59:f35aa61c59dd 103 MACRO_BEGIN(write_ow_gpio_high)
IanBenzMaxim 52:4cba20c21941 104 ldr R2, [R0]
IanBenzMaxim 52:4cba20c21941 105 orr R2, R2, R1
IanBenzMaxim 52:4cba20c21941 106 str R2, [R0]
IanBenzMaxim 59:f35aa61c59dd 107 ENDM
IanBenzMaxim 52:4cba20c21941 108
IanBenzMaxim 53:071ae5d090d1 109 // void ow_bit(uint8_t * sendrecvbit, volatile uint32_t * inPortReg, volatile uint32_t * outPortReg, unsigned int pinMask, const OwTiming * timing)
IanBenzMaxim 52:4cba20c21941 110 THUMB_FUNC
IanBenzMaxim 52:4cba20c21941 111 EXPORT_LABEL(ow_bit)
IanBenzMaxim 52:4cba20c21941 112 LABEL(ow_bit)
IanBenzMaxim 52:4cba20c21941 113 push {R4-R8, R14}
IanBenzMaxim 52:4cba20c21941 114 // Retrive extra parameters from stack
IanBenzMaxim 52:4cba20c21941 115 add R6, SP, #24 // Find beginning of stack: 6 scratch registers * 4 bytes each
IanBenzMaxim 52:4cba20c21941 116 ldr R6, [R6] // Load timing struct
IanBenzMaxim 52:4cba20c21941 117 ldrh R4, [R6, #tSLOT_OFFSET]
IanBenzMaxim 52:4cba20c21941 118 ldrh R5, [R6, #tMSR_OFFSET]
IanBenzMaxim 52:4cba20c21941 119 // R0: sendrecvbit
IanBenzMaxim 52:4cba20c21941 120 // R1: inPortReg
IanBenzMaxim 52:4cba20c21941 121 // R2: outPortReg
IanBenzMaxim 52:4cba20c21941 122 // R3: pinMask
IanBenzMaxim 52:4cba20c21941 123 // R4: tSLOT
IanBenzMaxim 52:4cba20c21941 124 // R5: tMSR
IanBenzMaxim 52:4cba20c21941 125 // R6: timing
IanBenzMaxim 52:4cba20c21941 126 // R7: Scratch
IanBenzMaxim 52:4cba20c21941 127 // R8: Scratch
IanBenzMaxim 52:4cba20c21941 128 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 129
IanBenzMaxim 52:4cba20c21941 130 // Reorganize registers for upcoming function calls
IanBenzMaxim 52:4cba20c21941 131 mov R8, R1 // inPortReg to R8
IanBenzMaxim 52:4cba20c21941 132 mov R7, R2 // outPortReg to R7
IanBenzMaxim 52:4cba20c21941 133 mov R1, R3 // pinMask to R1
IanBenzMaxim 52:4cba20c21941 134 mov R3, R0 // sendrecvbit to R3
IanBenzMaxim 52:4cba20c21941 135 // R0: Scratch
IanBenzMaxim 52:4cba20c21941 136 // R1: pinMask
IanBenzMaxim 52:4cba20c21941 137 // R2: Scratch
IanBenzMaxim 52:4cba20c21941 138 // R3: sendrecvbit
IanBenzMaxim 52:4cba20c21941 139 // R4: tSLOT
IanBenzMaxim 52:4cba20c21941 140 // R5: tMSR
IanBenzMaxim 52:4cba20c21941 141 // R6: timing
IanBenzMaxim 52:4cba20c21941 142 // R7: outPortReg
IanBenzMaxim 52:4cba20c21941 143 // R8: inPortReg
IanBenzMaxim 52:4cba20c21941 144 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 145
IanBenzMaxim 52:4cba20c21941 146 // if (*sendrecvbit & 1)
IanBenzMaxim 52:4cba20c21941 147 ldrb R14, [R3]
IanBenzMaxim 52:4cba20c21941 148 tst R14, #1
IanBenzMaxim 52:4cba20c21941 149 beq write_zero
IanBenzMaxim 52:4cba20c21941 150 ldrh R6, [R6, #tW1L_OFFSET] // tW1L
IanBenzMaxim 52:4cba20c21941 151 sub R4, R4, R5 // tREC = tSLOT - tMSR
IanBenzMaxim 52:4cba20c21941 152 sub R5, R5, R6 // delay2 = tMSR - tLW1L
IanBenzMaxim 52:4cba20c21941 153 // R0: Scratch
IanBenzMaxim 52:4cba20c21941 154 // R1: pinMask
IanBenzMaxim 52:4cba20c21941 155 // R2: Scratch
IanBenzMaxim 52:4cba20c21941 156 // R3: sendrecvbit
IanBenzMaxim 52:4cba20c21941 157 // R4: tREC
IanBenzMaxim 52:4cba20c21941 158 // R5: delay2
IanBenzMaxim 52:4cba20c21941 159 // R6: tW1L
IanBenzMaxim 52:4cba20c21941 160 // R7: outPortReg
IanBenzMaxim 52:4cba20c21941 161 // R8: inPortReg
IanBenzMaxim 52:4cba20c21941 162 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 163 mov R0, R7 // outPortReg
IanBenzMaxim 59:f35aa61c59dd 164 write_ow_gpio_low // Pull low
IanBenzMaxim 52:4cba20c21941 165 mov R0, R6 // tLOW
IanBenzMaxim 52:4cba20c21941 166 bl ow_usdelay // Delay for tLOW
IanBenzMaxim 52:4cba20c21941 167 mov R0, R7 // outPortReg
IanBenzMaxim 59:f35aa61c59dd 168 write_ow_gpio_high // Release pin
IanBenzMaxim 52:4cba20c21941 169 mov R0, R5 // delay2
IanBenzMaxim 52:4cba20c21941 170 bl ow_usdelay // Delay for sample time
IanBenzMaxim 57:1635f247ceae 171 ldr R5, [R8] // Read *inPortReg
IanBenzMaxim 52:4cba20c21941 172 b recovery_delay
IanBenzMaxim 52:4cba20c21941 173 // else
IanBenzMaxim 52:4cba20c21941 174 LABEL(write_zero)
IanBenzMaxim 52:4cba20c21941 175 ldrh R6, [R6, #tW0L_OFFSET] // tW0L
IanBenzMaxim 52:4cba20c21941 176 sub R4, R4, R6 // tREC = tSLOT - tLW0L
IanBenzMaxim 52:4cba20c21941 177 sub R6, R6, R5 // delay2 = tW0L - tMSR
IanBenzMaxim 52:4cba20c21941 178 // R0: Scratch
IanBenzMaxim 52:4cba20c21941 179 // R1: pinMask
IanBenzMaxim 52:4cba20c21941 180 // R2: Scratch
IanBenzMaxim 52:4cba20c21941 181 // R3: sendrecvbit
IanBenzMaxim 52:4cba20c21941 182 // R4: tREC
IanBenzMaxim 52:4cba20c21941 183 // R5: tMSR
IanBenzMaxim 52:4cba20c21941 184 // R6: delay2
IanBenzMaxim 52:4cba20c21941 185 // R7: outPortReg
IanBenzMaxim 52:4cba20c21941 186 // R8: inPortReg
IanBenzMaxim 52:4cba20c21941 187 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 188 mov R0, R7 // outPortReg
IanBenzMaxim 59:f35aa61c59dd 189 write_ow_gpio_low // Pull low
IanBenzMaxim 52:4cba20c21941 190 mov R0, R5 // tMSR
IanBenzMaxim 52:4cba20c21941 191 bl ow_usdelay // Delay for tMSR
IanBenzMaxim 57:1635f247ceae 192 ldr R5, [R8] // Read *inPortReg
IanBenzMaxim 52:4cba20c21941 193 mov R0, R6 // delay2
IanBenzMaxim 52:4cba20c21941 194 bl ow_usdelay // Delay for release
IanBenzMaxim 52:4cba20c21941 195 mov R0, R7 // outPortReg
IanBenzMaxim 59:f35aa61c59dd 196 write_ow_gpio_high // Release pin
IanBenzMaxim 52:4cba20c21941 197 // endif (*sendrecvbit & 1)
IanBenzMaxim 52:4cba20c21941 198 // R0: Scratch
IanBenzMaxim 52:4cba20c21941 199 // R1: pinMask
IanBenzMaxim 52:4cba20c21941 200 // R2: Scratch
IanBenzMaxim 52:4cba20c21941 201 // R3: sendrecvbit
IanBenzMaxim 52:4cba20c21941 202 // R4: tREC
IanBenzMaxim 57:1635f247ceae 203 // R5: *inPortReg
IanBenzMaxim 52:4cba20c21941 204 // R6: Scratch
IanBenzMaxim 52:4cba20c21941 205 // R7: outPortReg
IanBenzMaxim 52:4cba20c21941 206 // R8: inPortReg
IanBenzMaxim 52:4cba20c21941 207 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 208
IanBenzMaxim 52:4cba20c21941 209 LABEL(recovery_delay)
IanBenzMaxim 52:4cba20c21941 210 mov R0, R4
IanBenzMaxim 52:4cba20c21941 211 bl ow_usdelay // Delay for tREC
IanBenzMaxim 52:4cba20c21941 212
IanBenzMaxim 57:1635f247ceae 213 // Parse received bit
IanBenzMaxim 57:1635f247ceae 214 // *sendrecvbit = ((*inPortReg & pinMask) == pinMask)
IanBenzMaxim 57:1635f247ceae 215 and R5, R5, R1
IanBenzMaxim 57:1635f247ceae 216 cmp R5, R1
IanBenzMaxim 57:1635f247ceae 217 ite eq
IanBenzMaxim 57:1635f247ceae 218 moveq R5, #1
IanBenzMaxim 57:1635f247ceae 219 movne R5, #0
IanBenzMaxim 52:4cba20c21941 220 strb R5, [R3]
IanBenzMaxim 57:1635f247ceae 221
IanBenzMaxim 52:4cba20c21941 222 pop {R4-R8, R14}
IanBenzMaxim 52:4cba20c21941 223 bx R14
j3 63:422be898443a 224
j3 63:422be898443a 225 #endif/* TARGET_MAX32600*/
IanBenzMaxim 31:7c684e49fa8f 226 #ifdef TOOLCHAIN_GCC_ARM
IanBenzMaxim 31:7c684e49fa8f 227 .end
IanBenzMaxim 31:7c684e49fa8f 228 #else // TOOLCHAIN_IAR or TOOLCHAIN_ARM_STD
IanBenzMaxim 31:7c684e49fa8f 229 END
IanBenzMaxim 40:590791ecac1c 230 #endif
j3 63:422be898443a 231
j3 63:422be898443a 232
j3 63:422be898443a 233