Maxim Integrated / OneWire

Dependents:   MAXREFDES131_Qt_Demo MAX32630FTHR_iButton_uSD_Logger MAX32630FTHR_DS18B20_uSD_Logger MAXREFDES130_131_Demo ... more

Committer:
IanBenzMaxim
Date:
Tue Apr 12 09:08:17 2016 -0500
Revision:
52:4cba20c21941
Parent:
46:afe466c96069
Child:
53:071ae5d090d1
Fixed bit-bang master. Implemented timing critical section of 1-Wire bit function in assembly for consistency accross all development environments.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 52:4cba20c21941 1 // ow_usdelay configuration
IanBenzMaxim 40:590791ecac1c 2 #define PROC_CLOCK_MHZ (__SYSTEM_HFX / 1000000) // Processor clock in MHz
IanBenzMaxim 31:7c684e49fa8f 3 #define OVERHEAD_TUNING 21 // Fraction where OverheadTime(us) = OVERHEAD_TUNING / PROC_CLOCK_MHZ
IanBenzMaxim 31:7c684e49fa8f 4 // Make PROC_CLOCK_MHZ and OVERHEAD_TUNING divisible by PROC_CYCLES_PER_LOOP for best results
IanBenzMaxim 28:057bb14d3cee 5
IanBenzMaxim 52:4cba20c21941 6 // ow_usdelay constants
IanBenzMaxim 31:7c684e49fa8f 7 #define PIPELINE_REFILL_PROC_CYCLES 1 // ARM specifies 1-3 cycles for pipeline refill following a branch
IanBenzMaxim 31:7c684e49fa8f 8 #define PROC_CYCLES_PER_LOOP (2 + PIPELINE_REFILL_PROC_CYCLES)
IanBenzMaxim 31:7c684e49fa8f 9 #define LOOPS_PER_US (PROC_CLOCK_MHZ / PROC_CYCLES_PER_LOOP) // Number of loop passes for a 1 us delay
IanBenzMaxim 31:7c684e49fa8f 10 #define LOOPS_REMOVED_TUNING (OVERHEAD_TUNING / PROC_CYCLES_PER_LOOP)
IanBenzMaxim 46:afe466c96069 11
IanBenzMaxim 52:4cba20c21941 12 // OwTiming offsets
IanBenzMaxim 52:4cba20c21941 13 #define tRSTL_OFFSET 0
IanBenzMaxim 52:4cba20c21941 14 #define tMSP_OFFSET 2
IanBenzMaxim 52:4cba20c21941 15 #define tW0L_OFFSET 4
IanBenzMaxim 52:4cba20c21941 16 #define tW1L_OFFSET 6
IanBenzMaxim 52:4cba20c21941 17 #define tMSR_OFFSET 8
IanBenzMaxim 52:4cba20c21941 18 #define tSLOT_OFFSET 10
IanBenzMaxim 52:4cba20c21941 19
IanBenzMaxim 46:afe466c96069 20 // LABEL macro
IanBenzMaxim 46:afe466c96069 21 #ifdef TOOLCHAIN_GCC_ARM
IanBenzMaxim 46:afe466c96069 22 #define LABEL(x) x:
IanBenzMaxim 46:afe466c96069 23 #else // TOOLCHAIN_IAR or TOOLCHAIN_ARM_STD
IanBenzMaxim 46:afe466c96069 24 #define LABEL(x) x
IanBenzMaxim 46:afe466c96069 25 #endif
IanBenzMaxim 46:afe466c96069 26
IanBenzMaxim 46:afe466c96069 27 // EXPORT_LABEL macro
IanBenzMaxim 46:afe466c96069 28 #ifdef TOOLCHAIN_GCC_ARM
IanBenzMaxim 46:afe466c96069 29 #define EXPORT_LABEL(x) .global x
IanBenzMaxim 46:afe466c96069 30 #else // TOOLCHAIN_IAR or TOOLCHAIN_ARM_STD
IanBenzMaxim 46:afe466c96069 31 #define EXPORT_LABEL(x) EXPORT x
IanBenzMaxim 46:afe466c96069 32 #endif
IanBenzMaxim 46:afe466c96069 33
IanBenzMaxim 46:afe466c96069 34 // THUMB_FUNC macro
IanBenzMaxim 46:afe466c96069 35 #ifdef TOOLCHAIN_GCC_ARM
IanBenzMaxim 46:afe466c96069 36 #define THUMB_FUNC .thumb_func
IanBenzMaxim 46:afe466c96069 37 #else // TOOLCHAIN_IAR or TOOLCHAIN_ARM_STD
IanBenzMaxim 46:afe466c96069 38 #define THUMB_FUNC
IanBenzMaxim 46:afe466c96069 39 #endif
IanBenzMaxim 52:4cba20c21941 40
IanBenzMaxim 52:4cba20c21941 41 // Define a code section
IanBenzMaxim 31:7c684e49fa8f 42 #if defined TOOLCHAIN_IAR
IanBenzMaxim 30:fdd7a0f82f2f 43 SECTION owlink : CODE
IanBenzMaxim 31:7c684e49fa8f 44 #elif defined TOOLCHAIN_ARM_STD
IanBenzMaxim 29:5c51a17cfbf5 45 AREA owlink, CODE
IanBenzMaxim 31:7c684e49fa8f 46 #else // TOOLCHAIN_GCC_ARM
IanBenzMaxim 31:7c684e49fa8f 47 .syntax unified
IanBenzMaxim 31:7c684e49fa8f 48 .section .text
IanBenzMaxim 30:fdd7a0f82f2f 49 #endif
IanBenzMaxim 28:057bb14d3cee 50
IanBenzMaxim 31:7c684e49fa8f 51 // void ow_usdelay(unsigned int time_us)
IanBenzMaxim 46:afe466c96069 52 THUMB_FUNC
IanBenzMaxim 46:afe466c96069 53 EXPORT_LABEL(ow_usdelay)
IanBenzMaxim 46:afe466c96069 54 LABEL(ow_usdelay)
IanBenzMaxim 40:590791ecac1c 55 cmp R0, #0 // Return if time_us equals zero
IanBenzMaxim 52:4cba20c21941 56 beq ow_usdelay_return
IanBenzMaxim 52:4cba20c21941 57 mov R2, #LOOPS_PER_US
IanBenzMaxim 52:4cba20c21941 58 mul R0, R0, R2
IanBenzMaxim 28:057bb14d3cee 59 sub R0, R0, #LOOPS_REMOVED_TUNING
IanBenzMaxim 46:afe466c96069 60 LABEL(loop)
IanBenzMaxim 28:057bb14d3cee 61 subs R0, R0, #1
IanBenzMaxim 28:057bb14d3cee 62 bne loop
IanBenzMaxim 52:4cba20c21941 63 LABEL(ow_usdelay_return)
IanBenzMaxim 52:4cba20c21941 64 bx R14
IanBenzMaxim 52:4cba20c21941 65
IanBenzMaxim 52:4cba20c21941 66 // static void write_ow_gpio_low(unsigned int * portReg, unsigned int pinMask)
IanBenzMaxim 52:4cba20c21941 67 THUMB_FUNC
IanBenzMaxim 52:4cba20c21941 68 LABEL(write_ow_gpio_low)
IanBenzMaxim 52:4cba20c21941 69 ldr R2, [R0]
IanBenzMaxim 52:4cba20c21941 70 bic R2, R2, R1
IanBenzMaxim 52:4cba20c21941 71 str R2, [R0]
IanBenzMaxim 52:4cba20c21941 72 bx R14
IanBenzMaxim 52:4cba20c21941 73
IanBenzMaxim 52:4cba20c21941 74 // static void write_ow_gpio_high(unsigned int * portReg, unsigned int pinMask)
IanBenzMaxim 52:4cba20c21941 75 THUMB_FUNC
IanBenzMaxim 52:4cba20c21941 76 LABEL(write_ow_gpio_high)
IanBenzMaxim 52:4cba20c21941 77 ldr R2, [R0]
IanBenzMaxim 52:4cba20c21941 78 orr R2, R2, R1
IanBenzMaxim 52:4cba20c21941 79 str R2, [R0]
IanBenzMaxim 52:4cba20c21941 80 bx R14
IanBenzMaxim 52:4cba20c21941 81
IanBenzMaxim 52:4cba20c21941 82 // static unsigned int read_ow_gpio(unsigned int * portReg, unsigned int pinMask)
IanBenzMaxim 52:4cba20c21941 83 THUMB_FUNC
IanBenzMaxim 52:4cba20c21941 84 LABEL(read_ow_gpio)
IanBenzMaxim 52:4cba20c21941 85 ldr R0, [R0]
IanBenzMaxim 52:4cba20c21941 86 and R0, R0, R1
IanBenzMaxim 28:057bb14d3cee 87 bx R14
IanBenzMaxim 28:057bb14d3cee 88
IanBenzMaxim 52:4cba20c21941 89 // void ow_bit(uint8_t * sendrecvbit, const unsigned int * inPortReg, unsigned int * outPortReg, unsigned int pinMask, const OwTiming * timing)
IanBenzMaxim 52:4cba20c21941 90 THUMB_FUNC
IanBenzMaxim 52:4cba20c21941 91 EXPORT_LABEL(ow_bit)
IanBenzMaxim 52:4cba20c21941 92 LABEL(ow_bit)
IanBenzMaxim 52:4cba20c21941 93 push {R4-R8, R14}
IanBenzMaxim 52:4cba20c21941 94 // Retrive extra parameters from stack
IanBenzMaxim 52:4cba20c21941 95 add R6, SP, #24 // Find beginning of stack: 6 scratch registers * 4 bytes each
IanBenzMaxim 52:4cba20c21941 96 ldr R6, [R6] // Load timing struct
IanBenzMaxim 52:4cba20c21941 97 ldrh R4, [R6, #tSLOT_OFFSET]
IanBenzMaxim 52:4cba20c21941 98 ldrh R5, [R6, #tMSR_OFFSET]
IanBenzMaxim 52:4cba20c21941 99 // R0: sendrecvbit
IanBenzMaxim 52:4cba20c21941 100 // R1: inPortReg
IanBenzMaxim 52:4cba20c21941 101 // R2: outPortReg
IanBenzMaxim 52:4cba20c21941 102 // R3: pinMask
IanBenzMaxim 52:4cba20c21941 103 // R4: tSLOT
IanBenzMaxim 52:4cba20c21941 104 // R5: tMSR
IanBenzMaxim 52:4cba20c21941 105 // R6: timing
IanBenzMaxim 52:4cba20c21941 106 // R7: Scratch
IanBenzMaxim 52:4cba20c21941 107 // R8: Scratch
IanBenzMaxim 52:4cba20c21941 108 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 109
IanBenzMaxim 52:4cba20c21941 110 // Reorganize registers for upcoming function calls
IanBenzMaxim 52:4cba20c21941 111 mov R8, R1 // inPortReg to R8
IanBenzMaxim 52:4cba20c21941 112 mov R7, R2 // outPortReg to R7
IanBenzMaxim 52:4cba20c21941 113 mov R1, R3 // pinMask to R1
IanBenzMaxim 52:4cba20c21941 114 mov R3, R0 // sendrecvbit to R3
IanBenzMaxim 52:4cba20c21941 115 // R0: Scratch
IanBenzMaxim 52:4cba20c21941 116 // R1: pinMask
IanBenzMaxim 52:4cba20c21941 117 // R2: Scratch
IanBenzMaxim 52:4cba20c21941 118 // R3: sendrecvbit
IanBenzMaxim 52:4cba20c21941 119 // R4: tSLOT
IanBenzMaxim 52:4cba20c21941 120 // R5: tMSR
IanBenzMaxim 52:4cba20c21941 121 // R6: timing
IanBenzMaxim 52:4cba20c21941 122 // R7: outPortReg
IanBenzMaxim 52:4cba20c21941 123 // R8: inPortReg
IanBenzMaxim 52:4cba20c21941 124 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 125
IanBenzMaxim 52:4cba20c21941 126 // if (*sendrecvbit & 1)
IanBenzMaxim 52:4cba20c21941 127 ldrb R14, [R3]
IanBenzMaxim 52:4cba20c21941 128 tst R14, #1
IanBenzMaxim 52:4cba20c21941 129 beq write_zero
IanBenzMaxim 52:4cba20c21941 130 ldrh R6, [R6, #tW1L_OFFSET] // tW1L
IanBenzMaxim 52:4cba20c21941 131 sub R4, R4, R5 // tREC = tSLOT - tMSR
IanBenzMaxim 52:4cba20c21941 132 sub R5, R5, R6 // delay2 = tMSR - tLW1L
IanBenzMaxim 52:4cba20c21941 133 // R0: Scratch
IanBenzMaxim 52:4cba20c21941 134 // R1: pinMask
IanBenzMaxim 52:4cba20c21941 135 // R2: Scratch
IanBenzMaxim 52:4cba20c21941 136 // R3: sendrecvbit
IanBenzMaxim 52:4cba20c21941 137 // R4: tREC
IanBenzMaxim 52:4cba20c21941 138 // R5: delay2
IanBenzMaxim 52:4cba20c21941 139 // R6: tW1L
IanBenzMaxim 52:4cba20c21941 140 // R7: outPortReg
IanBenzMaxim 52:4cba20c21941 141 // R8: inPortReg
IanBenzMaxim 52:4cba20c21941 142 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 143 mov R0, R7 // outPortReg
IanBenzMaxim 52:4cba20c21941 144 bl write_ow_gpio_low // Pull low
IanBenzMaxim 52:4cba20c21941 145 mov R0, R6 // tLOW
IanBenzMaxim 52:4cba20c21941 146 bl ow_usdelay // Delay for tLOW
IanBenzMaxim 52:4cba20c21941 147 mov R0, R7 // outPortReg
IanBenzMaxim 52:4cba20c21941 148 bl write_ow_gpio_high // Release pin
IanBenzMaxim 52:4cba20c21941 149 mov R0, R5 // delay2
IanBenzMaxim 52:4cba20c21941 150 bl ow_usdelay // Delay for sample time
IanBenzMaxim 52:4cba20c21941 151 mov R0, R8 // inPortReg
IanBenzMaxim 52:4cba20c21941 152 bl read_ow_gpio // Read pin
IanBenzMaxim 52:4cba20c21941 153 mov R5, R0 // Store read value for later
IanBenzMaxim 52:4cba20c21941 154 b recovery_delay
IanBenzMaxim 52:4cba20c21941 155 // else
IanBenzMaxim 52:4cba20c21941 156 LABEL(write_zero)
IanBenzMaxim 52:4cba20c21941 157 ldrh R6, [R6, #tW0L_OFFSET] // tW0L
IanBenzMaxim 52:4cba20c21941 158 sub R4, R4, R6 // tREC = tSLOT - tLW0L
IanBenzMaxim 52:4cba20c21941 159 sub R6, R6, R5 // delay2 = tW0L - tMSR
IanBenzMaxim 52:4cba20c21941 160 // R0: Scratch
IanBenzMaxim 52:4cba20c21941 161 // R1: pinMask
IanBenzMaxim 52:4cba20c21941 162 // R2: Scratch
IanBenzMaxim 52:4cba20c21941 163 // R3: sendrecvbit
IanBenzMaxim 52:4cba20c21941 164 // R4: tREC
IanBenzMaxim 52:4cba20c21941 165 // R5: tMSR
IanBenzMaxim 52:4cba20c21941 166 // R6: delay2
IanBenzMaxim 52:4cba20c21941 167 // R7: outPortReg
IanBenzMaxim 52:4cba20c21941 168 // R8: inPortReg
IanBenzMaxim 52:4cba20c21941 169 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 170 mov R0, R7 // outPortReg
IanBenzMaxim 52:4cba20c21941 171 bl write_ow_gpio_low // Pull low
IanBenzMaxim 52:4cba20c21941 172 mov R0, R5 // tMSR
IanBenzMaxim 52:4cba20c21941 173 bl ow_usdelay // Delay for tMSR
IanBenzMaxim 52:4cba20c21941 174 mov R0, R8 // inPortReg
IanBenzMaxim 52:4cba20c21941 175 bl read_ow_gpio // Read pin
IanBenzMaxim 52:4cba20c21941 176 mov R5, R0 // Store read value for later
IanBenzMaxim 52:4cba20c21941 177 mov R0, R6 // delay2
IanBenzMaxim 52:4cba20c21941 178 bl ow_usdelay // Delay for release
IanBenzMaxim 52:4cba20c21941 179 mov R0, R7 // outPortReg
IanBenzMaxim 52:4cba20c21941 180 bl write_ow_gpio_high // Release pin
IanBenzMaxim 52:4cba20c21941 181 // endif (*sendrecvbit & 1)
IanBenzMaxim 52:4cba20c21941 182 // R0: Scratch
IanBenzMaxim 52:4cba20c21941 183 // R1: pinMask
IanBenzMaxim 52:4cba20c21941 184 // R2: Scratch
IanBenzMaxim 52:4cba20c21941 185 // R3: sendrecvbit
IanBenzMaxim 52:4cba20c21941 186 // R4: tREC
IanBenzMaxim 52:4cba20c21941 187 // R5: read value
IanBenzMaxim 52:4cba20c21941 188 // R6: Scratch
IanBenzMaxim 52:4cba20c21941 189 // R7: outPortReg
IanBenzMaxim 52:4cba20c21941 190 // R8: inPortReg
IanBenzMaxim 52:4cba20c21941 191 // R14: Scratch
IanBenzMaxim 52:4cba20c21941 192
IanBenzMaxim 52:4cba20c21941 193 LABEL(recovery_delay)
IanBenzMaxim 52:4cba20c21941 194 mov R0, R4
IanBenzMaxim 52:4cba20c21941 195 bl ow_usdelay // Delay for tREC
IanBenzMaxim 52:4cba20c21941 196
IanBenzMaxim 52:4cba20c21941 197 strb R5, [R3]
IanBenzMaxim 52:4cba20c21941 198 pop {R4-R8, R14}
IanBenzMaxim 52:4cba20c21941 199 bx R14
IanBenzMaxim 31:7c684e49fa8f 200 #ifdef TOOLCHAIN_GCC_ARM
IanBenzMaxim 31:7c684e49fa8f 201 .end
IanBenzMaxim 31:7c684e49fa8f 202 #else // TOOLCHAIN_IAR or TOOLCHAIN_ARM_STD
IanBenzMaxim 31:7c684e49fa8f 203 END
IanBenzMaxim 40:590791ecac1c 204 #endif