Library for the master controller

Dependents:   Test_Controller_Master AEB

Committer:
AndreaAndreoli
Date:
Wed Jul 06 08:22:31 2016 +0000
Revision:
2:d114feef8f3b
Parent:
1:03ec2e1d1008
Child:
3:66d07e7a134a
added QA function

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AndreaAndreoli 0:8e9e8bee3cf4 1 /*
AndreaAndreoli 0:8e9e8bee3cf4 2 * Academic License - for use in teaching, academic research, and meeting
AndreaAndreoli 0:8e9e8bee3cf4 3 * course requirements at degree granting institutions only. Not for
AndreaAndreoli 0:8e9e8bee3cf4 4 * government, commercial, or other organizational use.
AndreaAndreoli 0:8e9e8bee3cf4 5 *
AndreaAndreoli 0:8e9e8bee3cf4 6 * File: Controller_Master.h
AndreaAndreoli 0:8e9e8bee3cf4 7 *
AndreaAndreoli 0:8e9e8bee3cf4 8 * Code generated for Simulink model 'Controller_Master'.
AndreaAndreoli 0:8e9e8bee3cf4 9 *
AndreaAndreoli 2:d114feef8f3b 10 * Model version : 1.6
AndreaAndreoli 0:8e9e8bee3cf4 11 * Simulink Coder version : 8.10 (R2016a) 10-Feb-2016
AndreaAndreoli 2:d114feef8f3b 12 * C/C++ source code generated on : Wed Jul 06 10:20:25 2016
AndreaAndreoli 0:8e9e8bee3cf4 13 *
AndreaAndreoli 0:8e9e8bee3cf4 14 * Target selection: ert.tlc
AndreaAndreoli 0:8e9e8bee3cf4 15 * Embedded hardware selection: NXP->Cortex-M4
AndreaAndreoli 0:8e9e8bee3cf4 16 * Code generation objectives: Unspecified
AndreaAndreoli 0:8e9e8bee3cf4 17 * Validation result: Not run
AndreaAndreoli 0:8e9e8bee3cf4 18 */
AndreaAndreoli 0:8e9e8bee3cf4 19
AndreaAndreoli 0:8e9e8bee3cf4 20 #ifndef RTW_HEADER_Controller_Master_h_
AndreaAndreoli 0:8e9e8bee3cf4 21 #define RTW_HEADER_Controller_Master_h_
AndreaAndreoli 0:8e9e8bee3cf4 22 #include <string.h>
AndreaAndreoli 0:8e9e8bee3cf4 23 #ifndef Controller_Master_COMMON_INCLUDES_
AndreaAndreoli 0:8e9e8bee3cf4 24 # define Controller_Master_COMMON_INCLUDES_
AndreaAndreoli 0:8e9e8bee3cf4 25 #include "rtwtypes.h"
AndreaAndreoli 0:8e9e8bee3cf4 26 #endif /* Controller_Master_COMMON_INCLUDES_ */
AndreaAndreoli 0:8e9e8bee3cf4 27
AndreaAndreoli 0:8e9e8bee3cf4 28 /* Macros for accessing real-time model data structure */
AndreaAndreoli 0:8e9e8bee3cf4 29 #ifndef rtmGetErrorStatus
AndreaAndreoli 0:8e9e8bee3cf4 30 # define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
AndreaAndreoli 0:8e9e8bee3cf4 31 #endif
AndreaAndreoli 0:8e9e8bee3cf4 32
AndreaAndreoli 0:8e9e8bee3cf4 33 #ifndef rtmSetErrorStatus
AndreaAndreoli 0:8e9e8bee3cf4 34 # define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
AndreaAndreoli 0:8e9e8bee3cf4 35 #endif
AndreaAndreoli 0:8e9e8bee3cf4 36
AndreaAndreoli 0:8e9e8bee3cf4 37 /* Forward declaration for rtModel */
AndreaAndreoli 0:8e9e8bee3cf4 38 typedef struct tag_RTM_Controller_Master_T RT_MODEL_Controller_Master_T;
AndreaAndreoli 0:8e9e8bee3cf4 39
AndreaAndreoli 0:8e9e8bee3cf4 40 /* Block signals (auto storage) */
AndreaAndreoli 0:8e9e8bee3cf4 41 typedef struct {
AndreaAndreoli 2:d114feef8f3b 42 real_T Led_Blue; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:8e9e8bee3cf4 43 } B_Controller_Master_T;
AndreaAndreoli 0:8e9e8bee3cf4 44
AndreaAndreoli 0:8e9e8bee3cf4 45 /* Block states (auto storage) for system '<Root>' */
AndreaAndreoli 0:8e9e8bee3cf4 46 typedef struct {
AndreaAndreoli 0:8e9e8bee3cf4 47 uint32_T temporalCounter_i1; /* '<S1>/select_command' */
AndreaAndreoli 0:8e9e8bee3cf4 48 uint8_T is_active_c2_Controller_Master;/* '<S1>/select_command' */
AndreaAndreoli 0:8e9e8bee3cf4 49 uint8_T is_c2_Controller_Master; /* '<S1>/select_command' */
AndreaAndreoli 0:8e9e8bee3cf4 50 uint8_T is_BLINK; /* '<S1>/select_command' */
AndreaAndreoli 2:d114feef8f3b 51 uint8_T is_active_c3_Controller_Master;/* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 52 uint8_T is_ERRORS_CHECK_THREAD; /* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 53 uint8_T is_APPLICATION_THREAD; /* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 54 uint8_T is_AEB_ACTIVE; /* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 55 uint8_T is_QA_ACTIVE; /* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 56 boolean_T En; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:8e9e8bee3cf4 57 } DW_Controller_Master_T;
AndreaAndreoli 0:8e9e8bee3cf4 58
AndreaAndreoli 0:8e9e8bee3cf4 59 /* Real-time Model Data Structure */
AndreaAndreoli 0:8e9e8bee3cf4 60 struct tag_RTM_Controller_Master_T {
AndreaAndreoli 0:8e9e8bee3cf4 61 const char_T * volatile errorStatus;
AndreaAndreoli 0:8e9e8bee3cf4 62
AndreaAndreoli 0:8e9e8bee3cf4 63 /*
AndreaAndreoli 0:8e9e8bee3cf4 64 * ModelData:
AndreaAndreoli 0:8e9e8bee3cf4 65 * The following substructure contains information regarding
AndreaAndreoli 0:8e9e8bee3cf4 66 * the data used in the model.
AndreaAndreoli 0:8e9e8bee3cf4 67 */
AndreaAndreoli 0:8e9e8bee3cf4 68 struct {
AndreaAndreoli 0:8e9e8bee3cf4 69 B_Controller_Master_T *blockIO;
AndreaAndreoli 0:8e9e8bee3cf4 70 DW_Controller_Master_T *dwork;
AndreaAndreoli 0:8e9e8bee3cf4 71 } ModelData;
AndreaAndreoli 0:8e9e8bee3cf4 72 };
AndreaAndreoli 0:8e9e8bee3cf4 73
AndreaAndreoli 0:8e9e8bee3cf4 74 /* Model entry point functions */
AndreaAndreoli 0:8e9e8bee3cf4 75 extern void Controller_Master_initialize(RT_MODEL_Controller_Master_T *const
AndreaAndreoli 0:8e9e8bee3cf4 76 Controller_Master_M, real_T *Controller_Master_U_V, real_T
AndreaAndreoli 2:d114feef8f3b 77 *Controller_Master_U_D_M, uint8_T *Controller_Master_U_Slave, boolean_T
AndreaAndreoli 2:d114feef8f3b 78 *Controller_Master_U_QA_EN, uint8_T *Controller_Master_Y_BRAKE, uint8_T
AndreaAndreoli 2:d114feef8f3b 79 *Controller_Master_Y_ACC, uint8_T *Controller_Master_Y_LED_RED, uint8_T
AndreaAndreoli 2:d114feef8f3b 80 *Controller_Master_Y_LED_GREEN, uint8_T *Controller_Master_Y_LED_BLUE, uint8_T
AndreaAndreoli 2:d114feef8f3b 81 *Controller_Master_Y_MASTER);
AndreaAndreoli 0:8e9e8bee3cf4 82 extern void Controller_Master_step(RT_MODEL_Controller_Master_T *const
AndreaAndreoli 0:8e9e8bee3cf4 83 Controller_Master_M, real_T Controller_Master_U_V, real_T
AndreaAndreoli 2:d114feef8f3b 84 Controller_Master_U_D_M, boolean_T Controller_Master_U_QA_EN, uint8_T
AndreaAndreoli 2:d114feef8f3b 85 *Controller_Master_Y_BRAKE, uint8_T *Controller_Master_Y_ACC, uint8_T
AndreaAndreoli 2:d114feef8f3b 86 *Controller_Master_Y_LED_RED, uint8_T *Controller_Master_Y_LED_GREEN, uint8_T *
AndreaAndreoli 2:d114feef8f3b 87 Controller_Master_Y_LED_BLUE, uint8_T *Controller_Master_Y_MASTER);
AndreaAndreoli 0:8e9e8bee3cf4 88 extern void Controller_Master_terminate(RT_MODEL_Controller_Master_T *const
AndreaAndreoli 0:8e9e8bee3cf4 89 Controller_Master_M);
AndreaAndreoli 0:8e9e8bee3cf4 90
AndreaAndreoli 0:8e9e8bee3cf4 91 /*-
AndreaAndreoli 0:8e9e8bee3cf4 92 * The generated code includes comments that allow you to trace directly
AndreaAndreoli 0:8e9e8bee3cf4 93 * back to the appropriate location in the model. The basic format
AndreaAndreoli 0:8e9e8bee3cf4 94 * is <system>/block_name, where system is the system number (uniquely
AndreaAndreoli 0:8e9e8bee3cf4 95 * assigned by Simulink) and block_name is the name of the block.
AndreaAndreoli 0:8e9e8bee3cf4 96 *
AndreaAndreoli 0:8e9e8bee3cf4 97 * Note that this particular code originates from a subsystem build,
AndreaAndreoli 0:8e9e8bee3cf4 98 * and has its own system numbers different from the parent model.
AndreaAndreoli 0:8e9e8bee3cf4 99 * Refer to the system hierarchy for this subsystem below, and use the
AndreaAndreoli 0:8e9e8bee3cf4 100 * MATLAB hilite_system command to trace the generated code back
AndreaAndreoli 0:8e9e8bee3cf4 101 * to the parent model. For example,
AndreaAndreoli 0:8e9e8bee3cf4 102 *
AndreaAndreoli 2:d114feef8f3b 103 * hilite_system('Controller_Model_07_05_v01/Controller/Controller_Master') - opens subsystem Controller_Model_07_05_v01/Controller/Controller_Master
AndreaAndreoli 2:d114feef8f3b 104 * hilite_system('Controller_Model_07_05_v01/Controller/Controller_Master/Kp') - opens and selects block Kp
AndreaAndreoli 0:8e9e8bee3cf4 105 *
AndreaAndreoli 0:8e9e8bee3cf4 106 * Here is the system hierarchy for this model
AndreaAndreoli 0:8e9e8bee3cf4 107 *
AndreaAndreoli 2:d114feef8f3b 108 * '<Root>' : 'Controller_Model_07_05_v01/Controller'
AndreaAndreoli 2:d114feef8f3b 109 * '<S1>' : 'Controller_Model_07_05_v01/Controller/Controller_Master'
AndreaAndreoli 2:d114feef8f3b 110 * '<S2>' : 'Controller_Model_07_05_v01/Controller/Controller_Master/AEB_QA'
AndreaAndreoli 2:d114feef8f3b 111 * '<S3>' : 'Controller_Model_07_05_v01/Controller/Controller_Master/select_command'
AndreaAndreoli 0:8e9e8bee3cf4 112 */
AndreaAndreoli 0:8e9e8bee3cf4 113 #endif /* RTW_HEADER_Controller_Master_h_ */
AndreaAndreoli 0:8e9e8bee3cf4 114
AndreaAndreoli 0:8e9e8bee3cf4 115 /*
AndreaAndreoli 0:8e9e8bee3cf4 116 * File trailer for generated code.
AndreaAndreoli 0:8e9e8bee3cf4 117 *
AndreaAndreoli 0:8e9e8bee3cf4 118 * [EOF]
AndreaAndreoli 0:8e9e8bee3cf4 119 */
AndreaAndreoli 0:8e9e8bee3cf4 120