MBSD_assignment / Controller_Master

Library for the master controller

Dependents:   Test_Controller_Master AEB

Controller_Master.h@3:66d07e7a134a, 2016-07-10 (annotated)

Committer:
AndreaAndreoli
Date:
Sun Jul 10 13:17:48 2016 +0000
Revision:
3:66d07e7a134a
Parent:
2:d114feef8f3b 
fixed bug qa;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AndreaAndreoli 0:8e9e8bee3cf4 1 /*
AndreaAndreoli 0:8e9e8bee3cf4 2 * Academic License - for use in teaching, academic research, and meeting
AndreaAndreoli 0:8e9e8bee3cf4 3 * course requirements at degree granting institutions only. Not for
AndreaAndreoli 0:8e9e8bee3cf4 4 * government, commercial, or other organizational use.
AndreaAndreoli 0:8e9e8bee3cf4 5 *
AndreaAndreoli 0:8e9e8bee3cf4 6 * File: Controller_Master.h
AndreaAndreoli 0:8e9e8bee3cf4 7 *
AndreaAndreoli 0:8e9e8bee3cf4 8 * Code generated for Simulink model 'Controller_Master'.
AndreaAndreoli 0:8e9e8bee3cf4 9 *
AndreaAndreoli 3:66d07e7a134a 10 * Model version : 1.7
AndreaAndreoli 0:8e9e8bee3cf4 11 * Simulink Coder version : 8.10 (R2016a) 10-Feb-2016
AndreaAndreoli 3:66d07e7a134a 12 * C/C++ source code generated on : Sun Jul 10 14:56:51 2016
AndreaAndreoli 0:8e9e8bee3cf4 13 *
AndreaAndreoli 0:8e9e8bee3cf4 14 * Target selection: ert.tlc
AndreaAndreoli 3:66d07e7a134a 15 * Embedded hardware selection: ARM Compatible->ARM Cortex
AndreaAndreoli 0:8e9e8bee3cf4 16 * Code generation objectives: Unspecified
AndreaAndreoli 0:8e9e8bee3cf4 17 * Validation result: Not run
AndreaAndreoli 0:8e9e8bee3cf4 18 */
AndreaAndreoli 0:8e9e8bee3cf4 19
AndreaAndreoli 0:8e9e8bee3cf4 20 #ifndef RTW_HEADER_Controller_Master_h_
AndreaAndreoli 0:8e9e8bee3cf4 21 #define RTW_HEADER_Controller_Master_h_
AndreaAndreoli 3:66d07e7a134a 22 #include "rtwtypes.h"
AndreaAndreoli 3:66d07e7a134a 23 #include <math.h>
AndreaAndreoli 0:8e9e8bee3cf4 24 #include <string.h>
AndreaAndreoli 3:66d07e7a134a 25 #include <stddef.h>
AndreaAndreoli 0:8e9e8bee3cf4 26 #ifndef Controller_Master_COMMON_INCLUDES_
AndreaAndreoli 0:8e9e8bee3cf4 27 # define Controller_Master_COMMON_INCLUDES_
AndreaAndreoli 0:8e9e8bee3cf4 28 #include "rtwtypes.h"
AndreaAndreoli 0:8e9e8bee3cf4 29 #endif /* Controller_Master_COMMON_INCLUDES_ */
AndreaAndreoli 0:8e9e8bee3cf4 30
AndreaAndreoli 0:8e9e8bee3cf4 31 /* Macros for accessing real-time model data structure */
AndreaAndreoli 3:66d07e7a134a 32 #ifndef rtmGetBlockIO
AndreaAndreoli 3:66d07e7a134a 33 # define rtmGetBlockIO(rtm) ((rtm)->ModelData.blockIO)
AndreaAndreoli 3:66d07e7a134a 34 #endif
AndreaAndreoli 3:66d07e7a134a 35
AndreaAndreoli 3:66d07e7a134a 36 #ifndef rtmSetBlockIO
AndreaAndreoli 3:66d07e7a134a 37 # define rtmSetBlockIO(rtm, val) ((rtm)->ModelData.blockIO = (val))
AndreaAndreoli 3:66d07e7a134a 38 #endif
AndreaAndreoli 3:66d07e7a134a 39
AndreaAndreoli 3:66d07e7a134a 40 #ifndef rtmGetDefaultParam
AndreaAndreoli 3:66d07e7a134a 41 # define rtmGetDefaultParam(rtm) ((rtm)->ModelData.defaultParam)
AndreaAndreoli 3:66d07e7a134a 42 #endif
AndreaAndreoli 3:66d07e7a134a 43
AndreaAndreoli 3:66d07e7a134a 44 #ifndef rtmSetDefaultParam
AndreaAndreoli 3:66d07e7a134a 45 # define rtmSetDefaultParam(rtm, val) ((rtm)->ModelData.defaultParam = (val))
AndreaAndreoli 3:66d07e7a134a 46 #endif
AndreaAndreoli 3:66d07e7a134a 47
AndreaAndreoli 3:66d07e7a134a 48 #ifndef rtmGetRootDWork
AndreaAndreoli 3:66d07e7a134a 49 # define rtmGetRootDWork(rtm) ((rtm)->ModelData.dwork)
AndreaAndreoli 3:66d07e7a134a 50 #endif
AndreaAndreoli 3:66d07e7a134a 51
AndreaAndreoli 3:66d07e7a134a 52 #ifndef rtmSetRootDWork
AndreaAndreoli 3:66d07e7a134a 53 # define rtmSetRootDWork(rtm, val) ((rtm)->ModelData.dwork = (val))
AndreaAndreoli 3:66d07e7a134a 54 #endif
AndreaAndreoli 3:66d07e7a134a 55
AndreaAndreoli 0:8e9e8bee3cf4 56 #ifndef rtmGetErrorStatus
AndreaAndreoli 0:8e9e8bee3cf4 57 # define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
AndreaAndreoli 0:8e9e8bee3cf4 58 #endif
AndreaAndreoli 0:8e9e8bee3cf4 59
AndreaAndreoli 0:8e9e8bee3cf4 60 #ifndef rtmSetErrorStatus
AndreaAndreoli 0:8e9e8bee3cf4 61 # define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
AndreaAndreoli 0:8e9e8bee3cf4 62 #endif
AndreaAndreoli 0:8e9e8bee3cf4 63
AndreaAndreoli 0:8e9e8bee3cf4 64 /* Forward declaration for rtModel */
AndreaAndreoli 0:8e9e8bee3cf4 65 typedef struct tag_RTM_Controller_Master_T RT_MODEL_Controller_Master_T;
AndreaAndreoli 0:8e9e8bee3cf4 66
AndreaAndreoli 0:8e9e8bee3cf4 67 /* Block signals (auto storage) */
AndreaAndreoli 0:8e9e8bee3cf4 68 typedef struct {
AndreaAndreoli 2:d114feef8f3b 69 real_T Led_Blue; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:8e9e8bee3cf4 70 } B_Controller_Master_T;
AndreaAndreoli 0:8e9e8bee3cf4 71
AndreaAndreoli 0:8e9e8bee3cf4 72 /* Block states (auto storage) for system '<Root>' */
AndreaAndreoli 0:8e9e8bee3cf4 73 typedef struct {
AndreaAndreoli 0:8e9e8bee3cf4 74 uint32_T temporalCounter_i1; /* '<S1>/select_command' */
AndreaAndreoli 0:8e9e8bee3cf4 75 uint8_T is_active_c2_Controller_Master;/* '<S1>/select_command' */
AndreaAndreoli 0:8e9e8bee3cf4 76 uint8_T is_c2_Controller_Master; /* '<S1>/select_command' */
AndreaAndreoli 0:8e9e8bee3cf4 77 uint8_T is_BLINK; /* '<S1>/select_command' */
AndreaAndreoli 2:d114feef8f3b 78 uint8_T is_active_c3_Controller_Master;/* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 79 uint8_T is_ERRORS_CHECK_THREAD; /* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 80 uint8_T is_APPLICATION_THREAD; /* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 81 uint8_T is_AEB_ACTIVE; /* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 82 uint8_T is_QA_ACTIVE; /* '<S1>/AEB_QA' */
AndreaAndreoli 2:d114feef8f3b 83 boolean_T En; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:8e9e8bee3cf4 84 } DW_Controller_Master_T;
AndreaAndreoli 0:8e9e8bee3cf4 85
AndreaAndreoli 3:66d07e7a134a 86 /* Parameters (auto storage) */
AndreaAndreoli 3:66d07e7a134a 87 struct P_Controller_Master_T_ {
AndreaAndreoli 3:66d07e7a134a 88 uint8_T Memory_X0; /* Computed Parameter: Memory_X0
AndreaAndreoli 3:66d07e7a134a 89 * Referenced by: '<S1>/Memory'
AndreaAndreoli 3:66d07e7a134a 90 */
AndreaAndreoli 3:66d07e7a134a 91 };
AndreaAndreoli 3:66d07e7a134a 92
AndreaAndreoli 3:66d07e7a134a 93 /* Parameters (auto storage) */
AndreaAndreoli 3:66d07e7a134a 94 typedef struct P_Controller_Master_T_ P_Controller_Master_T;
AndreaAndreoli 3:66d07e7a134a 95
AndreaAndreoli 0:8e9e8bee3cf4 96 /* Real-time Model Data Structure */
AndreaAndreoli 0:8e9e8bee3cf4 97 struct tag_RTM_Controller_Master_T {
AndreaAndreoli 3:66d07e7a134a 98 const char_T *errorStatus;
AndreaAndreoli 0:8e9e8bee3cf4 99
AndreaAndreoli 0:8e9e8bee3cf4 100 /*
AndreaAndreoli 0:8e9e8bee3cf4 101 * ModelData:
AndreaAndreoli 0:8e9e8bee3cf4 102 * The following substructure contains information regarding
AndreaAndreoli 0:8e9e8bee3cf4 103 * the data used in the model.
AndreaAndreoli 0:8e9e8bee3cf4 104 */
AndreaAndreoli 0:8e9e8bee3cf4 105 struct {
AndreaAndreoli 0:8e9e8bee3cf4 106 B_Controller_Master_T *blockIO;
AndreaAndreoli 3:66d07e7a134a 107 P_Controller_Master_T *defaultParam;
AndreaAndreoli 0:8e9e8bee3cf4 108 DW_Controller_Master_T *dwork;
AndreaAndreoli 0:8e9e8bee3cf4 109 } ModelData;
AndreaAndreoli 0:8e9e8bee3cf4 110 };
AndreaAndreoli 0:8e9e8bee3cf4 111
AndreaAndreoli 0:8e9e8bee3cf4 112 /* Model entry point functions */
AndreaAndreoli 0:8e9e8bee3cf4 113 extern void Controller_Master_initialize(RT_MODEL_Controller_Master_T *const
AndreaAndreoli 0:8e9e8bee3cf4 114 Controller_Master_M, real_T *Controller_Master_U_V, real_T
AndreaAndreoli 2:d114feef8f3b 115 *Controller_Master_U_D_M, uint8_T *Controller_Master_U_Slave, boolean_T
AndreaAndreoli 2:d114feef8f3b 116 *Controller_Master_U_QA_EN, uint8_T *Controller_Master_Y_BRAKE, uint8_T
AndreaAndreoli 2:d114feef8f3b 117 *Controller_Master_Y_ACC, uint8_T *Controller_Master_Y_LED_RED, uint8_T
AndreaAndreoli 2:d114feef8f3b 118 *Controller_Master_Y_LED_GREEN, uint8_T *Controller_Master_Y_LED_BLUE, uint8_T
AndreaAndreoli 2:d114feef8f3b 119 *Controller_Master_Y_MASTER);
AndreaAndreoli 0:8e9e8bee3cf4 120 extern void Controller_Master_step(RT_MODEL_Controller_Master_T *const
AndreaAndreoli 0:8e9e8bee3cf4 121 Controller_Master_M, real_T Controller_Master_U_V, real_T
AndreaAndreoli 2:d114feef8f3b 122 Controller_Master_U_D_M, boolean_T Controller_Master_U_QA_EN, uint8_T
AndreaAndreoli 2:d114feef8f3b 123 *Controller_Master_Y_BRAKE, uint8_T *Controller_Master_Y_ACC, uint8_T
AndreaAndreoli 2:d114feef8f3b 124 *Controller_Master_Y_LED_RED, uint8_T *Controller_Master_Y_LED_GREEN, uint8_T *
AndreaAndreoli 2:d114feef8f3b 125 Controller_Master_Y_LED_BLUE, uint8_T *Controller_Master_Y_MASTER);
AndreaAndreoli 0:8e9e8bee3cf4 126 extern void Controller_Master_terminate(RT_MODEL_Controller_Master_T *const
AndreaAndreoli 0:8e9e8bee3cf4 127 Controller_Master_M);
AndreaAndreoli 0:8e9e8bee3cf4 128
AndreaAndreoli 0:8e9e8bee3cf4 129 /*-
AndreaAndreoli 0:8e9e8bee3cf4 130 * The generated code includes comments that allow you to trace directly
AndreaAndreoli 0:8e9e8bee3cf4 131 * back to the appropriate location in the model. The basic format
AndreaAndreoli 0:8e9e8bee3cf4 132 * is <system>/block_name, where system is the system number (uniquely
AndreaAndreoli 0:8e9e8bee3cf4 133 * assigned by Simulink) and block_name is the name of the block.
AndreaAndreoli 0:8e9e8bee3cf4 134 *
AndreaAndreoli 0:8e9e8bee3cf4 135 * Note that this particular code originates from a subsystem build,
AndreaAndreoli 0:8e9e8bee3cf4 136 * and has its own system numbers different from the parent model.
AndreaAndreoli 0:8e9e8bee3cf4 137 * Refer to the system hierarchy for this subsystem below, and use the
AndreaAndreoli 0:8e9e8bee3cf4 138 * MATLAB hilite_system command to trace the generated code back
AndreaAndreoli 0:8e9e8bee3cf4 139 * to the parent model. For example,
AndreaAndreoli 0:8e9e8bee3cf4 140 *
AndreaAndreoli 3:66d07e7a134a 141 * hilite_system('Controller_Model_07_10_v01/Controller/Controller_Master') - opens subsystem Controller_Model_07_10_v01/Controller/Controller_Master
AndreaAndreoli 3:66d07e7a134a 142 * hilite_system('Controller_Model_07_10_v01/Controller/Controller_Master/Kp') - opens and selects block Kp
AndreaAndreoli 0:8e9e8bee3cf4 143 *
AndreaAndreoli 0:8e9e8bee3cf4 144 * Here is the system hierarchy for this model
AndreaAndreoli 0:8e9e8bee3cf4 145 *
AndreaAndreoli 3:66d07e7a134a 146 * '<Root>' : 'Controller_Model_07_10_v01/Controller'
AndreaAndreoli 3:66d07e7a134a 147 * '<S1>' : 'Controller_Model_07_10_v01/Controller/Controller_Master'
AndreaAndreoli 3:66d07e7a134a 148 * '<S2>' : 'Controller_Model_07_10_v01/Controller/Controller_Master/AEB_QA'
AndreaAndreoli 3:66d07e7a134a 149 * '<S3>' : 'Controller_Model_07_10_v01/Controller/Controller_Master/select_command'
AndreaAndreoli 0:8e9e8bee3cf4 150 */
AndreaAndreoli 0:8e9e8bee3cf4 151 #endif /* RTW_HEADER_Controller_Master_h_ */
AndreaAndreoli 0:8e9e8bee3cf4 152
AndreaAndreoli 0:8e9e8bee3cf4 153 /*
AndreaAndreoli 0:8e9e8bee3cf4 154 * File trailer for generated code.
AndreaAndreoli 0:8e9e8bee3cf4 155 *
AndreaAndreoli 0:8e9e8bee3cf4 156 * [EOF]
AndreaAndreoli 0:8e9e8bee3cf4 157 */
AndreaAndreoli 0:8e9e8bee3cf4 158