Lancaster University / mbed-dev-bin

Binary version of Lancaster University's mbed branch, soon to be merged. The source lives here:https://developer.mbed.org/teams/Lancaster-University/code/mbed-src/

Dependents:   microbit-dal microbit-ble-open microbit-dal-eddystone microbit-dal ... more

Fork of mbed-lite-test by Lancaster University

TARGET_NRF51_MICROBIT/core_cmSimd.h@3:768173a57492, 2016-07-13 (annotated)

Committer:
jamesadevine
Date:
Wed Jul 13 15:12:06 2016 +0100
Revision:
3:768173a57492
Parent:
0:e1a608bb55e8 
further updates to mbed-dev-bin

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jamesadevine 0:e1a608bb55e8 1 /**************************************************************************//**
jamesadevine 0:e1a608bb55e8 2 * @file core_cmSimd.h
jamesadevine 0:e1a608bb55e8 3 * @brief CMSIS Cortex-M SIMD Header File
jamesadevine 0:e1a608bb55e8 4 * @version V4.10
jamesadevine 0:e1a608bb55e8 5 * @date 18. March 2015
jamesadevine 0:e1a608bb55e8 6 *
jamesadevine 0:e1a608bb55e8 7 * @note
jamesadevine 0:e1a608bb55e8 8 *
jamesadevine 0:e1a608bb55e8 9 ******************************************************************************/
jamesadevine 0:e1a608bb55e8 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
jamesadevine 0:e1a608bb55e8 11
jamesadevine 0:e1a608bb55e8 12 All rights reserved.
jamesadevine 0:e1a608bb55e8 13 Redistribution and use in source and binary forms, with or without
jamesadevine 0:e1a608bb55e8 14 modification, are permitted provided that the following conditions are met:
jamesadevine 0:e1a608bb55e8 15 - Redistributions of source code must retain the above copyright
jamesadevine 0:e1a608bb55e8 16 notice, this list of conditions and the following disclaimer.
jamesadevine 0:e1a608bb55e8 17 - Redistributions in binary form must reproduce the above copyright
jamesadevine 0:e1a608bb55e8 18 notice, this list of conditions and the following disclaimer in the
jamesadevine 0:e1a608bb55e8 19 documentation and/or other materials provided with the distribution.
jamesadevine 0:e1a608bb55e8 20 - Neither the name of ARM nor the names of its contributors may be used
jamesadevine 0:e1a608bb55e8 21 to endorse or promote products derived from this software without
jamesadevine 0:e1a608bb55e8 22 specific prior written permission.
jamesadevine 0:e1a608bb55e8 23 *
jamesadevine 0:e1a608bb55e8 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jamesadevine 0:e1a608bb55e8 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jamesadevine 0:e1a608bb55e8 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
jamesadevine 0:e1a608bb55e8 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
jamesadevine 0:e1a608bb55e8 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
jamesadevine 0:e1a608bb55e8 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
jamesadevine 0:e1a608bb55e8 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
jamesadevine 0:e1a608bb55e8 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
jamesadevine 0:e1a608bb55e8 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
jamesadevine 0:e1a608bb55e8 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
jamesadevine 0:e1a608bb55e8 34 POSSIBILITY OF SUCH DAMAGE.
jamesadevine 0:e1a608bb55e8 35 ---------------------------------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 36
jamesadevine 0:e1a608bb55e8 37
jamesadevine 0:e1a608bb55e8 38 #if defined ( __ICCARM__ )
jamesadevine 0:e1a608bb55e8 39 #pragma system_include /* treat file as system include file for MISRA check */
jamesadevine 0:e1a608bb55e8 40 #endif
jamesadevine 0:e1a608bb55e8 41
jamesadevine 0:e1a608bb55e8 42 #ifndef __CORE_CMSIMD_H
jamesadevine 0:e1a608bb55e8 43 #define __CORE_CMSIMD_H
jamesadevine 0:e1a608bb55e8 44
jamesadevine 0:e1a608bb55e8 45 #ifdef __cplusplus
jamesadevine 0:e1a608bb55e8 46 extern "C" {
jamesadevine 0:e1a608bb55e8 47 #endif
jamesadevine 0:e1a608bb55e8 48
jamesadevine 0:e1a608bb55e8 49
jamesadevine 0:e1a608bb55e8 50 /*******************************************************************************
jamesadevine 0:e1a608bb55e8 51 * Hardware Abstraction Layer
jamesadevine 0:e1a608bb55e8 52 ******************************************************************************/
jamesadevine 0:e1a608bb55e8 53
jamesadevine 0:e1a608bb55e8 54
jamesadevine 0:e1a608bb55e8 55 /* ################### Compiler specific Intrinsics ########################### */
jamesadevine 0:e1a608bb55e8 56 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
jamesadevine 0:e1a608bb55e8 57 Access to dedicated SIMD instructions
jamesadevine 0:e1a608bb55e8 58 @{
jamesadevine 0:e1a608bb55e8 59 */
jamesadevine 0:e1a608bb55e8 60
jamesadevine 0:e1a608bb55e8 61 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
jamesadevine 0:e1a608bb55e8 62 /* ARM armcc specific functions */
jamesadevine 0:e1a608bb55e8 63 #define __SADD8 __sadd8
jamesadevine 0:e1a608bb55e8 64 #define __QADD8 __qadd8
jamesadevine 0:e1a608bb55e8 65 #define __SHADD8 __shadd8
jamesadevine 0:e1a608bb55e8 66 #define __UADD8 __uadd8
jamesadevine 0:e1a608bb55e8 67 #define __UQADD8 __uqadd8
jamesadevine 0:e1a608bb55e8 68 #define __UHADD8 __uhadd8
jamesadevine 0:e1a608bb55e8 69 #define __SSUB8 __ssub8
jamesadevine 0:e1a608bb55e8 70 #define __QSUB8 __qsub8
jamesadevine 0:e1a608bb55e8 71 #define __SHSUB8 __shsub8
jamesadevine 0:e1a608bb55e8 72 #define __USUB8 __usub8
jamesadevine 0:e1a608bb55e8 73 #define __UQSUB8 __uqsub8
jamesadevine 0:e1a608bb55e8 74 #define __UHSUB8 __uhsub8
jamesadevine 0:e1a608bb55e8 75 #define __SADD16 __sadd16
jamesadevine 0:e1a608bb55e8 76 #define __QADD16 __qadd16
jamesadevine 0:e1a608bb55e8 77 #define __SHADD16 __shadd16
jamesadevine 0:e1a608bb55e8 78 #define __UADD16 __uadd16
jamesadevine 0:e1a608bb55e8 79 #define __UQADD16 __uqadd16
jamesadevine 0:e1a608bb55e8 80 #define __UHADD16 __uhadd16
jamesadevine 0:e1a608bb55e8 81 #define __SSUB16 __ssub16
jamesadevine 0:e1a608bb55e8 82 #define __QSUB16 __qsub16
jamesadevine 0:e1a608bb55e8 83 #define __SHSUB16 __shsub16
jamesadevine 0:e1a608bb55e8 84 #define __USUB16 __usub16
jamesadevine 0:e1a608bb55e8 85 #define __UQSUB16 __uqsub16
jamesadevine 0:e1a608bb55e8 86 #define __UHSUB16 __uhsub16
jamesadevine 0:e1a608bb55e8 87 #define __SASX __sasx
jamesadevine 0:e1a608bb55e8 88 #define __QASX __qasx
jamesadevine 0:e1a608bb55e8 89 #define __SHASX __shasx
jamesadevine 0:e1a608bb55e8 90 #define __UASX __uasx
jamesadevine 0:e1a608bb55e8 91 #define __UQASX __uqasx
jamesadevine 0:e1a608bb55e8 92 #define __UHASX __uhasx
jamesadevine 0:e1a608bb55e8 93 #define __SSAX __ssax
jamesadevine 0:e1a608bb55e8 94 #define __QSAX __qsax
jamesadevine 0:e1a608bb55e8 95 #define __SHSAX __shsax
jamesadevine 0:e1a608bb55e8 96 #define __USAX __usax
jamesadevine 0:e1a608bb55e8 97 #define __UQSAX __uqsax
jamesadevine 0:e1a608bb55e8 98 #define __UHSAX __uhsax
jamesadevine 0:e1a608bb55e8 99 #define __USAD8 __usad8
jamesadevine 0:e1a608bb55e8 100 #define __USADA8 __usada8
jamesadevine 0:e1a608bb55e8 101 #define __SSAT16 __ssat16
jamesadevine 0:e1a608bb55e8 102 #define __USAT16 __usat16
jamesadevine 0:e1a608bb55e8 103 #define __UXTB16 __uxtb16
jamesadevine 0:e1a608bb55e8 104 #define __UXTAB16 __uxtab16
jamesadevine 0:e1a608bb55e8 105 #define __SXTB16 __sxtb16
jamesadevine 0:e1a608bb55e8 106 #define __SXTAB16 __sxtab16
jamesadevine 0:e1a608bb55e8 107 #define __SMUAD __smuad
jamesadevine 0:e1a608bb55e8 108 #define __SMUADX __smuadx
jamesadevine 0:e1a608bb55e8 109 #define __SMLAD __smlad
jamesadevine 0:e1a608bb55e8 110 #define __SMLADX __smladx
jamesadevine 0:e1a608bb55e8 111 #define __SMLALD __smlald
jamesadevine 0:e1a608bb55e8 112 #define __SMLALDX __smlaldx
jamesadevine 0:e1a608bb55e8 113 #define __SMUSD __smusd
jamesadevine 0:e1a608bb55e8 114 #define __SMUSDX __smusdx
jamesadevine 0:e1a608bb55e8 115 #define __SMLSD __smlsd
jamesadevine 0:e1a608bb55e8 116 #define __SMLSDX __smlsdx
jamesadevine 0:e1a608bb55e8 117 #define __SMLSLD __smlsld
jamesadevine 0:e1a608bb55e8 118 #define __SMLSLDX __smlsldx
jamesadevine 0:e1a608bb55e8 119 #define __SEL __sel
jamesadevine 0:e1a608bb55e8 120 #define __QADD __qadd
jamesadevine 0:e1a608bb55e8 121 #define __QSUB __qsub
jamesadevine 0:e1a608bb55e8 122
jamesadevine 0:e1a608bb55e8 123 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
jamesadevine 0:e1a608bb55e8 124 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
jamesadevine 0:e1a608bb55e8 125
jamesadevine 0:e1a608bb55e8 126 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
jamesadevine 0:e1a608bb55e8 127 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
jamesadevine 0:e1a608bb55e8 128
jamesadevine 0:e1a608bb55e8 129 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
jamesadevine 0:e1a608bb55e8 130 ((int64_t)(ARG3) << 32) ) >> 32))
jamesadevine 0:e1a608bb55e8 131
jamesadevine 0:e1a608bb55e8 132
jamesadevine 0:e1a608bb55e8 133 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
jamesadevine 0:e1a608bb55e8 134 /* GNU gcc specific functions */
jamesadevine 0:e1a608bb55e8 135 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 136 {
jamesadevine 0:e1a608bb55e8 137 uint32_t result;
jamesadevine 0:e1a608bb55e8 138
jamesadevine 0:e1a608bb55e8 139 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 140 return(result);
jamesadevine 0:e1a608bb55e8 141 }
jamesadevine 0:e1a608bb55e8 142
jamesadevine 0:e1a608bb55e8 143 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 144 {
jamesadevine 0:e1a608bb55e8 145 uint32_t result;
jamesadevine 0:e1a608bb55e8 146
jamesadevine 0:e1a608bb55e8 147 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 148 return(result);
jamesadevine 0:e1a608bb55e8 149 }
jamesadevine 0:e1a608bb55e8 150
jamesadevine 0:e1a608bb55e8 151 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 152 {
jamesadevine 0:e1a608bb55e8 153 uint32_t result;
jamesadevine 0:e1a608bb55e8 154
jamesadevine 0:e1a608bb55e8 155 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 156 return(result);
jamesadevine 0:e1a608bb55e8 157 }
jamesadevine 0:e1a608bb55e8 158
jamesadevine 0:e1a608bb55e8 159 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 160 {
jamesadevine 0:e1a608bb55e8 161 uint32_t result;
jamesadevine 0:e1a608bb55e8 162
jamesadevine 0:e1a608bb55e8 163 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 164 return(result);
jamesadevine 0:e1a608bb55e8 165 }
jamesadevine 0:e1a608bb55e8 166
jamesadevine 0:e1a608bb55e8 167 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 168 {
jamesadevine 0:e1a608bb55e8 169 uint32_t result;
jamesadevine 0:e1a608bb55e8 170
jamesadevine 0:e1a608bb55e8 171 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 172 return(result);
jamesadevine 0:e1a608bb55e8 173 }
jamesadevine 0:e1a608bb55e8 174
jamesadevine 0:e1a608bb55e8 175 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 176 {
jamesadevine 0:e1a608bb55e8 177 uint32_t result;
jamesadevine 0:e1a608bb55e8 178
jamesadevine 0:e1a608bb55e8 179 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 180 return(result);
jamesadevine 0:e1a608bb55e8 181 }
jamesadevine 0:e1a608bb55e8 182
jamesadevine 0:e1a608bb55e8 183
jamesadevine 0:e1a608bb55e8 184 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 185 {
jamesadevine 0:e1a608bb55e8 186 uint32_t result;
jamesadevine 0:e1a608bb55e8 187
jamesadevine 0:e1a608bb55e8 188 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 189 return(result);
jamesadevine 0:e1a608bb55e8 190 }
jamesadevine 0:e1a608bb55e8 191
jamesadevine 0:e1a608bb55e8 192 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 193 {
jamesadevine 0:e1a608bb55e8 194 uint32_t result;
jamesadevine 0:e1a608bb55e8 195
jamesadevine 0:e1a608bb55e8 196 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 197 return(result);
jamesadevine 0:e1a608bb55e8 198 }
jamesadevine 0:e1a608bb55e8 199
jamesadevine 0:e1a608bb55e8 200 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 201 {
jamesadevine 0:e1a608bb55e8 202 uint32_t result;
jamesadevine 0:e1a608bb55e8 203
jamesadevine 0:e1a608bb55e8 204 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 205 return(result);
jamesadevine 0:e1a608bb55e8 206 }
jamesadevine 0:e1a608bb55e8 207
jamesadevine 0:e1a608bb55e8 208 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 209 {
jamesadevine 0:e1a608bb55e8 210 uint32_t result;
jamesadevine 0:e1a608bb55e8 211
jamesadevine 0:e1a608bb55e8 212 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 213 return(result);
jamesadevine 0:e1a608bb55e8 214 }
jamesadevine 0:e1a608bb55e8 215
jamesadevine 0:e1a608bb55e8 216 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 217 {
jamesadevine 0:e1a608bb55e8 218 uint32_t result;
jamesadevine 0:e1a608bb55e8 219
jamesadevine 0:e1a608bb55e8 220 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 221 return(result);
jamesadevine 0:e1a608bb55e8 222 }
jamesadevine 0:e1a608bb55e8 223
jamesadevine 0:e1a608bb55e8 224 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 225 {
jamesadevine 0:e1a608bb55e8 226 uint32_t result;
jamesadevine 0:e1a608bb55e8 227
jamesadevine 0:e1a608bb55e8 228 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 229 return(result);
jamesadevine 0:e1a608bb55e8 230 }
jamesadevine 0:e1a608bb55e8 231
jamesadevine 0:e1a608bb55e8 232
jamesadevine 0:e1a608bb55e8 233 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 234 {
jamesadevine 0:e1a608bb55e8 235 uint32_t result;
jamesadevine 0:e1a608bb55e8 236
jamesadevine 0:e1a608bb55e8 237 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 238 return(result);
jamesadevine 0:e1a608bb55e8 239 }
jamesadevine 0:e1a608bb55e8 240
jamesadevine 0:e1a608bb55e8 241 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 242 {
jamesadevine 0:e1a608bb55e8 243 uint32_t result;
jamesadevine 0:e1a608bb55e8 244
jamesadevine 0:e1a608bb55e8 245 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 246 return(result);
jamesadevine 0:e1a608bb55e8 247 }
jamesadevine 0:e1a608bb55e8 248
jamesadevine 0:e1a608bb55e8 249 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 250 {
jamesadevine 0:e1a608bb55e8 251 uint32_t result;
jamesadevine 0:e1a608bb55e8 252
jamesadevine 0:e1a608bb55e8 253 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 254 return(result);
jamesadevine 0:e1a608bb55e8 255 }
jamesadevine 0:e1a608bb55e8 256
jamesadevine 0:e1a608bb55e8 257 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 258 {
jamesadevine 0:e1a608bb55e8 259 uint32_t result;
jamesadevine 0:e1a608bb55e8 260
jamesadevine 0:e1a608bb55e8 261 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 262 return(result);
jamesadevine 0:e1a608bb55e8 263 }
jamesadevine 0:e1a608bb55e8 264
jamesadevine 0:e1a608bb55e8 265 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 266 {
jamesadevine 0:e1a608bb55e8 267 uint32_t result;
jamesadevine 0:e1a608bb55e8 268
jamesadevine 0:e1a608bb55e8 269 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 270 return(result);
jamesadevine 0:e1a608bb55e8 271 }
jamesadevine 0:e1a608bb55e8 272
jamesadevine 0:e1a608bb55e8 273 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 274 {
jamesadevine 0:e1a608bb55e8 275 uint32_t result;
jamesadevine 0:e1a608bb55e8 276
jamesadevine 0:e1a608bb55e8 277 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 278 return(result);
jamesadevine 0:e1a608bb55e8 279 }
jamesadevine 0:e1a608bb55e8 280
jamesadevine 0:e1a608bb55e8 281 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 282 {
jamesadevine 0:e1a608bb55e8 283 uint32_t result;
jamesadevine 0:e1a608bb55e8 284
jamesadevine 0:e1a608bb55e8 285 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 286 return(result);
jamesadevine 0:e1a608bb55e8 287 }
jamesadevine 0:e1a608bb55e8 288
jamesadevine 0:e1a608bb55e8 289 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 290 {
jamesadevine 0:e1a608bb55e8 291 uint32_t result;
jamesadevine 0:e1a608bb55e8 292
jamesadevine 0:e1a608bb55e8 293 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 294 return(result);
jamesadevine 0:e1a608bb55e8 295 }
jamesadevine 0:e1a608bb55e8 296
jamesadevine 0:e1a608bb55e8 297 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 298 {
jamesadevine 0:e1a608bb55e8 299 uint32_t result;
jamesadevine 0:e1a608bb55e8 300
jamesadevine 0:e1a608bb55e8 301 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 302 return(result);
jamesadevine 0:e1a608bb55e8 303 }
jamesadevine 0:e1a608bb55e8 304
jamesadevine 0:e1a608bb55e8 305 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 306 {
jamesadevine 0:e1a608bb55e8 307 uint32_t result;
jamesadevine 0:e1a608bb55e8 308
jamesadevine 0:e1a608bb55e8 309 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 310 return(result);
jamesadevine 0:e1a608bb55e8 311 }
jamesadevine 0:e1a608bb55e8 312
jamesadevine 0:e1a608bb55e8 313 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 314 {
jamesadevine 0:e1a608bb55e8 315 uint32_t result;
jamesadevine 0:e1a608bb55e8 316
jamesadevine 0:e1a608bb55e8 317 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 318 return(result);
jamesadevine 0:e1a608bb55e8 319 }
jamesadevine 0:e1a608bb55e8 320
jamesadevine 0:e1a608bb55e8 321 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 322 {
jamesadevine 0:e1a608bb55e8 323 uint32_t result;
jamesadevine 0:e1a608bb55e8 324
jamesadevine 0:e1a608bb55e8 325 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 326 return(result);
jamesadevine 0:e1a608bb55e8 327 }
jamesadevine 0:e1a608bb55e8 328
jamesadevine 0:e1a608bb55e8 329 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 330 {
jamesadevine 0:e1a608bb55e8 331 uint32_t result;
jamesadevine 0:e1a608bb55e8 332
jamesadevine 0:e1a608bb55e8 333 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 334 return(result);
jamesadevine 0:e1a608bb55e8 335 }
jamesadevine 0:e1a608bb55e8 336
jamesadevine 0:e1a608bb55e8 337 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 338 {
jamesadevine 0:e1a608bb55e8 339 uint32_t result;
jamesadevine 0:e1a608bb55e8 340
jamesadevine 0:e1a608bb55e8 341 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 342 return(result);
jamesadevine 0:e1a608bb55e8 343 }
jamesadevine 0:e1a608bb55e8 344
jamesadevine 0:e1a608bb55e8 345 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 346 {
jamesadevine 0:e1a608bb55e8 347 uint32_t result;
jamesadevine 0:e1a608bb55e8 348
jamesadevine 0:e1a608bb55e8 349 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 350 return(result);
jamesadevine 0:e1a608bb55e8 351 }
jamesadevine 0:e1a608bb55e8 352
jamesadevine 0:e1a608bb55e8 353 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 354 {
jamesadevine 0:e1a608bb55e8 355 uint32_t result;
jamesadevine 0:e1a608bb55e8 356
jamesadevine 0:e1a608bb55e8 357 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 358 return(result);
jamesadevine 0:e1a608bb55e8 359 }
jamesadevine 0:e1a608bb55e8 360
jamesadevine 0:e1a608bb55e8 361 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 362 {
jamesadevine 0:e1a608bb55e8 363 uint32_t result;
jamesadevine 0:e1a608bb55e8 364
jamesadevine 0:e1a608bb55e8 365 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 366 return(result);
jamesadevine 0:e1a608bb55e8 367 }
jamesadevine 0:e1a608bb55e8 368
jamesadevine 0:e1a608bb55e8 369 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 370 {
jamesadevine 0:e1a608bb55e8 371 uint32_t result;
jamesadevine 0:e1a608bb55e8 372
jamesadevine 0:e1a608bb55e8 373 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 374 return(result);
jamesadevine 0:e1a608bb55e8 375 }
jamesadevine 0:e1a608bb55e8 376
jamesadevine 0:e1a608bb55e8 377 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 378 {
jamesadevine 0:e1a608bb55e8 379 uint32_t result;
jamesadevine 0:e1a608bb55e8 380
jamesadevine 0:e1a608bb55e8 381 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 382 return(result);
jamesadevine 0:e1a608bb55e8 383 }
jamesadevine 0:e1a608bb55e8 384
jamesadevine 0:e1a608bb55e8 385 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 386 {
jamesadevine 0:e1a608bb55e8 387 uint32_t result;
jamesadevine 0:e1a608bb55e8 388
jamesadevine 0:e1a608bb55e8 389 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 390 return(result);
jamesadevine 0:e1a608bb55e8 391 }
jamesadevine 0:e1a608bb55e8 392
jamesadevine 0:e1a608bb55e8 393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 394 {
jamesadevine 0:e1a608bb55e8 395 uint32_t result;
jamesadevine 0:e1a608bb55e8 396
jamesadevine 0:e1a608bb55e8 397 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 398 return(result);
jamesadevine 0:e1a608bb55e8 399 }
jamesadevine 0:e1a608bb55e8 400
jamesadevine 0:e1a608bb55e8 401 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 402 {
jamesadevine 0:e1a608bb55e8 403 uint32_t result;
jamesadevine 0:e1a608bb55e8 404
jamesadevine 0:e1a608bb55e8 405 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 406 return(result);
jamesadevine 0:e1a608bb55e8 407 }
jamesadevine 0:e1a608bb55e8 408
jamesadevine 0:e1a608bb55e8 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 410 {
jamesadevine 0:e1a608bb55e8 411 uint32_t result;
jamesadevine 0:e1a608bb55e8 412
jamesadevine 0:e1a608bb55e8 413 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 414 return(result);
jamesadevine 0:e1a608bb55e8 415 }
jamesadevine 0:e1a608bb55e8 416
jamesadevine 0:e1a608bb55e8 417 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 418 {
jamesadevine 0:e1a608bb55e8 419 uint32_t result;
jamesadevine 0:e1a608bb55e8 420
jamesadevine 0:e1a608bb55e8 421 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 422 return(result);
jamesadevine 0:e1a608bb55e8 423 }
jamesadevine 0:e1a608bb55e8 424
jamesadevine 0:e1a608bb55e8 425 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 426 {
jamesadevine 0:e1a608bb55e8 427 uint32_t result;
jamesadevine 0:e1a608bb55e8 428
jamesadevine 0:e1a608bb55e8 429 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 430 return(result);
jamesadevine 0:e1a608bb55e8 431 }
jamesadevine 0:e1a608bb55e8 432
jamesadevine 0:e1a608bb55e8 433 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 434 {
jamesadevine 0:e1a608bb55e8 435 uint32_t result;
jamesadevine 0:e1a608bb55e8 436
jamesadevine 0:e1a608bb55e8 437 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 438 return(result);
jamesadevine 0:e1a608bb55e8 439 }
jamesadevine 0:e1a608bb55e8 440
jamesadevine 0:e1a608bb55e8 441 #define __SSAT16(ARG1,ARG2) \
jamesadevine 0:e1a608bb55e8 442 ({ \
jamesadevine 0:e1a608bb55e8 443 uint32_t __RES, __ARG1 = (ARG1); \
jamesadevine 0:e1a608bb55e8 444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
jamesadevine 0:e1a608bb55e8 445 __RES; \
jamesadevine 0:e1a608bb55e8 446 })
jamesadevine 0:e1a608bb55e8 447
jamesadevine 0:e1a608bb55e8 448 #define __USAT16(ARG1,ARG2) \
jamesadevine 0:e1a608bb55e8 449 ({ \
jamesadevine 0:e1a608bb55e8 450 uint32_t __RES, __ARG1 = (ARG1); \
jamesadevine 0:e1a608bb55e8 451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
jamesadevine 0:e1a608bb55e8 452 __RES; \
jamesadevine 0:e1a608bb55e8 453 })
jamesadevine 0:e1a608bb55e8 454
jamesadevine 0:e1a608bb55e8 455 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
jamesadevine 0:e1a608bb55e8 456 {
jamesadevine 0:e1a608bb55e8 457 uint32_t result;
jamesadevine 0:e1a608bb55e8 458
jamesadevine 0:e1a608bb55e8 459 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
jamesadevine 0:e1a608bb55e8 460 return(result);
jamesadevine 0:e1a608bb55e8 461 }
jamesadevine 0:e1a608bb55e8 462
jamesadevine 0:e1a608bb55e8 463 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 464 {
jamesadevine 0:e1a608bb55e8 465 uint32_t result;
jamesadevine 0:e1a608bb55e8 466
jamesadevine 0:e1a608bb55e8 467 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 468 return(result);
jamesadevine 0:e1a608bb55e8 469 }
jamesadevine 0:e1a608bb55e8 470
jamesadevine 0:e1a608bb55e8 471 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
jamesadevine 0:e1a608bb55e8 472 {
jamesadevine 0:e1a608bb55e8 473 uint32_t result;
jamesadevine 0:e1a608bb55e8 474
jamesadevine 0:e1a608bb55e8 475 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
jamesadevine 0:e1a608bb55e8 476 return(result);
jamesadevine 0:e1a608bb55e8 477 }
jamesadevine 0:e1a608bb55e8 478
jamesadevine 0:e1a608bb55e8 479 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 480 {
jamesadevine 0:e1a608bb55e8 481 uint32_t result;
jamesadevine 0:e1a608bb55e8 482
jamesadevine 0:e1a608bb55e8 483 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 484 return(result);
jamesadevine 0:e1a608bb55e8 485 }
jamesadevine 0:e1a608bb55e8 486
jamesadevine 0:e1a608bb55e8 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 488 {
jamesadevine 0:e1a608bb55e8 489 uint32_t result;
jamesadevine 0:e1a608bb55e8 490
jamesadevine 0:e1a608bb55e8 491 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 492 return(result);
jamesadevine 0:e1a608bb55e8 493 }
jamesadevine 0:e1a608bb55e8 494
jamesadevine 0:e1a608bb55e8 495 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 496 {
jamesadevine 0:e1a608bb55e8 497 uint32_t result;
jamesadevine 0:e1a608bb55e8 498
jamesadevine 0:e1a608bb55e8 499 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 500 return(result);
jamesadevine 0:e1a608bb55e8 501 }
jamesadevine 0:e1a608bb55e8 502
jamesadevine 0:e1a608bb55e8 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 504 {
jamesadevine 0:e1a608bb55e8 505 uint32_t result;
jamesadevine 0:e1a608bb55e8 506
jamesadevine 0:e1a608bb55e8 507 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 508 return(result);
jamesadevine 0:e1a608bb55e8 509 }
jamesadevine 0:e1a608bb55e8 510
jamesadevine 0:e1a608bb55e8 511 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 512 {
jamesadevine 0:e1a608bb55e8 513 uint32_t result;
jamesadevine 0:e1a608bb55e8 514
jamesadevine 0:e1a608bb55e8 515 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 516 return(result);
jamesadevine 0:e1a608bb55e8 517 }
jamesadevine 0:e1a608bb55e8 518
jamesadevine 0:e1a608bb55e8 519 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
jamesadevine 0:e1a608bb55e8 520 {
jamesadevine 0:e1a608bb55e8 521 union llreg_u{
jamesadevine 0:e1a608bb55e8 522 uint32_t w32[2];
jamesadevine 0:e1a608bb55e8 523 uint64_t w64;
jamesadevine 0:e1a608bb55e8 524 } llr;
jamesadevine 0:e1a608bb55e8 525 llr.w64 = acc;
jamesadevine 0:e1a608bb55e8 526
jamesadevine 0:e1a608bb55e8 527 #ifndef __ARMEB__ // Little endian
jamesadevine 0:e1a608bb55e8 528 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
jamesadevine 0:e1a608bb55e8 529 #else // Big endian
jamesadevine 0:e1a608bb55e8 530 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
jamesadevine 0:e1a608bb55e8 531 #endif
jamesadevine 0:e1a608bb55e8 532
jamesadevine 0:e1a608bb55e8 533 return(llr.w64);
jamesadevine 0:e1a608bb55e8 534 }
jamesadevine 0:e1a608bb55e8 535
jamesadevine 0:e1a608bb55e8 536 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
jamesadevine 0:e1a608bb55e8 537 {
jamesadevine 0:e1a608bb55e8 538 union llreg_u{
jamesadevine 0:e1a608bb55e8 539 uint32_t w32[2];
jamesadevine 0:e1a608bb55e8 540 uint64_t w64;
jamesadevine 0:e1a608bb55e8 541 } llr;
jamesadevine 0:e1a608bb55e8 542 llr.w64 = acc;
jamesadevine 0:e1a608bb55e8 543
jamesadevine 0:e1a608bb55e8 544 #ifndef __ARMEB__ // Little endian
jamesadevine 0:e1a608bb55e8 545 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
jamesadevine 0:e1a608bb55e8 546 #else // Big endian
jamesadevine 0:e1a608bb55e8 547 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
jamesadevine 0:e1a608bb55e8 548 #endif
jamesadevine 0:e1a608bb55e8 549
jamesadevine 0:e1a608bb55e8 550 return(llr.w64);
jamesadevine 0:e1a608bb55e8 551 }
jamesadevine 0:e1a608bb55e8 552
jamesadevine 0:e1a608bb55e8 553 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 554 {
jamesadevine 0:e1a608bb55e8 555 uint32_t result;
jamesadevine 0:e1a608bb55e8 556
jamesadevine 0:e1a608bb55e8 557 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 558 return(result);
jamesadevine 0:e1a608bb55e8 559 }
jamesadevine 0:e1a608bb55e8 560
jamesadevine 0:e1a608bb55e8 561 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 562 {
jamesadevine 0:e1a608bb55e8 563 uint32_t result;
jamesadevine 0:e1a608bb55e8 564
jamesadevine 0:e1a608bb55e8 565 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 566 return(result);
jamesadevine 0:e1a608bb55e8 567 }
jamesadevine 0:e1a608bb55e8 568
jamesadevine 0:e1a608bb55e8 569 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 570 {
jamesadevine 0:e1a608bb55e8 571 uint32_t result;
jamesadevine 0:e1a608bb55e8 572
jamesadevine 0:e1a608bb55e8 573 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 574 return(result);
jamesadevine 0:e1a608bb55e8 575 }
jamesadevine 0:e1a608bb55e8 576
jamesadevine 0:e1a608bb55e8 577 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 578 {
jamesadevine 0:e1a608bb55e8 579 uint32_t result;
jamesadevine 0:e1a608bb55e8 580
jamesadevine 0:e1a608bb55e8 581 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 582 return(result);
jamesadevine 0:e1a608bb55e8 583 }
jamesadevine 0:e1a608bb55e8 584
jamesadevine 0:e1a608bb55e8 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
jamesadevine 0:e1a608bb55e8 586 {
jamesadevine 0:e1a608bb55e8 587 union llreg_u{
jamesadevine 0:e1a608bb55e8 588 uint32_t w32[2];
jamesadevine 0:e1a608bb55e8 589 uint64_t w64;
jamesadevine 0:e1a608bb55e8 590 } llr;
jamesadevine 0:e1a608bb55e8 591 llr.w64 = acc;
jamesadevine 0:e1a608bb55e8 592
jamesadevine 0:e1a608bb55e8 593 #ifndef __ARMEB__ // Little endian
jamesadevine 0:e1a608bb55e8 594 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
jamesadevine 0:e1a608bb55e8 595 #else // Big endian
jamesadevine 0:e1a608bb55e8 596 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
jamesadevine 0:e1a608bb55e8 597 #endif
jamesadevine 0:e1a608bb55e8 598
jamesadevine 0:e1a608bb55e8 599 return(llr.w64);
jamesadevine 0:e1a608bb55e8 600 }
jamesadevine 0:e1a608bb55e8 601
jamesadevine 0:e1a608bb55e8 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
jamesadevine 0:e1a608bb55e8 603 {
jamesadevine 0:e1a608bb55e8 604 union llreg_u{
jamesadevine 0:e1a608bb55e8 605 uint32_t w32[2];
jamesadevine 0:e1a608bb55e8 606 uint64_t w64;
jamesadevine 0:e1a608bb55e8 607 } llr;
jamesadevine 0:e1a608bb55e8 608 llr.w64 = acc;
jamesadevine 0:e1a608bb55e8 609
jamesadevine 0:e1a608bb55e8 610 #ifndef __ARMEB__ // Little endian
jamesadevine 0:e1a608bb55e8 611 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
jamesadevine 0:e1a608bb55e8 612 #else // Big endian
jamesadevine 0:e1a608bb55e8 613 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
jamesadevine 0:e1a608bb55e8 614 #endif
jamesadevine 0:e1a608bb55e8 615
jamesadevine 0:e1a608bb55e8 616 return(llr.w64);
jamesadevine 0:e1a608bb55e8 617 }
jamesadevine 0:e1a608bb55e8 618
jamesadevine 0:e1a608bb55e8 619 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 620 {
jamesadevine 0:e1a608bb55e8 621 uint32_t result;
jamesadevine 0:e1a608bb55e8 622
jamesadevine 0:e1a608bb55e8 623 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 624 return(result);
jamesadevine 0:e1a608bb55e8 625 }
jamesadevine 0:e1a608bb55e8 626
jamesadevine 0:e1a608bb55e8 627 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 628 {
jamesadevine 0:e1a608bb55e8 629 uint32_t result;
jamesadevine 0:e1a608bb55e8 630
jamesadevine 0:e1a608bb55e8 631 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 632 return(result);
jamesadevine 0:e1a608bb55e8 633 }
jamesadevine 0:e1a608bb55e8 634
jamesadevine 0:e1a608bb55e8 635 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 636 {
jamesadevine 0:e1a608bb55e8 637 uint32_t result;
jamesadevine 0:e1a608bb55e8 638
jamesadevine 0:e1a608bb55e8 639 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 640 return(result);
jamesadevine 0:e1a608bb55e8 641 }
jamesadevine 0:e1a608bb55e8 642
jamesadevine 0:e1a608bb55e8 643 #define __PKHBT(ARG1,ARG2,ARG3) \
jamesadevine 0:e1a608bb55e8 644 ({ \
jamesadevine 0:e1a608bb55e8 645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
jamesadevine 0:e1a608bb55e8 646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
jamesadevine 0:e1a608bb55e8 647 __RES; \
jamesadevine 0:e1a608bb55e8 648 })
jamesadevine 0:e1a608bb55e8 649
jamesadevine 0:e1a608bb55e8 650 #define __PKHTB(ARG1,ARG2,ARG3) \
jamesadevine 0:e1a608bb55e8 651 ({ \
jamesadevine 0:e1a608bb55e8 652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
jamesadevine 0:e1a608bb55e8 653 if (ARG3 == 0) \
jamesadevine 0:e1a608bb55e8 654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
jamesadevine 0:e1a608bb55e8 655 else \
jamesadevine 0:e1a608bb55e8 656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
jamesadevine 0:e1a608bb55e8 657 __RES; \
jamesadevine 0:e1a608bb55e8 658 })
jamesadevine 0:e1a608bb55e8 659
jamesadevine 0:e1a608bb55e8 660 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
jamesadevine 0:e1a608bb55e8 661 {
jamesadevine 0:e1a608bb55e8 662 int32_t result;
jamesadevine 0:e1a608bb55e8 663
jamesadevine 0:e1a608bb55e8 664 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 665 return(result);
jamesadevine 0:e1a608bb55e8 666 }
jamesadevine 0:e1a608bb55e8 667
jamesadevine 0:e1a608bb55e8 668
jamesadevine 0:e1a608bb55e8 669 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
jamesadevine 0:e1a608bb55e8 670 /* IAR iccarm specific functions */
jamesadevine 0:e1a608bb55e8 671 #include <cmsis_iar.h>
jamesadevine 0:e1a608bb55e8 672
jamesadevine 0:e1a608bb55e8 673
jamesadevine 0:e1a608bb55e8 674 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
jamesadevine 0:e1a608bb55e8 675 /* TI CCS specific functions */
jamesadevine 0:e1a608bb55e8 676 #include <cmsis_ccs.h>
jamesadevine 0:e1a608bb55e8 677
jamesadevine 0:e1a608bb55e8 678
jamesadevine 0:e1a608bb55e8 679 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
jamesadevine 0:e1a608bb55e8 680 /* TASKING carm specific functions */
jamesadevine 0:e1a608bb55e8 681 /* not yet supported */
jamesadevine 0:e1a608bb55e8 682
jamesadevine 0:e1a608bb55e8 683
jamesadevine 0:e1a608bb55e8 684 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
jamesadevine 0:e1a608bb55e8 685 /* Cosmic specific functions */
jamesadevine 0:e1a608bb55e8 686 #include <cmsis_csm.h>
jamesadevine 0:e1a608bb55e8 687
jamesadevine 0:e1a608bb55e8 688 #endif
jamesadevine 0:e1a608bb55e8 689
jamesadevine 0:e1a608bb55e8 690 /*@} end of group CMSIS_SIMD_intrinsics */
jamesadevine 0:e1a608bb55e8 691
jamesadevine 0:e1a608bb55e8 692
jamesadevine 0:e1a608bb55e8 693 #ifdef __cplusplus
jamesadevine 0:e1a608bb55e8 694 }
jamesadevine 0:e1a608bb55e8 695 #endif
jamesadevine 0:e1a608bb55e8 696
jamesadevine 0:e1a608bb55e8 697 #endif /* __CORE_CMSIMD_H */