Lancaster University / mbed-dev-bin

Binary version of Lancaster University's mbed branch, soon to be merged. The source lives here:https://developer.mbed.org/teams/Lancaster-University/code/mbed-src/

Dependents:   microbit-dal microbit-ble-open microbit-dal-eddystone microbit-dal ... more

Fork of mbed-lite-test by Lancaster University

TARGET_NRF51_MICROBIT/core_cm4_simd.h@3:768173a57492, 2016-07-13 (annotated)

Committer:
jamesadevine
Date:
Wed Jul 13 15:12:06 2016 +0100
Revision:
3:768173a57492
Parent:
0:e1a608bb55e8 
further updates to mbed-dev-bin

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jamesadevine 0:e1a608bb55e8 1 /**************************************************************************//**
jamesadevine 0:e1a608bb55e8 2 * @file core_cm4_simd.h
jamesadevine 0:e1a608bb55e8 3 * @brief CMSIS Cortex-M4 SIMD Header File
jamesadevine 0:e1a608bb55e8 4 * @version V3.20
jamesadevine 0:e1a608bb55e8 5 * @date 25. February 2013
jamesadevine 0:e1a608bb55e8 6 *
jamesadevine 0:e1a608bb55e8 7 * @note
jamesadevine 0:e1a608bb55e8 8 *
jamesadevine 0:e1a608bb55e8 9 ******************************************************************************/
jamesadevine 0:e1a608bb55e8 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
jamesadevine 0:e1a608bb55e8 11
jamesadevine 0:e1a608bb55e8 12 All rights reserved.
jamesadevine 0:e1a608bb55e8 13 Redistribution and use in source and binary forms, with or without
jamesadevine 0:e1a608bb55e8 14 modification, are permitted provided that the following conditions are met:
jamesadevine 0:e1a608bb55e8 15 - Redistributions of source code must retain the above copyright
jamesadevine 0:e1a608bb55e8 16 notice, this list of conditions and the following disclaimer.
jamesadevine 0:e1a608bb55e8 17 - Redistributions in binary form must reproduce the above copyright
jamesadevine 0:e1a608bb55e8 18 notice, this list of conditions and the following disclaimer in the
jamesadevine 0:e1a608bb55e8 19 documentation and/or other materials provided with the distribution.
jamesadevine 0:e1a608bb55e8 20 - Neither the name of ARM nor the names of its contributors may be used
jamesadevine 0:e1a608bb55e8 21 to endorse or promote products derived from this software without
jamesadevine 0:e1a608bb55e8 22 specific prior written permission.
jamesadevine 0:e1a608bb55e8 23 *
jamesadevine 0:e1a608bb55e8 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jamesadevine 0:e1a608bb55e8 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jamesadevine 0:e1a608bb55e8 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
jamesadevine 0:e1a608bb55e8 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
jamesadevine 0:e1a608bb55e8 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
jamesadevine 0:e1a608bb55e8 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
jamesadevine 0:e1a608bb55e8 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
jamesadevine 0:e1a608bb55e8 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
jamesadevine 0:e1a608bb55e8 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
jamesadevine 0:e1a608bb55e8 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
jamesadevine 0:e1a608bb55e8 34 POSSIBILITY OF SUCH DAMAGE.
jamesadevine 0:e1a608bb55e8 35 ---------------------------------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 36
jamesadevine 0:e1a608bb55e8 37
jamesadevine 0:e1a608bb55e8 38 #ifdef __cplusplus
jamesadevine 0:e1a608bb55e8 39 extern "C" {
jamesadevine 0:e1a608bb55e8 40 #endif
jamesadevine 0:e1a608bb55e8 41
jamesadevine 0:e1a608bb55e8 42 #ifndef __CORE_CM4_SIMD_H
jamesadevine 0:e1a608bb55e8 43 #define __CORE_CM4_SIMD_H
jamesadevine 0:e1a608bb55e8 44
jamesadevine 0:e1a608bb55e8 45
jamesadevine 0:e1a608bb55e8 46 /*******************************************************************************
jamesadevine 0:e1a608bb55e8 47 * Hardware Abstraction Layer
jamesadevine 0:e1a608bb55e8 48 ******************************************************************************/
jamesadevine 0:e1a608bb55e8 49
jamesadevine 0:e1a608bb55e8 50
jamesadevine 0:e1a608bb55e8 51 /* ################### Compiler specific Intrinsics ########################### */
jamesadevine 0:e1a608bb55e8 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
jamesadevine 0:e1a608bb55e8 53 Access to dedicated SIMD instructions
jamesadevine 0:e1a608bb55e8 54 @{
jamesadevine 0:e1a608bb55e8 55 */
jamesadevine 0:e1a608bb55e8 56
jamesadevine 0:e1a608bb55e8 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
jamesadevine 0:e1a608bb55e8 58 /* ARM armcc specific functions */
jamesadevine 0:e1a608bb55e8 59
jamesadevine 0:e1a608bb55e8 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 61 #define __SADD8 __sadd8
jamesadevine 0:e1a608bb55e8 62 #define __QADD8 __qadd8
jamesadevine 0:e1a608bb55e8 63 #define __SHADD8 __shadd8
jamesadevine 0:e1a608bb55e8 64 #define __UADD8 __uadd8
jamesadevine 0:e1a608bb55e8 65 #define __UQADD8 __uqadd8
jamesadevine 0:e1a608bb55e8 66 #define __UHADD8 __uhadd8
jamesadevine 0:e1a608bb55e8 67 #define __SSUB8 __ssub8
jamesadevine 0:e1a608bb55e8 68 #define __QSUB8 __qsub8
jamesadevine 0:e1a608bb55e8 69 #define __SHSUB8 __shsub8
jamesadevine 0:e1a608bb55e8 70 #define __USUB8 __usub8
jamesadevine 0:e1a608bb55e8 71 #define __UQSUB8 __uqsub8
jamesadevine 0:e1a608bb55e8 72 #define __UHSUB8 __uhsub8
jamesadevine 0:e1a608bb55e8 73 #define __SADD16 __sadd16
jamesadevine 0:e1a608bb55e8 74 #define __QADD16 __qadd16
jamesadevine 0:e1a608bb55e8 75 #define __SHADD16 __shadd16
jamesadevine 0:e1a608bb55e8 76 #define __UADD16 __uadd16
jamesadevine 0:e1a608bb55e8 77 #define __UQADD16 __uqadd16
jamesadevine 0:e1a608bb55e8 78 #define __UHADD16 __uhadd16
jamesadevine 0:e1a608bb55e8 79 #define __SSUB16 __ssub16
jamesadevine 0:e1a608bb55e8 80 #define __QSUB16 __qsub16
jamesadevine 0:e1a608bb55e8 81 #define __SHSUB16 __shsub16
jamesadevine 0:e1a608bb55e8 82 #define __USUB16 __usub16
jamesadevine 0:e1a608bb55e8 83 #define __UQSUB16 __uqsub16
jamesadevine 0:e1a608bb55e8 84 #define __UHSUB16 __uhsub16
jamesadevine 0:e1a608bb55e8 85 #define __SASX __sasx
jamesadevine 0:e1a608bb55e8 86 #define __QASX __qasx
jamesadevine 0:e1a608bb55e8 87 #define __SHASX __shasx
jamesadevine 0:e1a608bb55e8 88 #define __UASX __uasx
jamesadevine 0:e1a608bb55e8 89 #define __UQASX __uqasx
jamesadevine 0:e1a608bb55e8 90 #define __UHASX __uhasx
jamesadevine 0:e1a608bb55e8 91 #define __SSAX __ssax
jamesadevine 0:e1a608bb55e8 92 #define __QSAX __qsax
jamesadevine 0:e1a608bb55e8 93 #define __SHSAX __shsax
jamesadevine 0:e1a608bb55e8 94 #define __USAX __usax
jamesadevine 0:e1a608bb55e8 95 #define __UQSAX __uqsax
jamesadevine 0:e1a608bb55e8 96 #define __UHSAX __uhsax
jamesadevine 0:e1a608bb55e8 97 #define __USAD8 __usad8
jamesadevine 0:e1a608bb55e8 98 #define __USADA8 __usada8
jamesadevine 0:e1a608bb55e8 99 #define __SSAT16 __ssat16
jamesadevine 0:e1a608bb55e8 100 #define __USAT16 __usat16
jamesadevine 0:e1a608bb55e8 101 #define __UXTB16 __uxtb16
jamesadevine 0:e1a608bb55e8 102 #define __UXTAB16 __uxtab16
jamesadevine 0:e1a608bb55e8 103 #define __SXTB16 __sxtb16
jamesadevine 0:e1a608bb55e8 104 #define __SXTAB16 __sxtab16
jamesadevine 0:e1a608bb55e8 105 #define __SMUAD __smuad
jamesadevine 0:e1a608bb55e8 106 #define __SMUADX __smuadx
jamesadevine 0:e1a608bb55e8 107 #define __SMLAD __smlad
jamesadevine 0:e1a608bb55e8 108 #define __SMLADX __smladx
jamesadevine 0:e1a608bb55e8 109 #define __SMLALD __smlald
jamesadevine 0:e1a608bb55e8 110 #define __SMLALDX __smlaldx
jamesadevine 0:e1a608bb55e8 111 #define __SMUSD __smusd
jamesadevine 0:e1a608bb55e8 112 #define __SMUSDX __smusdx
jamesadevine 0:e1a608bb55e8 113 #define __SMLSD __smlsd
jamesadevine 0:e1a608bb55e8 114 #define __SMLSDX __smlsdx
jamesadevine 0:e1a608bb55e8 115 #define __SMLSLD __smlsld
jamesadevine 0:e1a608bb55e8 116 #define __SMLSLDX __smlsldx
jamesadevine 0:e1a608bb55e8 117 #define __SEL __sel
jamesadevine 0:e1a608bb55e8 118 #define __QADD __qadd
jamesadevine 0:e1a608bb55e8 119 #define __QSUB __qsub
jamesadevine 0:e1a608bb55e8 120
jamesadevine 0:e1a608bb55e8 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
jamesadevine 0:e1a608bb55e8 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
jamesadevine 0:e1a608bb55e8 123
jamesadevine 0:e1a608bb55e8 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
jamesadevine 0:e1a608bb55e8 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
jamesadevine 0:e1a608bb55e8 126
jamesadevine 0:e1a608bb55e8 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
jamesadevine 0:e1a608bb55e8 128 ((int64_t)(ARG3) << 32) ) >> 32))
jamesadevine 0:e1a608bb55e8 129
jamesadevine 0:e1a608bb55e8 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 131
jamesadevine 0:e1a608bb55e8 132
jamesadevine 0:e1a608bb55e8 133
jamesadevine 0:e1a608bb55e8 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
jamesadevine 0:e1a608bb55e8 135 /* IAR iccarm specific functions */
jamesadevine 0:e1a608bb55e8 136
jamesadevine 0:e1a608bb55e8 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 138 #include <cmsis_iar.h>
jamesadevine 0:e1a608bb55e8 139
jamesadevine 0:e1a608bb55e8 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 141
jamesadevine 0:e1a608bb55e8 142
jamesadevine 0:e1a608bb55e8 143
jamesadevine 0:e1a608bb55e8 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
jamesadevine 0:e1a608bb55e8 145 /* TI CCS specific functions */
jamesadevine 0:e1a608bb55e8 146
jamesadevine 0:e1a608bb55e8 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 148 #include <cmsis_ccs.h>
jamesadevine 0:e1a608bb55e8 149
jamesadevine 0:e1a608bb55e8 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 151
jamesadevine 0:e1a608bb55e8 152
jamesadevine 0:e1a608bb55e8 153
jamesadevine 0:e1a608bb55e8 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
jamesadevine 0:e1a608bb55e8 155 /* GNU gcc specific functions */
jamesadevine 0:e1a608bb55e8 156
jamesadevine 0:e1a608bb55e8 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 159 {
jamesadevine 0:e1a608bb55e8 160 uint32_t result;
jamesadevine 0:e1a608bb55e8 161
jamesadevine 0:e1a608bb55e8 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 163 return(result);
jamesadevine 0:e1a608bb55e8 164 }
jamesadevine 0:e1a608bb55e8 165
jamesadevine 0:e1a608bb55e8 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 167 {
jamesadevine 0:e1a608bb55e8 168 uint32_t result;
jamesadevine 0:e1a608bb55e8 169
jamesadevine 0:e1a608bb55e8 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 171 return(result);
jamesadevine 0:e1a608bb55e8 172 }
jamesadevine 0:e1a608bb55e8 173
jamesadevine 0:e1a608bb55e8 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 175 {
jamesadevine 0:e1a608bb55e8 176 uint32_t result;
jamesadevine 0:e1a608bb55e8 177
jamesadevine 0:e1a608bb55e8 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 179 return(result);
jamesadevine 0:e1a608bb55e8 180 }
jamesadevine 0:e1a608bb55e8 181
jamesadevine 0:e1a608bb55e8 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 183 {
jamesadevine 0:e1a608bb55e8 184 uint32_t result;
jamesadevine 0:e1a608bb55e8 185
jamesadevine 0:e1a608bb55e8 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 187 return(result);
jamesadevine 0:e1a608bb55e8 188 }
jamesadevine 0:e1a608bb55e8 189
jamesadevine 0:e1a608bb55e8 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 191 {
jamesadevine 0:e1a608bb55e8 192 uint32_t result;
jamesadevine 0:e1a608bb55e8 193
jamesadevine 0:e1a608bb55e8 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 195 return(result);
jamesadevine 0:e1a608bb55e8 196 }
jamesadevine 0:e1a608bb55e8 197
jamesadevine 0:e1a608bb55e8 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 199 {
jamesadevine 0:e1a608bb55e8 200 uint32_t result;
jamesadevine 0:e1a608bb55e8 201
jamesadevine 0:e1a608bb55e8 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 203 return(result);
jamesadevine 0:e1a608bb55e8 204 }
jamesadevine 0:e1a608bb55e8 205
jamesadevine 0:e1a608bb55e8 206
jamesadevine 0:e1a608bb55e8 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 208 {
jamesadevine 0:e1a608bb55e8 209 uint32_t result;
jamesadevine 0:e1a608bb55e8 210
jamesadevine 0:e1a608bb55e8 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 212 return(result);
jamesadevine 0:e1a608bb55e8 213 }
jamesadevine 0:e1a608bb55e8 214
jamesadevine 0:e1a608bb55e8 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 216 {
jamesadevine 0:e1a608bb55e8 217 uint32_t result;
jamesadevine 0:e1a608bb55e8 218
jamesadevine 0:e1a608bb55e8 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 220 return(result);
jamesadevine 0:e1a608bb55e8 221 }
jamesadevine 0:e1a608bb55e8 222
jamesadevine 0:e1a608bb55e8 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 224 {
jamesadevine 0:e1a608bb55e8 225 uint32_t result;
jamesadevine 0:e1a608bb55e8 226
jamesadevine 0:e1a608bb55e8 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 228 return(result);
jamesadevine 0:e1a608bb55e8 229 }
jamesadevine 0:e1a608bb55e8 230
jamesadevine 0:e1a608bb55e8 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 232 {
jamesadevine 0:e1a608bb55e8 233 uint32_t result;
jamesadevine 0:e1a608bb55e8 234
jamesadevine 0:e1a608bb55e8 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 236 return(result);
jamesadevine 0:e1a608bb55e8 237 }
jamesadevine 0:e1a608bb55e8 238
jamesadevine 0:e1a608bb55e8 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 240 {
jamesadevine 0:e1a608bb55e8 241 uint32_t result;
jamesadevine 0:e1a608bb55e8 242
jamesadevine 0:e1a608bb55e8 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 244 return(result);
jamesadevine 0:e1a608bb55e8 245 }
jamesadevine 0:e1a608bb55e8 246
jamesadevine 0:e1a608bb55e8 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 248 {
jamesadevine 0:e1a608bb55e8 249 uint32_t result;
jamesadevine 0:e1a608bb55e8 250
jamesadevine 0:e1a608bb55e8 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 252 return(result);
jamesadevine 0:e1a608bb55e8 253 }
jamesadevine 0:e1a608bb55e8 254
jamesadevine 0:e1a608bb55e8 255
jamesadevine 0:e1a608bb55e8 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 257 {
jamesadevine 0:e1a608bb55e8 258 uint32_t result;
jamesadevine 0:e1a608bb55e8 259
jamesadevine 0:e1a608bb55e8 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 261 return(result);
jamesadevine 0:e1a608bb55e8 262 }
jamesadevine 0:e1a608bb55e8 263
jamesadevine 0:e1a608bb55e8 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 265 {
jamesadevine 0:e1a608bb55e8 266 uint32_t result;
jamesadevine 0:e1a608bb55e8 267
jamesadevine 0:e1a608bb55e8 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 269 return(result);
jamesadevine 0:e1a608bb55e8 270 }
jamesadevine 0:e1a608bb55e8 271
jamesadevine 0:e1a608bb55e8 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 273 {
jamesadevine 0:e1a608bb55e8 274 uint32_t result;
jamesadevine 0:e1a608bb55e8 275
jamesadevine 0:e1a608bb55e8 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 277 return(result);
jamesadevine 0:e1a608bb55e8 278 }
jamesadevine 0:e1a608bb55e8 279
jamesadevine 0:e1a608bb55e8 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 281 {
jamesadevine 0:e1a608bb55e8 282 uint32_t result;
jamesadevine 0:e1a608bb55e8 283
jamesadevine 0:e1a608bb55e8 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 285 return(result);
jamesadevine 0:e1a608bb55e8 286 }
jamesadevine 0:e1a608bb55e8 287
jamesadevine 0:e1a608bb55e8 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 289 {
jamesadevine 0:e1a608bb55e8 290 uint32_t result;
jamesadevine 0:e1a608bb55e8 291
jamesadevine 0:e1a608bb55e8 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 293 return(result);
jamesadevine 0:e1a608bb55e8 294 }
jamesadevine 0:e1a608bb55e8 295
jamesadevine 0:e1a608bb55e8 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 297 {
jamesadevine 0:e1a608bb55e8 298 uint32_t result;
jamesadevine 0:e1a608bb55e8 299
jamesadevine 0:e1a608bb55e8 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 301 return(result);
jamesadevine 0:e1a608bb55e8 302 }
jamesadevine 0:e1a608bb55e8 303
jamesadevine 0:e1a608bb55e8 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 305 {
jamesadevine 0:e1a608bb55e8 306 uint32_t result;
jamesadevine 0:e1a608bb55e8 307
jamesadevine 0:e1a608bb55e8 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 309 return(result);
jamesadevine 0:e1a608bb55e8 310 }
jamesadevine 0:e1a608bb55e8 311
jamesadevine 0:e1a608bb55e8 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 313 {
jamesadevine 0:e1a608bb55e8 314 uint32_t result;
jamesadevine 0:e1a608bb55e8 315
jamesadevine 0:e1a608bb55e8 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 317 return(result);
jamesadevine 0:e1a608bb55e8 318 }
jamesadevine 0:e1a608bb55e8 319
jamesadevine 0:e1a608bb55e8 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 321 {
jamesadevine 0:e1a608bb55e8 322 uint32_t result;
jamesadevine 0:e1a608bb55e8 323
jamesadevine 0:e1a608bb55e8 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 325 return(result);
jamesadevine 0:e1a608bb55e8 326 }
jamesadevine 0:e1a608bb55e8 327
jamesadevine 0:e1a608bb55e8 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 329 {
jamesadevine 0:e1a608bb55e8 330 uint32_t result;
jamesadevine 0:e1a608bb55e8 331
jamesadevine 0:e1a608bb55e8 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 333 return(result);
jamesadevine 0:e1a608bb55e8 334 }
jamesadevine 0:e1a608bb55e8 335
jamesadevine 0:e1a608bb55e8 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 337 {
jamesadevine 0:e1a608bb55e8 338 uint32_t result;
jamesadevine 0:e1a608bb55e8 339
jamesadevine 0:e1a608bb55e8 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 341 return(result);
jamesadevine 0:e1a608bb55e8 342 }
jamesadevine 0:e1a608bb55e8 343
jamesadevine 0:e1a608bb55e8 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 345 {
jamesadevine 0:e1a608bb55e8 346 uint32_t result;
jamesadevine 0:e1a608bb55e8 347
jamesadevine 0:e1a608bb55e8 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 349 return(result);
jamesadevine 0:e1a608bb55e8 350 }
jamesadevine 0:e1a608bb55e8 351
jamesadevine 0:e1a608bb55e8 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 353 {
jamesadevine 0:e1a608bb55e8 354 uint32_t result;
jamesadevine 0:e1a608bb55e8 355
jamesadevine 0:e1a608bb55e8 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 357 return(result);
jamesadevine 0:e1a608bb55e8 358 }
jamesadevine 0:e1a608bb55e8 359
jamesadevine 0:e1a608bb55e8 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 361 {
jamesadevine 0:e1a608bb55e8 362 uint32_t result;
jamesadevine 0:e1a608bb55e8 363
jamesadevine 0:e1a608bb55e8 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 365 return(result);
jamesadevine 0:e1a608bb55e8 366 }
jamesadevine 0:e1a608bb55e8 367
jamesadevine 0:e1a608bb55e8 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 369 {
jamesadevine 0:e1a608bb55e8 370 uint32_t result;
jamesadevine 0:e1a608bb55e8 371
jamesadevine 0:e1a608bb55e8 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 373 return(result);
jamesadevine 0:e1a608bb55e8 374 }
jamesadevine 0:e1a608bb55e8 375
jamesadevine 0:e1a608bb55e8 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 377 {
jamesadevine 0:e1a608bb55e8 378 uint32_t result;
jamesadevine 0:e1a608bb55e8 379
jamesadevine 0:e1a608bb55e8 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 381 return(result);
jamesadevine 0:e1a608bb55e8 382 }
jamesadevine 0:e1a608bb55e8 383
jamesadevine 0:e1a608bb55e8 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 385 {
jamesadevine 0:e1a608bb55e8 386 uint32_t result;
jamesadevine 0:e1a608bb55e8 387
jamesadevine 0:e1a608bb55e8 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 389 return(result);
jamesadevine 0:e1a608bb55e8 390 }
jamesadevine 0:e1a608bb55e8 391
jamesadevine 0:e1a608bb55e8 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 393 {
jamesadevine 0:e1a608bb55e8 394 uint32_t result;
jamesadevine 0:e1a608bb55e8 395
jamesadevine 0:e1a608bb55e8 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 397 return(result);
jamesadevine 0:e1a608bb55e8 398 }
jamesadevine 0:e1a608bb55e8 399
jamesadevine 0:e1a608bb55e8 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 401 {
jamesadevine 0:e1a608bb55e8 402 uint32_t result;
jamesadevine 0:e1a608bb55e8 403
jamesadevine 0:e1a608bb55e8 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 405 return(result);
jamesadevine 0:e1a608bb55e8 406 }
jamesadevine 0:e1a608bb55e8 407
jamesadevine 0:e1a608bb55e8 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 409 {
jamesadevine 0:e1a608bb55e8 410 uint32_t result;
jamesadevine 0:e1a608bb55e8 411
jamesadevine 0:e1a608bb55e8 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 413 return(result);
jamesadevine 0:e1a608bb55e8 414 }
jamesadevine 0:e1a608bb55e8 415
jamesadevine 0:e1a608bb55e8 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 417 {
jamesadevine 0:e1a608bb55e8 418 uint32_t result;
jamesadevine 0:e1a608bb55e8 419
jamesadevine 0:e1a608bb55e8 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 421 return(result);
jamesadevine 0:e1a608bb55e8 422 }
jamesadevine 0:e1a608bb55e8 423
jamesadevine 0:e1a608bb55e8 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 425 {
jamesadevine 0:e1a608bb55e8 426 uint32_t result;
jamesadevine 0:e1a608bb55e8 427
jamesadevine 0:e1a608bb55e8 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 429 return(result);
jamesadevine 0:e1a608bb55e8 430 }
jamesadevine 0:e1a608bb55e8 431
jamesadevine 0:e1a608bb55e8 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 433 {
jamesadevine 0:e1a608bb55e8 434 uint32_t result;
jamesadevine 0:e1a608bb55e8 435
jamesadevine 0:e1a608bb55e8 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 437 return(result);
jamesadevine 0:e1a608bb55e8 438 }
jamesadevine 0:e1a608bb55e8 439
jamesadevine 0:e1a608bb55e8 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 441 {
jamesadevine 0:e1a608bb55e8 442 uint32_t result;
jamesadevine 0:e1a608bb55e8 443
jamesadevine 0:e1a608bb55e8 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 445 return(result);
jamesadevine 0:e1a608bb55e8 446 }
jamesadevine 0:e1a608bb55e8 447
jamesadevine 0:e1a608bb55e8 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 449 {
jamesadevine 0:e1a608bb55e8 450 uint32_t result;
jamesadevine 0:e1a608bb55e8 451
jamesadevine 0:e1a608bb55e8 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 453 return(result);
jamesadevine 0:e1a608bb55e8 454 }
jamesadevine 0:e1a608bb55e8 455
jamesadevine 0:e1a608bb55e8 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 457 {
jamesadevine 0:e1a608bb55e8 458 uint32_t result;
jamesadevine 0:e1a608bb55e8 459
jamesadevine 0:e1a608bb55e8 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 461 return(result);
jamesadevine 0:e1a608bb55e8 462 }
jamesadevine 0:e1a608bb55e8 463
jamesadevine 0:e1a608bb55e8 464 #define __SSAT16(ARG1,ARG2) \
jamesadevine 0:e1a608bb55e8 465 ({ \
jamesadevine 0:e1a608bb55e8 466 uint32_t __RES, __ARG1 = (ARG1); \
jamesadevine 0:e1a608bb55e8 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
jamesadevine 0:e1a608bb55e8 468 __RES; \
jamesadevine 0:e1a608bb55e8 469 })
jamesadevine 0:e1a608bb55e8 470
jamesadevine 0:e1a608bb55e8 471 #define __USAT16(ARG1,ARG2) \
jamesadevine 0:e1a608bb55e8 472 ({ \
jamesadevine 0:e1a608bb55e8 473 uint32_t __RES, __ARG1 = (ARG1); \
jamesadevine 0:e1a608bb55e8 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
jamesadevine 0:e1a608bb55e8 475 __RES; \
jamesadevine 0:e1a608bb55e8 476 })
jamesadevine 0:e1a608bb55e8 477
jamesadevine 0:e1a608bb55e8 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
jamesadevine 0:e1a608bb55e8 479 {
jamesadevine 0:e1a608bb55e8 480 uint32_t result;
jamesadevine 0:e1a608bb55e8 481
jamesadevine 0:e1a608bb55e8 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
jamesadevine 0:e1a608bb55e8 483 return(result);
jamesadevine 0:e1a608bb55e8 484 }
jamesadevine 0:e1a608bb55e8 485
jamesadevine 0:e1a608bb55e8 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 487 {
jamesadevine 0:e1a608bb55e8 488 uint32_t result;
jamesadevine 0:e1a608bb55e8 489
jamesadevine 0:e1a608bb55e8 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 491 return(result);
jamesadevine 0:e1a608bb55e8 492 }
jamesadevine 0:e1a608bb55e8 493
jamesadevine 0:e1a608bb55e8 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
jamesadevine 0:e1a608bb55e8 495 {
jamesadevine 0:e1a608bb55e8 496 uint32_t result;
jamesadevine 0:e1a608bb55e8 497
jamesadevine 0:e1a608bb55e8 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
jamesadevine 0:e1a608bb55e8 499 return(result);
jamesadevine 0:e1a608bb55e8 500 }
jamesadevine 0:e1a608bb55e8 501
jamesadevine 0:e1a608bb55e8 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 503 {
jamesadevine 0:e1a608bb55e8 504 uint32_t result;
jamesadevine 0:e1a608bb55e8 505
jamesadevine 0:e1a608bb55e8 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 507 return(result);
jamesadevine 0:e1a608bb55e8 508 }
jamesadevine 0:e1a608bb55e8 509
jamesadevine 0:e1a608bb55e8 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 511 {
jamesadevine 0:e1a608bb55e8 512 uint32_t result;
jamesadevine 0:e1a608bb55e8 513
jamesadevine 0:e1a608bb55e8 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 515 return(result);
jamesadevine 0:e1a608bb55e8 516 }
jamesadevine 0:e1a608bb55e8 517
jamesadevine 0:e1a608bb55e8 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 519 {
jamesadevine 0:e1a608bb55e8 520 uint32_t result;
jamesadevine 0:e1a608bb55e8 521
jamesadevine 0:e1a608bb55e8 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 523 return(result);
jamesadevine 0:e1a608bb55e8 524 }
jamesadevine 0:e1a608bb55e8 525
jamesadevine 0:e1a608bb55e8 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 527 {
jamesadevine 0:e1a608bb55e8 528 uint32_t result;
jamesadevine 0:e1a608bb55e8 529
jamesadevine 0:e1a608bb55e8 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 531 return(result);
jamesadevine 0:e1a608bb55e8 532 }
jamesadevine 0:e1a608bb55e8 533
jamesadevine 0:e1a608bb55e8 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 535 {
jamesadevine 0:e1a608bb55e8 536 uint32_t result;
jamesadevine 0:e1a608bb55e8 537
jamesadevine 0:e1a608bb55e8 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 539 return(result);
jamesadevine 0:e1a608bb55e8 540 }
jamesadevine 0:e1a608bb55e8 541
jamesadevine 0:e1a608bb55e8 542 #define __SMLALD(ARG1,ARG2,ARG3) \
jamesadevine 0:e1a608bb55e8 543 ({ \
jamesadevine 0:e1a608bb55e8 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
jamesadevine 0:e1a608bb55e8 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
jamesadevine 0:e1a608bb55e8 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
jamesadevine 0:e1a608bb55e8 547 })
jamesadevine 0:e1a608bb55e8 548
jamesadevine 0:e1a608bb55e8 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
jamesadevine 0:e1a608bb55e8 550 ({ \
jamesadevine 0:e1a608bb55e8 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
jamesadevine 0:e1a608bb55e8 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
jamesadevine 0:e1a608bb55e8 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
jamesadevine 0:e1a608bb55e8 554 })
jamesadevine 0:e1a608bb55e8 555
jamesadevine 0:e1a608bb55e8 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 557 {
jamesadevine 0:e1a608bb55e8 558 uint32_t result;
jamesadevine 0:e1a608bb55e8 559
jamesadevine 0:e1a608bb55e8 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 561 return(result);
jamesadevine 0:e1a608bb55e8 562 }
jamesadevine 0:e1a608bb55e8 563
jamesadevine 0:e1a608bb55e8 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 565 {
jamesadevine 0:e1a608bb55e8 566 uint32_t result;
jamesadevine 0:e1a608bb55e8 567
jamesadevine 0:e1a608bb55e8 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 569 return(result);
jamesadevine 0:e1a608bb55e8 570 }
jamesadevine 0:e1a608bb55e8 571
jamesadevine 0:e1a608bb55e8 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 573 {
jamesadevine 0:e1a608bb55e8 574 uint32_t result;
jamesadevine 0:e1a608bb55e8 575
jamesadevine 0:e1a608bb55e8 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 577 return(result);
jamesadevine 0:e1a608bb55e8 578 }
jamesadevine 0:e1a608bb55e8 579
jamesadevine 0:e1a608bb55e8 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
jamesadevine 0:e1a608bb55e8 581 {
jamesadevine 0:e1a608bb55e8 582 uint32_t result;
jamesadevine 0:e1a608bb55e8 583
jamesadevine 0:e1a608bb55e8 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 585 return(result);
jamesadevine 0:e1a608bb55e8 586 }
jamesadevine 0:e1a608bb55e8 587
jamesadevine 0:e1a608bb55e8 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
jamesadevine 0:e1a608bb55e8 589 ({ \
jamesadevine 0:e1a608bb55e8 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
jamesadevine 0:e1a608bb55e8 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
jamesadevine 0:e1a608bb55e8 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
jamesadevine 0:e1a608bb55e8 593 })
jamesadevine 0:e1a608bb55e8 594
jamesadevine 0:e1a608bb55e8 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
jamesadevine 0:e1a608bb55e8 596 ({ \
jamesadevine 0:e1a608bb55e8 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
jamesadevine 0:e1a608bb55e8 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
jamesadevine 0:e1a608bb55e8 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
jamesadevine 0:e1a608bb55e8 600 })
jamesadevine 0:e1a608bb55e8 601
jamesadevine 0:e1a608bb55e8 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 603 {
jamesadevine 0:e1a608bb55e8 604 uint32_t result;
jamesadevine 0:e1a608bb55e8 605
jamesadevine 0:e1a608bb55e8 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 607 return(result);
jamesadevine 0:e1a608bb55e8 608 }
jamesadevine 0:e1a608bb55e8 609
jamesadevine 0:e1a608bb55e8 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 611 {
jamesadevine 0:e1a608bb55e8 612 uint32_t result;
jamesadevine 0:e1a608bb55e8 613
jamesadevine 0:e1a608bb55e8 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 615 return(result);
jamesadevine 0:e1a608bb55e8 616 }
jamesadevine 0:e1a608bb55e8 617
jamesadevine 0:e1a608bb55e8 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
jamesadevine 0:e1a608bb55e8 619 {
jamesadevine 0:e1a608bb55e8 620 uint32_t result;
jamesadevine 0:e1a608bb55e8 621
jamesadevine 0:e1a608bb55e8 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
jamesadevine 0:e1a608bb55e8 623 return(result);
jamesadevine 0:e1a608bb55e8 624 }
jamesadevine 0:e1a608bb55e8 625
jamesadevine 0:e1a608bb55e8 626 #define __PKHBT(ARG1,ARG2,ARG3) \
jamesadevine 0:e1a608bb55e8 627 ({ \
jamesadevine 0:e1a608bb55e8 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
jamesadevine 0:e1a608bb55e8 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
jamesadevine 0:e1a608bb55e8 630 __RES; \
jamesadevine 0:e1a608bb55e8 631 })
jamesadevine 0:e1a608bb55e8 632
jamesadevine 0:e1a608bb55e8 633 #define __PKHTB(ARG1,ARG2,ARG3) \
jamesadevine 0:e1a608bb55e8 634 ({ \
jamesadevine 0:e1a608bb55e8 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
jamesadevine 0:e1a608bb55e8 636 if (ARG3 == 0) \
jamesadevine 0:e1a608bb55e8 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
jamesadevine 0:e1a608bb55e8 638 else \
jamesadevine 0:e1a608bb55e8 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
jamesadevine 0:e1a608bb55e8 640 __RES; \
jamesadevine 0:e1a608bb55e8 641 })
jamesadevine 0:e1a608bb55e8 642
jamesadevine 0:e1a608bb55e8 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
jamesadevine 0:e1a608bb55e8 644 {
jamesadevine 0:e1a608bb55e8 645 int32_t result;
jamesadevine 0:e1a608bb55e8 646
jamesadevine 0:e1a608bb55e8 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
jamesadevine 0:e1a608bb55e8 648 return(result);
jamesadevine 0:e1a608bb55e8 649 }
jamesadevine 0:e1a608bb55e8 650
jamesadevine 0:e1a608bb55e8 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 652
jamesadevine 0:e1a608bb55e8 653
jamesadevine 0:e1a608bb55e8 654
jamesadevine 0:e1a608bb55e8 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
jamesadevine 0:e1a608bb55e8 656 /* TASKING carm specific functions */
jamesadevine 0:e1a608bb55e8 657
jamesadevine 0:e1a608bb55e8 658
jamesadevine 0:e1a608bb55e8 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 660 /* not yet supported */
jamesadevine 0:e1a608bb55e8 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 662
jamesadevine 0:e1a608bb55e8 663
jamesadevine 0:e1a608bb55e8 664 #endif
jamesadevine 0:e1a608bb55e8 665
jamesadevine 0:e1a608bb55e8 666 /*@} end of group CMSIS_SIMD_intrinsics */
jamesadevine 0:e1a608bb55e8 667
jamesadevine 0:e1a608bb55e8 668
jamesadevine 0:e1a608bb55e8 669 #endif /* __CORE_CM4_SIMD_H */
jamesadevine 0:e1a608bb55e8 670
jamesadevine 0:e1a608bb55e8 671 #ifdef __cplusplus
jamesadevine 0:e1a608bb55e8 672 }
jamesadevine 0:e1a608bb55e8 673 #endif