Lancaster University / mbed-dev-bin

Binary version of Lancaster University's mbed branch, soon to be merged. The source lives here:https://developer.mbed.org/teams/Lancaster-University/code/mbed-src/

Dependents:   microbit-dal microbit-ble-open microbit-dal-eddystone microbit-dal ... more

Fork of mbed-lite-test by Lancaster University

TARGET_NRF51_MICROBIT/core_ca_mmu.h@3:768173a57492, 2016-07-13 (annotated)

Committer:
jamesadevine
Date:
Wed Jul 13 15:12:06 2016 +0100
Revision:
3:768173a57492
Parent:
0:e1a608bb55e8 
further updates to mbed-dev-bin

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jamesadevine 0:e1a608bb55e8 1 ;/**************************************************************************//**
jamesadevine 0:e1a608bb55e8 2 ; * @file core_ca_mmu.h
jamesadevine 0:e1a608bb55e8 3 ; * @brief MMU Startup File for
jamesadevine 0:e1a608bb55e8 4 ; * VE_A9_MP Device Series
jamesadevine 0:e1a608bb55e8 5 ; * @version V1.01
jamesadevine 0:e1a608bb55e8 6 ; * @date 25 March 2013
jamesadevine 0:e1a608bb55e8 7 ; *
jamesadevine 0:e1a608bb55e8 8 ; * @note
jamesadevine 0:e1a608bb55e8 9 ; *
jamesadevine 0:e1a608bb55e8 10 ; ******************************************************************************/
jamesadevine 0:e1a608bb55e8 11 ;/* Copyright (c) 2012 ARM LIMITED
jamesadevine 0:e1a608bb55e8 12 ;
jamesadevine 0:e1a608bb55e8 13 ; All rights reserved.
jamesadevine 0:e1a608bb55e8 14 ; Redistribution and use in source and binary forms, with or without
jamesadevine 0:e1a608bb55e8 15 ; modification, are permitted provided that the following conditions are met:
jamesadevine 0:e1a608bb55e8 16 ; - Redistributions of source code must retain the above copyright
jamesadevine 0:e1a608bb55e8 17 ; notice, this list of conditions and the following disclaimer.
jamesadevine 0:e1a608bb55e8 18 ; - Redistributions in binary form must reproduce the above copyright
jamesadevine 0:e1a608bb55e8 19 ; notice, this list of conditions and the following disclaimer in the
jamesadevine 0:e1a608bb55e8 20 ; documentation and/or other materials provided with the distribution.
jamesadevine 0:e1a608bb55e8 21 ; - Neither the name of ARM nor the names of its contributors may be used
jamesadevine 0:e1a608bb55e8 22 ; to endorse or promote products derived from this software without
jamesadevine 0:e1a608bb55e8 23 ; specific prior written permission.
jamesadevine 0:e1a608bb55e8 24 ; *
jamesadevine 0:e1a608bb55e8 25 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jamesadevine 0:e1a608bb55e8 26 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jamesadevine 0:e1a608bb55e8 27 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
jamesadevine 0:e1a608bb55e8 28 ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
jamesadevine 0:e1a608bb55e8 29 ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
jamesadevine 0:e1a608bb55e8 30 ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
jamesadevine 0:e1a608bb55e8 31 ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
jamesadevine 0:e1a608bb55e8 32 ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
jamesadevine 0:e1a608bb55e8 33 ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
jamesadevine 0:e1a608bb55e8 34 ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
jamesadevine 0:e1a608bb55e8 35 ; POSSIBILITY OF SUCH DAMAGE.
jamesadevine 0:e1a608bb55e8 36 ; ---------------------------------------------------------------------------*/
jamesadevine 0:e1a608bb55e8 37
jamesadevine 0:e1a608bb55e8 38 #ifdef __cplusplus
jamesadevine 0:e1a608bb55e8 39 extern "C" {
jamesadevine 0:e1a608bb55e8 40 #endif
jamesadevine 0:e1a608bb55e8 41
jamesadevine 0:e1a608bb55e8 42 #ifndef _MMU_FUNC_H
jamesadevine 0:e1a608bb55e8 43 #define _MMU_FUNC_H
jamesadevine 0:e1a608bb55e8 44
jamesadevine 0:e1a608bb55e8 45 #define SECTION_DESCRIPTOR (0x2)
jamesadevine 0:e1a608bb55e8 46 #define SECTION_MASK (0xFFFFFFFC)
jamesadevine 0:e1a608bb55e8 47
jamesadevine 0:e1a608bb55e8 48 #define SECTION_TEXCB_MASK (0xFFFF8FF3)
jamesadevine 0:e1a608bb55e8 49 #define SECTION_B_SHIFT (2)
jamesadevine 0:e1a608bb55e8 50 #define SECTION_C_SHIFT (3)
jamesadevine 0:e1a608bb55e8 51 #define SECTION_TEX0_SHIFT (12)
jamesadevine 0:e1a608bb55e8 52 #define SECTION_TEX1_SHIFT (13)
jamesadevine 0:e1a608bb55e8 53 #define SECTION_TEX2_SHIFT (14)
jamesadevine 0:e1a608bb55e8 54
jamesadevine 0:e1a608bb55e8 55 #define SECTION_XN_MASK (0xFFFFFFEF)
jamesadevine 0:e1a608bb55e8 56 #define SECTION_XN_SHIFT (4)
jamesadevine 0:e1a608bb55e8 57
jamesadevine 0:e1a608bb55e8 58 #define SECTION_DOMAIN_MASK (0xFFFFFE1F)
jamesadevine 0:e1a608bb55e8 59 #define SECTION_DOMAIN_SHIFT (5)
jamesadevine 0:e1a608bb55e8 60
jamesadevine 0:e1a608bb55e8 61 #define SECTION_P_MASK (0xFFFFFDFF)
jamesadevine 0:e1a608bb55e8 62 #define SECTION_P_SHIFT (9)
jamesadevine 0:e1a608bb55e8 63
jamesadevine 0:e1a608bb55e8 64 #define SECTION_AP_MASK (0xFFFF73FF)
jamesadevine 0:e1a608bb55e8 65 #define SECTION_AP_SHIFT (10)
jamesadevine 0:e1a608bb55e8 66 #define SECTION_AP2_SHIFT (15)
jamesadevine 0:e1a608bb55e8 67
jamesadevine 0:e1a608bb55e8 68 #define SECTION_S_MASK (0xFFFEFFFF)
jamesadevine 0:e1a608bb55e8 69 #define SECTION_S_SHIFT (16)
jamesadevine 0:e1a608bb55e8 70
jamesadevine 0:e1a608bb55e8 71 #define SECTION_NG_MASK (0xFFFDFFFF)
jamesadevine 0:e1a608bb55e8 72 #define SECTION_NG_SHIFT (17)
jamesadevine 0:e1a608bb55e8 73
jamesadevine 0:e1a608bb55e8 74 #define SECTION_NS_MASK (0xFFF7FFFF)
jamesadevine 0:e1a608bb55e8 75 #define SECTION_NS_SHIFT (19)
jamesadevine 0:e1a608bb55e8 76
jamesadevine 0:e1a608bb55e8 77
jamesadevine 0:e1a608bb55e8 78 #define PAGE_L1_DESCRIPTOR (0x1)
jamesadevine 0:e1a608bb55e8 79 #define PAGE_L1_MASK (0xFFFFFFFC)
jamesadevine 0:e1a608bb55e8 80
jamesadevine 0:e1a608bb55e8 81 #define PAGE_L2_4K_DESC (0x2)
jamesadevine 0:e1a608bb55e8 82 #define PAGE_L2_4K_MASK (0xFFFFFFFD)
jamesadevine 0:e1a608bb55e8 83
jamesadevine 0:e1a608bb55e8 84 #define PAGE_L2_64K_DESC (0x1)
jamesadevine 0:e1a608bb55e8 85 #define PAGE_L2_64K_MASK (0xFFFFFFFC)
jamesadevine 0:e1a608bb55e8 86
jamesadevine 0:e1a608bb55e8 87 #define PAGE_4K_TEXCB_MASK (0xFFFFFE33)
jamesadevine 0:e1a608bb55e8 88 #define PAGE_4K_B_SHIFT (2)
jamesadevine 0:e1a608bb55e8 89 #define PAGE_4K_C_SHIFT (3)
jamesadevine 0:e1a608bb55e8 90 #define PAGE_4K_TEX0_SHIFT (6)
jamesadevine 0:e1a608bb55e8 91 #define PAGE_4K_TEX1_SHIFT (7)
jamesadevine 0:e1a608bb55e8 92 #define PAGE_4K_TEX2_SHIFT (8)
jamesadevine 0:e1a608bb55e8 93
jamesadevine 0:e1a608bb55e8 94 #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3)
jamesadevine 0:e1a608bb55e8 95 #define PAGE_64K_B_SHIFT (2)
jamesadevine 0:e1a608bb55e8 96 #define PAGE_64K_C_SHIFT (3)
jamesadevine 0:e1a608bb55e8 97 #define PAGE_64K_TEX0_SHIFT (12)
jamesadevine 0:e1a608bb55e8 98 #define PAGE_64K_TEX1_SHIFT (13)
jamesadevine 0:e1a608bb55e8 99 #define PAGE_64K_TEX2_SHIFT (14)
jamesadevine 0:e1a608bb55e8 100
jamesadevine 0:e1a608bb55e8 101 #define PAGE_TEXCB_MASK (0xFFFF8FF3)
jamesadevine 0:e1a608bb55e8 102 #define PAGE_B_SHIFT (2)
jamesadevine 0:e1a608bb55e8 103 #define PAGE_C_SHIFT (3)
jamesadevine 0:e1a608bb55e8 104 #define PAGE_TEX_SHIFT (12)
jamesadevine 0:e1a608bb55e8 105
jamesadevine 0:e1a608bb55e8 106 #define PAGE_XN_4K_MASK (0xFFFFFFFE)
jamesadevine 0:e1a608bb55e8 107 #define PAGE_XN_4K_SHIFT (0)
jamesadevine 0:e1a608bb55e8 108 #define PAGE_XN_64K_MASK (0xFFFF7FFF)
jamesadevine 0:e1a608bb55e8 109 #define PAGE_XN_64K_SHIFT (15)
jamesadevine 0:e1a608bb55e8 110
jamesadevine 0:e1a608bb55e8 111
jamesadevine 0:e1a608bb55e8 112 #define PAGE_DOMAIN_MASK (0xFFFFFE1F)
jamesadevine 0:e1a608bb55e8 113 #define PAGE_DOMAIN_SHIFT (5)
jamesadevine 0:e1a608bb55e8 114
jamesadevine 0:e1a608bb55e8 115 #define PAGE_P_MASK (0xFFFFFDFF)
jamesadevine 0:e1a608bb55e8 116 #define PAGE_P_SHIFT (9)
jamesadevine 0:e1a608bb55e8 117
jamesadevine 0:e1a608bb55e8 118 #define PAGE_AP_MASK (0xFFFFFDCF)
jamesadevine 0:e1a608bb55e8 119 #define PAGE_AP_SHIFT (4)
jamesadevine 0:e1a608bb55e8 120 #define PAGE_AP2_SHIFT (9)
jamesadevine 0:e1a608bb55e8 121
jamesadevine 0:e1a608bb55e8 122 #define PAGE_S_MASK (0xFFFFFBFF)
jamesadevine 0:e1a608bb55e8 123 #define PAGE_S_SHIFT (10)
jamesadevine 0:e1a608bb55e8 124
jamesadevine 0:e1a608bb55e8 125 #define PAGE_NG_MASK (0xFFFFF7FF)
jamesadevine 0:e1a608bb55e8 126 #define PAGE_NG_SHIFT (11)
jamesadevine 0:e1a608bb55e8 127
jamesadevine 0:e1a608bb55e8 128 #define PAGE_NS_MASK (0xFFFFFFF7)
jamesadevine 0:e1a608bb55e8 129 #define PAGE_NS_SHIFT (3)
jamesadevine 0:e1a608bb55e8 130
jamesadevine 0:e1a608bb55e8 131 #define OFFSET_1M (0x00100000)
jamesadevine 0:e1a608bb55e8 132 #define OFFSET_64K (0x00010000)
jamesadevine 0:e1a608bb55e8 133 #define OFFSET_4K (0x00001000)
jamesadevine 0:e1a608bb55e8 134
jamesadevine 0:e1a608bb55e8 135 #define DESCRIPTOR_FAULT (0x00000000)
jamesadevine 0:e1a608bb55e8 136
jamesadevine 0:e1a608bb55e8 137 /* ########################### MMU Function Access ########################### */
jamesadevine 0:e1a608bb55e8 138 /** \ingroup MMU_FunctionInterface
jamesadevine 0:e1a608bb55e8 139 \defgroup MMU_Functions MMU Functions Interface
jamesadevine 0:e1a608bb55e8 140 @{
jamesadevine 0:e1a608bb55e8 141 */
jamesadevine 0:e1a608bb55e8 142
jamesadevine 0:e1a608bb55e8 143 /* Attributes enumerations */
jamesadevine 0:e1a608bb55e8 144
jamesadevine 0:e1a608bb55e8 145 /* Region size attributes */
jamesadevine 0:e1a608bb55e8 146 typedef enum
jamesadevine 0:e1a608bb55e8 147 {
jamesadevine 0:e1a608bb55e8 148 SECTION,
jamesadevine 0:e1a608bb55e8 149 PAGE_4k,
jamesadevine 0:e1a608bb55e8 150 PAGE_64k,
jamesadevine 0:e1a608bb55e8 151 } mmu_region_size_Type;
jamesadevine 0:e1a608bb55e8 152
jamesadevine 0:e1a608bb55e8 153 /* Region type attributes */
jamesadevine 0:e1a608bb55e8 154 typedef enum
jamesadevine 0:e1a608bb55e8 155 {
jamesadevine 0:e1a608bb55e8 156 NORMAL,
jamesadevine 0:e1a608bb55e8 157 DEVICE,
jamesadevine 0:e1a608bb55e8 158 SHARED_DEVICE,
jamesadevine 0:e1a608bb55e8 159 NON_SHARED_DEVICE,
jamesadevine 0:e1a608bb55e8 160 STRONGLY_ORDERED
jamesadevine 0:e1a608bb55e8 161 } mmu_memory_Type;
jamesadevine 0:e1a608bb55e8 162
jamesadevine 0:e1a608bb55e8 163 /* Region cacheability attributes */
jamesadevine 0:e1a608bb55e8 164 typedef enum
jamesadevine 0:e1a608bb55e8 165 {
jamesadevine 0:e1a608bb55e8 166 NON_CACHEABLE,
jamesadevine 0:e1a608bb55e8 167 WB_WA,
jamesadevine 0:e1a608bb55e8 168 WT,
jamesadevine 0:e1a608bb55e8 169 WB_NO_WA,
jamesadevine 0:e1a608bb55e8 170 } mmu_cacheability_Type;
jamesadevine 0:e1a608bb55e8 171
jamesadevine 0:e1a608bb55e8 172 /* Region parity check attributes */
jamesadevine 0:e1a608bb55e8 173 typedef enum
jamesadevine 0:e1a608bb55e8 174 {
jamesadevine 0:e1a608bb55e8 175 ECC_DISABLED,
jamesadevine 0:e1a608bb55e8 176 ECC_ENABLED,
jamesadevine 0:e1a608bb55e8 177 } mmu_ecc_check_Type;
jamesadevine 0:e1a608bb55e8 178
jamesadevine 0:e1a608bb55e8 179 /* Region execution attributes */
jamesadevine 0:e1a608bb55e8 180 typedef enum
jamesadevine 0:e1a608bb55e8 181 {
jamesadevine 0:e1a608bb55e8 182 EXECUTE,
jamesadevine 0:e1a608bb55e8 183 NON_EXECUTE,
jamesadevine 0:e1a608bb55e8 184 } mmu_execute_Type;
jamesadevine 0:e1a608bb55e8 185
jamesadevine 0:e1a608bb55e8 186 /* Region global attributes */
jamesadevine 0:e1a608bb55e8 187 typedef enum
jamesadevine 0:e1a608bb55e8 188 {
jamesadevine 0:e1a608bb55e8 189 GLOBAL,
jamesadevine 0:e1a608bb55e8 190 NON_GLOBAL,
jamesadevine 0:e1a608bb55e8 191 } mmu_global_Type;
jamesadevine 0:e1a608bb55e8 192
jamesadevine 0:e1a608bb55e8 193 /* Region shareability attributes */
jamesadevine 0:e1a608bb55e8 194 typedef enum
jamesadevine 0:e1a608bb55e8 195 {
jamesadevine 0:e1a608bb55e8 196 NON_SHARED,
jamesadevine 0:e1a608bb55e8 197 SHARED,
jamesadevine 0:e1a608bb55e8 198 } mmu_shared_Type;
jamesadevine 0:e1a608bb55e8 199
jamesadevine 0:e1a608bb55e8 200 /* Region security attributes */
jamesadevine 0:e1a608bb55e8 201 typedef enum
jamesadevine 0:e1a608bb55e8 202 {
jamesadevine 0:e1a608bb55e8 203 SECURE,
jamesadevine 0:e1a608bb55e8 204 NON_SECURE,
jamesadevine 0:e1a608bb55e8 205 } mmu_secure_Type;
jamesadevine 0:e1a608bb55e8 206
jamesadevine 0:e1a608bb55e8 207 /* Region access attributes */
jamesadevine 0:e1a608bb55e8 208 typedef enum
jamesadevine 0:e1a608bb55e8 209 {
jamesadevine 0:e1a608bb55e8 210 NO_ACCESS,
jamesadevine 0:e1a608bb55e8 211 RW,
jamesadevine 0:e1a608bb55e8 212 READ,
jamesadevine 0:e1a608bb55e8 213 } mmu_access_Type;
jamesadevine 0:e1a608bb55e8 214
jamesadevine 0:e1a608bb55e8 215 /* Memory Region definition */
jamesadevine 0:e1a608bb55e8 216 typedef struct RegionStruct {
jamesadevine 0:e1a608bb55e8 217 mmu_region_size_Type rg_t;
jamesadevine 0:e1a608bb55e8 218 mmu_memory_Type mem_t;
jamesadevine 0:e1a608bb55e8 219 uint8_t domain;
jamesadevine 0:e1a608bb55e8 220 mmu_cacheability_Type inner_norm_t;
jamesadevine 0:e1a608bb55e8 221 mmu_cacheability_Type outer_norm_t;
jamesadevine 0:e1a608bb55e8 222 mmu_ecc_check_Type e_t;
jamesadevine 0:e1a608bb55e8 223 mmu_execute_Type xn_t;
jamesadevine 0:e1a608bb55e8 224 mmu_global_Type g_t;
jamesadevine 0:e1a608bb55e8 225 mmu_secure_Type sec_t;
jamesadevine 0:e1a608bb55e8 226 mmu_access_Type priv_t;
jamesadevine 0:e1a608bb55e8 227 mmu_access_Type user_t;
jamesadevine 0:e1a608bb55e8 228 mmu_shared_Type sh_t;
jamesadevine 0:e1a608bb55e8 229
jamesadevine 0:e1a608bb55e8 230 } mmu_region_attributes_Type;
jamesadevine 0:e1a608bb55e8 231
jamesadevine 0:e1a608bb55e8 232 /** \brief Set section execution-never attribute
jamesadevine 0:e1a608bb55e8 233
jamesadevine 0:e1a608bb55e8 234 The function sets section execution-never attribute
jamesadevine 0:e1a608bb55e8 235
jamesadevine 0:e1a608bb55e8 236 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 237 \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE.
jamesadevine 0:e1a608bb55e8 238
jamesadevine 0:e1a608bb55e8 239 \return 0
jamesadevine 0:e1a608bb55e8 240 */
jamesadevine 0:e1a608bb55e8 241 __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn)
jamesadevine 0:e1a608bb55e8 242 {
jamesadevine 0:e1a608bb55e8 243 *descriptor_l1 &= SECTION_XN_MASK;
jamesadevine 0:e1a608bb55e8 244 *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
jamesadevine 0:e1a608bb55e8 245 return 0;
jamesadevine 0:e1a608bb55e8 246 }
jamesadevine 0:e1a608bb55e8 247
jamesadevine 0:e1a608bb55e8 248 /** \brief Set section domain
jamesadevine 0:e1a608bb55e8 249
jamesadevine 0:e1a608bb55e8 250 The function sets section domain
jamesadevine 0:e1a608bb55e8 251
jamesadevine 0:e1a608bb55e8 252 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 253 \param [in] domain Section domain
jamesadevine 0:e1a608bb55e8 254
jamesadevine 0:e1a608bb55e8 255 \return 0
jamesadevine 0:e1a608bb55e8 256 */
jamesadevine 0:e1a608bb55e8 257 __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain)
jamesadevine 0:e1a608bb55e8 258 {
jamesadevine 0:e1a608bb55e8 259 *descriptor_l1 &= SECTION_DOMAIN_MASK;
jamesadevine 0:e1a608bb55e8 260 *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
jamesadevine 0:e1a608bb55e8 261 return 0;
jamesadevine 0:e1a608bb55e8 262 }
jamesadevine 0:e1a608bb55e8 263
jamesadevine 0:e1a608bb55e8 264 /** \brief Set section parity check
jamesadevine 0:e1a608bb55e8 265
jamesadevine 0:e1a608bb55e8 266 The function sets section parity check
jamesadevine 0:e1a608bb55e8 267
jamesadevine 0:e1a608bb55e8 268 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 269 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
jamesadevine 0:e1a608bb55e8 270
jamesadevine 0:e1a608bb55e8 271 \return 0
jamesadevine 0:e1a608bb55e8 272 */
jamesadevine 0:e1a608bb55e8 273 __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
jamesadevine 0:e1a608bb55e8 274 {
jamesadevine 0:e1a608bb55e8 275 *descriptor_l1 &= SECTION_P_MASK;
jamesadevine 0:e1a608bb55e8 276 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
jamesadevine 0:e1a608bb55e8 277 return 0;
jamesadevine 0:e1a608bb55e8 278 }
jamesadevine 0:e1a608bb55e8 279
jamesadevine 0:e1a608bb55e8 280 /** \brief Set section access privileges
jamesadevine 0:e1a608bb55e8 281
jamesadevine 0:e1a608bb55e8 282 The function sets section access privileges
jamesadevine 0:e1a608bb55e8 283
jamesadevine 0:e1a608bb55e8 284 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 285 \param [in] user User Level Access: NO_ACCESS, RW, READ
jamesadevine 0:e1a608bb55e8 286 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
jamesadevine 0:e1a608bb55e8 287 \param [in] afe Access flag enable
jamesadevine 0:e1a608bb55e8 288
jamesadevine 0:e1a608bb55e8 289 \return 0
jamesadevine 0:e1a608bb55e8 290 */
jamesadevine 0:e1a608bb55e8 291 __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
jamesadevine 0:e1a608bb55e8 292 {
jamesadevine 0:e1a608bb55e8 293 uint32_t ap = 0;
jamesadevine 0:e1a608bb55e8 294
jamesadevine 0:e1a608bb55e8 295 if (afe == 0) { //full access
jamesadevine 0:e1a608bb55e8 296 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
jamesadevine 0:e1a608bb55e8 297 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
jamesadevine 0:e1a608bb55e8 298 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
jamesadevine 0:e1a608bb55e8 299 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
jamesadevine 0:e1a608bb55e8 300 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
jamesadevine 0:e1a608bb55e8 301 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
jamesadevine 0:e1a608bb55e8 302 }
jamesadevine 0:e1a608bb55e8 303
jamesadevine 0:e1a608bb55e8 304 else { //Simplified access
jamesadevine 0:e1a608bb55e8 305 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
jamesadevine 0:e1a608bb55e8 306 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
jamesadevine 0:e1a608bb55e8 307 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
jamesadevine 0:e1a608bb55e8 308 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
jamesadevine 0:e1a608bb55e8 309 }
jamesadevine 0:e1a608bb55e8 310
jamesadevine 0:e1a608bb55e8 311 *descriptor_l1 &= SECTION_AP_MASK;
jamesadevine 0:e1a608bb55e8 312 *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
jamesadevine 0:e1a608bb55e8 313 *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
jamesadevine 0:e1a608bb55e8 314
jamesadevine 0:e1a608bb55e8 315 return 0;
jamesadevine 0:e1a608bb55e8 316 }
jamesadevine 0:e1a608bb55e8 317
jamesadevine 0:e1a608bb55e8 318 /** \brief Set section shareability
jamesadevine 0:e1a608bb55e8 319
jamesadevine 0:e1a608bb55e8 320 The function sets section shareability
jamesadevine 0:e1a608bb55e8 321
jamesadevine 0:e1a608bb55e8 322 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 323 \param [in] s_bit Section shareability: NON_SHARED, SHARED
jamesadevine 0:e1a608bb55e8 324
jamesadevine 0:e1a608bb55e8 325 \return 0
jamesadevine 0:e1a608bb55e8 326 */
jamesadevine 0:e1a608bb55e8 327 __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
jamesadevine 0:e1a608bb55e8 328 {
jamesadevine 0:e1a608bb55e8 329 *descriptor_l1 &= SECTION_S_MASK;
jamesadevine 0:e1a608bb55e8 330 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
jamesadevine 0:e1a608bb55e8 331 return 0;
jamesadevine 0:e1a608bb55e8 332 }
jamesadevine 0:e1a608bb55e8 333
jamesadevine 0:e1a608bb55e8 334 /** \brief Set section Global attribute
jamesadevine 0:e1a608bb55e8 335
jamesadevine 0:e1a608bb55e8 336 The function sets section Global attribute
jamesadevine 0:e1a608bb55e8 337
jamesadevine 0:e1a608bb55e8 338 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 339 \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL
jamesadevine 0:e1a608bb55e8 340
jamesadevine 0:e1a608bb55e8 341 \return 0
jamesadevine 0:e1a608bb55e8 342 */
jamesadevine 0:e1a608bb55e8 343 __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit)
jamesadevine 0:e1a608bb55e8 344 {
jamesadevine 0:e1a608bb55e8 345 *descriptor_l1 &= SECTION_NG_MASK;
jamesadevine 0:e1a608bb55e8 346 *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
jamesadevine 0:e1a608bb55e8 347 return 0;
jamesadevine 0:e1a608bb55e8 348 }
jamesadevine 0:e1a608bb55e8 349
jamesadevine 0:e1a608bb55e8 350 /** \brief Set section Security attribute
jamesadevine 0:e1a608bb55e8 351
jamesadevine 0:e1a608bb55e8 352 The function sets section Global attribute
jamesadevine 0:e1a608bb55e8 353
jamesadevine 0:e1a608bb55e8 354 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 355 \param [in] s_bit Section Security attribute: SECURE, NON_SECURE
jamesadevine 0:e1a608bb55e8 356
jamesadevine 0:e1a608bb55e8 357 \return 0
jamesadevine 0:e1a608bb55e8 358 */
jamesadevine 0:e1a608bb55e8 359 __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
jamesadevine 0:e1a608bb55e8 360 {
jamesadevine 0:e1a608bb55e8 361 *descriptor_l1 &= SECTION_NS_MASK;
jamesadevine 0:e1a608bb55e8 362 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
jamesadevine 0:e1a608bb55e8 363 return 0;
jamesadevine 0:e1a608bb55e8 364 }
jamesadevine 0:e1a608bb55e8 365
jamesadevine 0:e1a608bb55e8 366 /* Page 4k or 64k */
jamesadevine 0:e1a608bb55e8 367 /** \brief Set 4k/64k page execution-never attribute
jamesadevine 0:e1a608bb55e8 368
jamesadevine 0:e1a608bb55e8 369 The function sets 4k/64k page execution-never attribute
jamesadevine 0:e1a608bb55e8 370
jamesadevine 0:e1a608bb55e8 371 \param [out] descriptor_l2 L2 descriptor.
jamesadevine 0:e1a608bb55e8 372 \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE.
jamesadevine 0:e1a608bb55e8 373 \param [in] page Page size: PAGE_4k, PAGE_64k,
jamesadevine 0:e1a608bb55e8 374
jamesadevine 0:e1a608bb55e8 375 \return 0
jamesadevine 0:e1a608bb55e8 376 */
jamesadevine 0:e1a608bb55e8 377 __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
jamesadevine 0:e1a608bb55e8 378 {
jamesadevine 0:e1a608bb55e8 379 if (page == PAGE_4k)
jamesadevine 0:e1a608bb55e8 380 {
jamesadevine 0:e1a608bb55e8 381 *descriptor_l2 &= PAGE_XN_4K_MASK;
jamesadevine 0:e1a608bb55e8 382 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
jamesadevine 0:e1a608bb55e8 383 }
jamesadevine 0:e1a608bb55e8 384 else
jamesadevine 0:e1a608bb55e8 385 {
jamesadevine 0:e1a608bb55e8 386 *descriptor_l2 &= PAGE_XN_64K_MASK;
jamesadevine 0:e1a608bb55e8 387 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
jamesadevine 0:e1a608bb55e8 388 }
jamesadevine 0:e1a608bb55e8 389 return 0;
jamesadevine 0:e1a608bb55e8 390 }
jamesadevine 0:e1a608bb55e8 391
jamesadevine 0:e1a608bb55e8 392 /** \brief Set 4k/64k page domain
jamesadevine 0:e1a608bb55e8 393
jamesadevine 0:e1a608bb55e8 394 The function sets 4k/64k page domain
jamesadevine 0:e1a608bb55e8 395
jamesadevine 0:e1a608bb55e8 396 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 397 \param [in] domain Page domain
jamesadevine 0:e1a608bb55e8 398
jamesadevine 0:e1a608bb55e8 399 \return 0
jamesadevine 0:e1a608bb55e8 400 */
jamesadevine 0:e1a608bb55e8 401 __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain)
jamesadevine 0:e1a608bb55e8 402 {
jamesadevine 0:e1a608bb55e8 403 *descriptor_l1 &= PAGE_DOMAIN_MASK;
jamesadevine 0:e1a608bb55e8 404 *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
jamesadevine 0:e1a608bb55e8 405 return 0;
jamesadevine 0:e1a608bb55e8 406 }
jamesadevine 0:e1a608bb55e8 407
jamesadevine 0:e1a608bb55e8 408 /** \brief Set 4k/64k page parity check
jamesadevine 0:e1a608bb55e8 409
jamesadevine 0:e1a608bb55e8 410 The function sets 4k/64k page parity check
jamesadevine 0:e1a608bb55e8 411
jamesadevine 0:e1a608bb55e8 412 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 413 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
jamesadevine 0:e1a608bb55e8 414
jamesadevine 0:e1a608bb55e8 415 \return 0
jamesadevine 0:e1a608bb55e8 416 */
jamesadevine 0:e1a608bb55e8 417 __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
jamesadevine 0:e1a608bb55e8 418 {
jamesadevine 0:e1a608bb55e8 419 *descriptor_l1 &= SECTION_P_MASK;
jamesadevine 0:e1a608bb55e8 420 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
jamesadevine 0:e1a608bb55e8 421 return 0;
jamesadevine 0:e1a608bb55e8 422 }
jamesadevine 0:e1a608bb55e8 423
jamesadevine 0:e1a608bb55e8 424 /** \brief Set 4k/64k page access privileges
jamesadevine 0:e1a608bb55e8 425
jamesadevine 0:e1a608bb55e8 426 The function sets 4k/64k page access privileges
jamesadevine 0:e1a608bb55e8 427
jamesadevine 0:e1a608bb55e8 428 \param [out] descriptor_l2 L2 descriptor.
jamesadevine 0:e1a608bb55e8 429 \param [in] user User Level Access: NO_ACCESS, RW, READ
jamesadevine 0:e1a608bb55e8 430 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
jamesadevine 0:e1a608bb55e8 431 \param [in] afe Access flag enable
jamesadevine 0:e1a608bb55e8 432
jamesadevine 0:e1a608bb55e8 433 \return 0
jamesadevine 0:e1a608bb55e8 434 */
jamesadevine 0:e1a608bb55e8 435 __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
jamesadevine 0:e1a608bb55e8 436 {
jamesadevine 0:e1a608bb55e8 437 uint32_t ap = 0;
jamesadevine 0:e1a608bb55e8 438
jamesadevine 0:e1a608bb55e8 439 if (afe == 0) { //full access
jamesadevine 0:e1a608bb55e8 440 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
jamesadevine 0:e1a608bb55e8 441 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
jamesadevine 0:e1a608bb55e8 442 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
jamesadevine 0:e1a608bb55e8 443 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
jamesadevine 0:e1a608bb55e8 444 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
jamesadevine 0:e1a608bb55e8 445 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
jamesadevine 0:e1a608bb55e8 446 }
jamesadevine 0:e1a608bb55e8 447
jamesadevine 0:e1a608bb55e8 448 else { //Simplified access
jamesadevine 0:e1a608bb55e8 449 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
jamesadevine 0:e1a608bb55e8 450 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
jamesadevine 0:e1a608bb55e8 451 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
jamesadevine 0:e1a608bb55e8 452 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
jamesadevine 0:e1a608bb55e8 453 }
jamesadevine 0:e1a608bb55e8 454
jamesadevine 0:e1a608bb55e8 455 *descriptor_l2 &= PAGE_AP_MASK;
jamesadevine 0:e1a608bb55e8 456 *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
jamesadevine 0:e1a608bb55e8 457 *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
jamesadevine 0:e1a608bb55e8 458
jamesadevine 0:e1a608bb55e8 459 return 0;
jamesadevine 0:e1a608bb55e8 460 }
jamesadevine 0:e1a608bb55e8 461
jamesadevine 0:e1a608bb55e8 462 /** \brief Set 4k/64k page shareability
jamesadevine 0:e1a608bb55e8 463
jamesadevine 0:e1a608bb55e8 464 The function sets 4k/64k page shareability
jamesadevine 0:e1a608bb55e8 465
jamesadevine 0:e1a608bb55e8 466 \param [out] descriptor_l2 L2 descriptor.
jamesadevine 0:e1a608bb55e8 467 \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED
jamesadevine 0:e1a608bb55e8 468
jamesadevine 0:e1a608bb55e8 469 \return 0
jamesadevine 0:e1a608bb55e8 470 */
jamesadevine 0:e1a608bb55e8 471 __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
jamesadevine 0:e1a608bb55e8 472 {
jamesadevine 0:e1a608bb55e8 473 *descriptor_l2 &= PAGE_S_MASK;
jamesadevine 0:e1a608bb55e8 474 *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
jamesadevine 0:e1a608bb55e8 475 return 0;
jamesadevine 0:e1a608bb55e8 476 }
jamesadevine 0:e1a608bb55e8 477
jamesadevine 0:e1a608bb55e8 478 /** \brief Set 4k/64k page Global attribute
jamesadevine 0:e1a608bb55e8 479
jamesadevine 0:e1a608bb55e8 480 The function sets 4k/64k page Global attribute
jamesadevine 0:e1a608bb55e8 481
jamesadevine 0:e1a608bb55e8 482 \param [out] descriptor_l2 L2 descriptor.
jamesadevine 0:e1a608bb55e8 483 \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL
jamesadevine 0:e1a608bb55e8 484
jamesadevine 0:e1a608bb55e8 485 \return 0
jamesadevine 0:e1a608bb55e8 486 */
jamesadevine 0:e1a608bb55e8 487 __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit)
jamesadevine 0:e1a608bb55e8 488 {
jamesadevine 0:e1a608bb55e8 489 *descriptor_l2 &= PAGE_NG_MASK;
jamesadevine 0:e1a608bb55e8 490 *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
jamesadevine 0:e1a608bb55e8 491 return 0;
jamesadevine 0:e1a608bb55e8 492 }
jamesadevine 0:e1a608bb55e8 493
jamesadevine 0:e1a608bb55e8 494 /** \brief Set 4k/64k page Security attribute
jamesadevine 0:e1a608bb55e8 495
jamesadevine 0:e1a608bb55e8 496 The function sets 4k/64k page Global attribute
jamesadevine 0:e1a608bb55e8 497
jamesadevine 0:e1a608bb55e8 498 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 499 \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE
jamesadevine 0:e1a608bb55e8 500
jamesadevine 0:e1a608bb55e8 501 \return 0
jamesadevine 0:e1a608bb55e8 502 */
jamesadevine 0:e1a608bb55e8 503 __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
jamesadevine 0:e1a608bb55e8 504 {
jamesadevine 0:e1a608bb55e8 505 *descriptor_l1 &= PAGE_NS_MASK;
jamesadevine 0:e1a608bb55e8 506 *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
jamesadevine 0:e1a608bb55e8 507 return 0;
jamesadevine 0:e1a608bb55e8 508 }
jamesadevine 0:e1a608bb55e8 509
jamesadevine 0:e1a608bb55e8 510
jamesadevine 0:e1a608bb55e8 511 /** \brief Set Section memory attributes
jamesadevine 0:e1a608bb55e8 512
jamesadevine 0:e1a608bb55e8 513 The function sets section memory attributes
jamesadevine 0:e1a608bb55e8 514
jamesadevine 0:e1a608bb55e8 515 \param [out] descriptor_l1 L1 descriptor.
jamesadevine 0:e1a608bb55e8 516 \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
jamesadevine 0:e1a608bb55e8 517 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
jamesadevine 0:e1a608bb55e8 518 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
jamesadevine 0:e1a608bb55e8 519
jamesadevine 0:e1a608bb55e8 520 \return 0
jamesadevine 0:e1a608bb55e8 521 */
jamesadevine 0:e1a608bb55e8 522 __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
jamesadevine 0:e1a608bb55e8 523 {
jamesadevine 0:e1a608bb55e8 524 *descriptor_l1 &= SECTION_TEXCB_MASK;
jamesadevine 0:e1a608bb55e8 525
jamesadevine 0:e1a608bb55e8 526 if (STRONGLY_ORDERED == mem)
jamesadevine 0:e1a608bb55e8 527 {
jamesadevine 0:e1a608bb55e8 528 return 0;
jamesadevine 0:e1a608bb55e8 529 }
jamesadevine 0:e1a608bb55e8 530 else if (SHARED_DEVICE == mem)
jamesadevine 0:e1a608bb55e8 531 {
jamesadevine 0:e1a608bb55e8 532 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
jamesadevine 0:e1a608bb55e8 533 }
jamesadevine 0:e1a608bb55e8 534 else if (NON_SHARED_DEVICE == mem)
jamesadevine 0:e1a608bb55e8 535 {
jamesadevine 0:e1a608bb55e8 536 *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
jamesadevine 0:e1a608bb55e8 537 }
jamesadevine 0:e1a608bb55e8 538 else if (NORMAL == mem)
jamesadevine 0:e1a608bb55e8 539 {
jamesadevine 0:e1a608bb55e8 540 *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
jamesadevine 0:e1a608bb55e8 541 switch(inner)
jamesadevine 0:e1a608bb55e8 542 {
jamesadevine 0:e1a608bb55e8 543 case NON_CACHEABLE:
jamesadevine 0:e1a608bb55e8 544 break;
jamesadevine 0:e1a608bb55e8 545 case WB_WA:
jamesadevine 0:e1a608bb55e8 546 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
jamesadevine 0:e1a608bb55e8 547 break;
jamesadevine 0:e1a608bb55e8 548 case WT:
jamesadevine 0:e1a608bb55e8 549 *descriptor_l1 |= 1 << SECTION_C_SHIFT;
jamesadevine 0:e1a608bb55e8 550 break;
jamesadevine 0:e1a608bb55e8 551 case WB_NO_WA:
jamesadevine 0:e1a608bb55e8 552 *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
jamesadevine 0:e1a608bb55e8 553 break;
jamesadevine 0:e1a608bb55e8 554 }
jamesadevine 0:e1a608bb55e8 555 switch(outer)
jamesadevine 0:e1a608bb55e8 556 {
jamesadevine 0:e1a608bb55e8 557 case NON_CACHEABLE:
jamesadevine 0:e1a608bb55e8 558 break;
jamesadevine 0:e1a608bb55e8 559 case WB_WA:
jamesadevine 0:e1a608bb55e8 560 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
jamesadevine 0:e1a608bb55e8 561 break;
jamesadevine 0:e1a608bb55e8 562 case WT:
jamesadevine 0:e1a608bb55e8 563 *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
jamesadevine 0:e1a608bb55e8 564 break;
jamesadevine 0:e1a608bb55e8 565 case WB_NO_WA:
jamesadevine 0:e1a608bb55e8 566 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
jamesadevine 0:e1a608bb55e8 567 break;
jamesadevine 0:e1a608bb55e8 568 }
jamesadevine 0:e1a608bb55e8 569 }
jamesadevine 0:e1a608bb55e8 570
jamesadevine 0:e1a608bb55e8 571 return 0;
jamesadevine 0:e1a608bb55e8 572 }
jamesadevine 0:e1a608bb55e8 573
jamesadevine 0:e1a608bb55e8 574 /** \brief Set 4k/64k page memory attributes
jamesadevine 0:e1a608bb55e8 575
jamesadevine 0:e1a608bb55e8 576 The function sets 4k/64k page memory attributes
jamesadevine 0:e1a608bb55e8 577
jamesadevine 0:e1a608bb55e8 578 \param [out] descriptor_l2 L2 descriptor.
jamesadevine 0:e1a608bb55e8 579 \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
jamesadevine 0:e1a608bb55e8 580 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
jamesadevine 0:e1a608bb55e8 581 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
jamesadevine 0:e1a608bb55e8 582
jamesadevine 0:e1a608bb55e8 583 \return 0
jamesadevine 0:e1a608bb55e8 584 */
jamesadevine 0:e1a608bb55e8 585 __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
jamesadevine 0:e1a608bb55e8 586 {
jamesadevine 0:e1a608bb55e8 587 *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
jamesadevine 0:e1a608bb55e8 588
jamesadevine 0:e1a608bb55e8 589 if (page == PAGE_64k)
jamesadevine 0:e1a608bb55e8 590 {
jamesadevine 0:e1a608bb55e8 591 //same as section
jamesadevine 0:e1a608bb55e8 592 __memory_section(descriptor_l2, mem, outer, inner);
jamesadevine 0:e1a608bb55e8 593 }
jamesadevine 0:e1a608bb55e8 594 else
jamesadevine 0:e1a608bb55e8 595 {
jamesadevine 0:e1a608bb55e8 596 if (STRONGLY_ORDERED == mem)
jamesadevine 0:e1a608bb55e8 597 {
jamesadevine 0:e1a608bb55e8 598 return 0;
jamesadevine 0:e1a608bb55e8 599 }
jamesadevine 0:e1a608bb55e8 600 else if (SHARED_DEVICE == mem)
jamesadevine 0:e1a608bb55e8 601 {
jamesadevine 0:e1a608bb55e8 602 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
jamesadevine 0:e1a608bb55e8 603 }
jamesadevine 0:e1a608bb55e8 604 else if (NON_SHARED_DEVICE == mem)
jamesadevine 0:e1a608bb55e8 605 {
jamesadevine 0:e1a608bb55e8 606 *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
jamesadevine 0:e1a608bb55e8 607 }
jamesadevine 0:e1a608bb55e8 608 else if (NORMAL == mem)
jamesadevine 0:e1a608bb55e8 609 {
jamesadevine 0:e1a608bb55e8 610 *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
jamesadevine 0:e1a608bb55e8 611 switch(inner)
jamesadevine 0:e1a608bb55e8 612 {
jamesadevine 0:e1a608bb55e8 613 case NON_CACHEABLE:
jamesadevine 0:e1a608bb55e8 614 break;
jamesadevine 0:e1a608bb55e8 615 case WB_WA:
jamesadevine 0:e1a608bb55e8 616 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
jamesadevine 0:e1a608bb55e8 617 break;
jamesadevine 0:e1a608bb55e8 618 case WT:
jamesadevine 0:e1a608bb55e8 619 *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
jamesadevine 0:e1a608bb55e8 620 break;
jamesadevine 0:e1a608bb55e8 621 case WB_NO_WA:
jamesadevine 0:e1a608bb55e8 622 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
jamesadevine 0:e1a608bb55e8 623 break;
jamesadevine 0:e1a608bb55e8 624 }
jamesadevine 0:e1a608bb55e8 625 switch(outer)
jamesadevine 0:e1a608bb55e8 626 {
jamesadevine 0:e1a608bb55e8 627 case NON_CACHEABLE:
jamesadevine 0:e1a608bb55e8 628 break;
jamesadevine 0:e1a608bb55e8 629 case WB_WA:
jamesadevine 0:e1a608bb55e8 630 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
jamesadevine 0:e1a608bb55e8 631 break;
jamesadevine 0:e1a608bb55e8 632 case WT:
jamesadevine 0:e1a608bb55e8 633 *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
jamesadevine 0:e1a608bb55e8 634 break;
jamesadevine 0:e1a608bb55e8 635 case WB_NO_WA:
jamesadevine 0:e1a608bb55e8 636 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
jamesadevine 0:e1a608bb55e8 637 break;
jamesadevine 0:e1a608bb55e8 638 }
jamesadevine 0:e1a608bb55e8 639 }
jamesadevine 0:e1a608bb55e8 640 }
jamesadevine 0:e1a608bb55e8 641
jamesadevine 0:e1a608bb55e8 642 return 0;
jamesadevine 0:e1a608bb55e8 643 }
jamesadevine 0:e1a608bb55e8 644
jamesadevine 0:e1a608bb55e8 645 /** \brief Create a L1 section descriptor
jamesadevine 0:e1a608bb55e8 646
jamesadevine 0:e1a608bb55e8 647 The function creates a section descriptor.
jamesadevine 0:e1a608bb55e8 648
jamesadevine 0:e1a608bb55e8 649 Assumptions:
jamesadevine 0:e1a608bb55e8 650 - 16MB super sections not suported
jamesadevine 0:e1a608bb55e8 651 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
jamesadevine 0:e1a608bb55e8 652 - Functions always return 0
jamesadevine 0:e1a608bb55e8 653
jamesadevine 0:e1a608bb55e8 654 \param [out] descriptor L1 descriptor
jamesadevine 0:e1a608bb55e8 655 \param [out] descriptor2 L2 descriptor
jamesadevine 0:e1a608bb55e8 656 \param [in] reg Section attributes
jamesadevine 0:e1a608bb55e8 657
jamesadevine 0:e1a608bb55e8 658 \return 0
jamesadevine 0:e1a608bb55e8 659 */
jamesadevine 0:e1a608bb55e8 660 __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
jamesadevine 0:e1a608bb55e8 661 {
jamesadevine 0:e1a608bb55e8 662 *descriptor = 0;
jamesadevine 0:e1a608bb55e8 663
jamesadevine 0:e1a608bb55e8 664 __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
jamesadevine 0:e1a608bb55e8 665 __xn_section(descriptor,reg.xn_t);
jamesadevine 0:e1a608bb55e8 666 __domain_section(descriptor, reg.domain);
jamesadevine 0:e1a608bb55e8 667 __p_section(descriptor, reg.e_t);
jamesadevine 0:e1a608bb55e8 668 __ap_section(descriptor, reg.priv_t, reg.user_t, 1);
jamesadevine 0:e1a608bb55e8 669 __shared_section(descriptor,reg.sh_t);
jamesadevine 0:e1a608bb55e8 670 __global_section(descriptor,reg.g_t);
jamesadevine 0:e1a608bb55e8 671 __secure_section(descriptor,reg.sec_t);
jamesadevine 0:e1a608bb55e8 672 *descriptor &= SECTION_MASK;
jamesadevine 0:e1a608bb55e8 673 *descriptor |= SECTION_DESCRIPTOR;
jamesadevine 0:e1a608bb55e8 674
jamesadevine 0:e1a608bb55e8 675 return 0;
jamesadevine 0:e1a608bb55e8 676
jamesadevine 0:e1a608bb55e8 677 }
jamesadevine 0:e1a608bb55e8 678
jamesadevine 0:e1a608bb55e8 679
jamesadevine 0:e1a608bb55e8 680 /** \brief Create a L1 and L2 4k/64k page descriptor
jamesadevine 0:e1a608bb55e8 681
jamesadevine 0:e1a608bb55e8 682 The function creates a 4k/64k page descriptor.
jamesadevine 0:e1a608bb55e8 683 Assumptions:
jamesadevine 0:e1a608bb55e8 684 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
jamesadevine 0:e1a608bb55e8 685 - Functions always return 0
jamesadevine 0:e1a608bb55e8 686
jamesadevine 0:e1a608bb55e8 687 \param [out] descriptor L1 descriptor
jamesadevine 0:e1a608bb55e8 688 \param [out] descriptor2 L2 descriptor
jamesadevine 0:e1a608bb55e8 689 \param [in] reg 4k/64k page attributes
jamesadevine 0:e1a608bb55e8 690
jamesadevine 0:e1a608bb55e8 691 \return 0
jamesadevine 0:e1a608bb55e8 692 */
jamesadevine 0:e1a608bb55e8 693 __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
jamesadevine 0:e1a608bb55e8 694 {
jamesadevine 0:e1a608bb55e8 695 *descriptor = 0;
jamesadevine 0:e1a608bb55e8 696 *descriptor2 = 0;
jamesadevine 0:e1a608bb55e8 697
jamesadevine 0:e1a608bb55e8 698 switch (reg.rg_t)
jamesadevine 0:e1a608bb55e8 699 {
jamesadevine 0:e1a608bb55e8 700 case PAGE_4k:
jamesadevine 0:e1a608bb55e8 701 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
jamesadevine 0:e1a608bb55e8 702 __xn_page(descriptor2, reg.xn_t, PAGE_4k);
jamesadevine 0:e1a608bb55e8 703 __domain_page(descriptor, reg.domain);
jamesadevine 0:e1a608bb55e8 704 __p_page(descriptor, reg.e_t);
jamesadevine 0:e1a608bb55e8 705 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
jamesadevine 0:e1a608bb55e8 706 __shared_page(descriptor2,reg.sh_t);
jamesadevine 0:e1a608bb55e8 707 __global_page(descriptor2,reg.g_t);
jamesadevine 0:e1a608bb55e8 708 __secure_page(descriptor,reg.sec_t);
jamesadevine 0:e1a608bb55e8 709 *descriptor &= PAGE_L1_MASK;
jamesadevine 0:e1a608bb55e8 710 *descriptor |= PAGE_L1_DESCRIPTOR;
jamesadevine 0:e1a608bb55e8 711 *descriptor2 &= PAGE_L2_4K_MASK;
jamesadevine 0:e1a608bb55e8 712 *descriptor2 |= PAGE_L2_4K_DESC;
jamesadevine 0:e1a608bb55e8 713 break;
jamesadevine 0:e1a608bb55e8 714
jamesadevine 0:e1a608bb55e8 715 case PAGE_64k:
jamesadevine 0:e1a608bb55e8 716 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
jamesadevine 0:e1a608bb55e8 717 __xn_page(descriptor2, reg.xn_t, PAGE_64k);
jamesadevine 0:e1a608bb55e8 718 __domain_page(descriptor, reg.domain);
jamesadevine 0:e1a608bb55e8 719 __p_page(descriptor, reg.e_t);
jamesadevine 0:e1a608bb55e8 720 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
jamesadevine 0:e1a608bb55e8 721 __shared_page(descriptor2,reg.sh_t);
jamesadevine 0:e1a608bb55e8 722 __global_page(descriptor2,reg.g_t);
jamesadevine 0:e1a608bb55e8 723 __secure_page(descriptor,reg.sec_t);
jamesadevine 0:e1a608bb55e8 724 *descriptor &= PAGE_L1_MASK;
jamesadevine 0:e1a608bb55e8 725 *descriptor |= PAGE_L1_DESCRIPTOR;
jamesadevine 0:e1a608bb55e8 726 *descriptor2 &= PAGE_L2_64K_MASK;
jamesadevine 0:e1a608bb55e8 727 *descriptor2 |= PAGE_L2_64K_DESC;
jamesadevine 0:e1a608bb55e8 728 break;
jamesadevine 0:e1a608bb55e8 729
jamesadevine 0:e1a608bb55e8 730 case SECTION:
jamesadevine 0:e1a608bb55e8 731 //error
jamesadevine 0:e1a608bb55e8 732 break;
jamesadevine 0:e1a608bb55e8 733
jamesadevine 0:e1a608bb55e8 734 }
jamesadevine 0:e1a608bb55e8 735
jamesadevine 0:e1a608bb55e8 736 return 0;
jamesadevine 0:e1a608bb55e8 737
jamesadevine 0:e1a608bb55e8 738 }
jamesadevine 0:e1a608bb55e8 739
jamesadevine 0:e1a608bb55e8 740 /** \brief Create a 1MB Section
jamesadevine 0:e1a608bb55e8 741
jamesadevine 0:e1a608bb55e8 742 \param [in] ttb Translation table base address
jamesadevine 0:e1a608bb55e8 743 \param [in] base_address Section base address
jamesadevine 0:e1a608bb55e8 744 \param [in] count Number of sections to create
jamesadevine 0:e1a608bb55e8 745 \param [in] descriptor_l1 L1 descriptor (region attributes)
jamesadevine 0:e1a608bb55e8 746
jamesadevine 0:e1a608bb55e8 747 */
jamesadevine 0:e1a608bb55e8 748 __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
jamesadevine 0:e1a608bb55e8 749 {
jamesadevine 0:e1a608bb55e8 750 uint32_t offset;
jamesadevine 0:e1a608bb55e8 751 uint32_t entry;
jamesadevine 0:e1a608bb55e8 752 uint32_t i;
jamesadevine 0:e1a608bb55e8 753
jamesadevine 0:e1a608bb55e8 754 offset = base_address >> 20;
jamesadevine 0:e1a608bb55e8 755 entry = (base_address & 0xFFF00000) | descriptor_l1;
jamesadevine 0:e1a608bb55e8 756
jamesadevine 0:e1a608bb55e8 757 //4 bytes aligned
jamesadevine 0:e1a608bb55e8 758 ttb = ttb + offset;
jamesadevine 0:e1a608bb55e8 759
jamesadevine 0:e1a608bb55e8 760 for (i = 0; i < count; i++ )
jamesadevine 0:e1a608bb55e8 761 {
jamesadevine 0:e1a608bb55e8 762 //4 bytes aligned
jamesadevine 0:e1a608bb55e8 763 *ttb++ = entry;
jamesadevine 0:e1a608bb55e8 764 entry += OFFSET_1M;
jamesadevine 0:e1a608bb55e8 765 }
jamesadevine 0:e1a608bb55e8 766 }
jamesadevine 0:e1a608bb55e8 767
jamesadevine 0:e1a608bb55e8 768 /** \brief Create a 4k page entry
jamesadevine 0:e1a608bb55e8 769
jamesadevine 0:e1a608bb55e8 770 \param [in] ttb L1 table base address
jamesadevine 0:e1a608bb55e8 771 \param [in] base_address 4k base address
jamesadevine 0:e1a608bb55e8 772 \param [in] count Number of 4k pages to create
jamesadevine 0:e1a608bb55e8 773 \param [in] descriptor_l1 L1 descriptor (region attributes)
jamesadevine 0:e1a608bb55e8 774 \param [in] ttb_l2 L2 table base address
jamesadevine 0:e1a608bb55e8 775 \param [in] descriptor_l2 L2 descriptor (region attributes)
jamesadevine 0:e1a608bb55e8 776
jamesadevine 0:e1a608bb55e8 777 */
jamesadevine 0:e1a608bb55e8 778 __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
jamesadevine 0:e1a608bb55e8 779 {
jamesadevine 0:e1a608bb55e8 780
jamesadevine 0:e1a608bb55e8 781 uint32_t offset, offset2;
jamesadevine 0:e1a608bb55e8 782 uint32_t entry, entry2;
jamesadevine 0:e1a608bb55e8 783 uint32_t i;
jamesadevine 0:e1a608bb55e8 784
jamesadevine 0:e1a608bb55e8 785
jamesadevine 0:e1a608bb55e8 786 offset = base_address >> 20;
jamesadevine 0:e1a608bb55e8 787 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
jamesadevine 0:e1a608bb55e8 788
jamesadevine 0:e1a608bb55e8 789 //4 bytes aligned
jamesadevine 0:e1a608bb55e8 790 ttb += offset;
jamesadevine 0:e1a608bb55e8 791 //create l1_entry
jamesadevine 0:e1a608bb55e8 792 *ttb = entry;
jamesadevine 0:e1a608bb55e8 793
jamesadevine 0:e1a608bb55e8 794 offset2 = (base_address & 0xff000) >> 12;
jamesadevine 0:e1a608bb55e8 795 ttb_l2 += offset2;
jamesadevine 0:e1a608bb55e8 796 entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
jamesadevine 0:e1a608bb55e8 797 for (i = 0; i < count; i++ )
jamesadevine 0:e1a608bb55e8 798 {
jamesadevine 0:e1a608bb55e8 799 //4 bytes aligned
jamesadevine 0:e1a608bb55e8 800 *ttb_l2++ = entry2;
jamesadevine 0:e1a608bb55e8 801 entry2 += OFFSET_4K;
jamesadevine 0:e1a608bb55e8 802 }
jamesadevine 0:e1a608bb55e8 803 }
jamesadevine 0:e1a608bb55e8 804
jamesadevine 0:e1a608bb55e8 805 /** \brief Create a 64k page entry
jamesadevine 0:e1a608bb55e8 806
jamesadevine 0:e1a608bb55e8 807 \param [in] ttb L1 table base address
jamesadevine 0:e1a608bb55e8 808 \param [in] base_address 64k base address
jamesadevine 0:e1a608bb55e8 809 \param [in] count Number of 64k pages to create
jamesadevine 0:e1a608bb55e8 810 \param [in] descriptor_l1 L1 descriptor (region attributes)
jamesadevine 0:e1a608bb55e8 811 \param [in] ttb_l2 L2 table base address
jamesadevine 0:e1a608bb55e8 812 \param [in] descriptor_l2 L2 descriptor (region attributes)
jamesadevine 0:e1a608bb55e8 813
jamesadevine 0:e1a608bb55e8 814 */
jamesadevine 0:e1a608bb55e8 815 __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
jamesadevine 0:e1a608bb55e8 816 {
jamesadevine 0:e1a608bb55e8 817 uint32_t offset, offset2;
jamesadevine 0:e1a608bb55e8 818 uint32_t entry, entry2;
jamesadevine 0:e1a608bb55e8 819 uint32_t i,j;
jamesadevine 0:e1a608bb55e8 820
jamesadevine 0:e1a608bb55e8 821
jamesadevine 0:e1a608bb55e8 822 offset = base_address >> 20;
jamesadevine 0:e1a608bb55e8 823 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
jamesadevine 0:e1a608bb55e8 824
jamesadevine 0:e1a608bb55e8 825 //4 bytes aligned
jamesadevine 0:e1a608bb55e8 826 ttb += offset;
jamesadevine 0:e1a608bb55e8 827 //create l1_entry
jamesadevine 0:e1a608bb55e8 828 *ttb = entry;
jamesadevine 0:e1a608bb55e8 829
jamesadevine 0:e1a608bb55e8 830 offset2 = (base_address & 0xff000) >> 12;
jamesadevine 0:e1a608bb55e8 831 ttb_l2 += offset2;
jamesadevine 0:e1a608bb55e8 832 entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
jamesadevine 0:e1a608bb55e8 833 for (i = 0; i < count; i++ )
jamesadevine 0:e1a608bb55e8 834 {
jamesadevine 0:e1a608bb55e8 835 //create 16 entries
jamesadevine 0:e1a608bb55e8 836 for (j = 0; j < 16; j++)
jamesadevine 0:e1a608bb55e8 837 //4 bytes aligned
jamesadevine 0:e1a608bb55e8 838 *ttb_l2++ = entry2;
jamesadevine 0:e1a608bb55e8 839 entry2 += OFFSET_64K;
jamesadevine 0:e1a608bb55e8 840 }
jamesadevine 0:e1a608bb55e8 841 }
jamesadevine 0:e1a608bb55e8 842
jamesadevine 0:e1a608bb55e8 843 /*@} end of MMU_Functions */
jamesadevine 0:e1a608bb55e8 844 #endif
jamesadevine 0:e1a608bb55e8 845
jamesadevine 0:e1a608bb55e8 846 #ifdef __cplusplus
jamesadevine 0:e1a608bb55e8 847 }
jamesadevine 0:e1a608bb55e8 848 #endif