La Suno / UniGraphic

Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Dependents:   afero_poc15_180216 afero_poc15_180223 afero_poc15_180302 afero_poc15_180403R ... more

Fork of UniGraphic by GraphicsDisplay

UniGraphic for La Suno Version.
To go with La Suno, WatchDog Reset functions were added in ILI9341.

Protocols/PAR16.cpp@34:1a148973febe, 2017-12-25 (annotated)

Committer:
Rhyme
Date:
Mon Dec 25 08:33:03 2017 +0000
Revision:
34:1a148973febe
Parent:
27:acb2594b8aa4 
watch dog resets were added in ILI9341

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Geremia 4:12ba0ecc2c1f 1 /* mbed UniGraphic library - PAR16 protocol class
Geremia 4:12ba0ecc2c1f 2 * Copyright (c) 2015 Giuliano Dianda
Geremia 4:12ba0ecc2c1f 3 * Released under the MIT License: http://mbed.org/license/mit
Geremia 4:12ba0ecc2c1f 4 *
Geremia 4:12ba0ecc2c1f 5 * Derived work of:
Geremia 4:12ba0ecc2c1f 6 *
Geremia 4:12ba0ecc2c1f 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
Geremia 4:12ba0ecc2c1f 8 * Copyright (c) 2013 Peter Drescher - DC2PD
Geremia 4:12ba0ecc2c1f 9 *
Geremia 4:12ba0ecc2c1f 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Geremia 4:12ba0ecc2c1f 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Geremia 4:12ba0ecc2c1f 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Geremia 4:12ba0ecc2c1f 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Geremia 4:12ba0ecc2c1f 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Geremia 4:12ba0ecc2c1f 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Geremia 4:12ba0ecc2c1f 16 * THE SOFTWARE.
Geremia 4:12ba0ecc2c1f 17 */
dreschpe 27:acb2594b8aa4 18 #include "platform.h"
dreschpe 25:daacdcf34e52 19 #if DEVICE_PORTINOUT
dreschpe 25:daacdcf34e52 20
Geremia 4:12ba0ecc2c1f 21 #include "PAR16.h"
Geremia 4:12ba0ecc2c1f 22
Geremia 4:12ba0ecc2c1f 23 PAR16::PAR16(PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD)
Geremia 4:12ba0ecc2c1f 24 : _port(port,0xFFFF), _CS(CS), _reset(reset), _DC(DC), _WR(WR), _RD(RD)
Geremia 4:12ba0ecc2c1f 25 {
Geremia 4:12ba0ecc2c1f 26 _reset = 1;
Geremia 4:12ba0ecc2c1f 27 _DC=1;
Geremia 4:12ba0ecc2c1f 28 _WR=1;
Geremia 4:12ba0ecc2c1f 29 _RD=1;
Geremia 4:12ba0ecc2c1f 30 _CS=1;
Geremia 4:12ba0ecc2c1f 31 _port.mode(PullNone);
Geremia 4:12ba0ecc2c1f 32 _port.output(); // will re-enable our GPIO port
Geremia 4:12ba0ecc2c1f 33 hw_reset();
Geremia 4:12ba0ecc2c1f 34 }
Geremia 4:12ba0ecc2c1f 35
Geremia 4:12ba0ecc2c1f 36 void PAR16::wr_cmd8(unsigned char cmd)
Geremia 20:14daa48ffd4c 37 {
Geremia 4:12ba0ecc2c1f 38 _DC = 0; // 0=cmd
Geremia 4:12ba0ecc2c1f 39 _port.write(cmd); // write 8bit
Geremia 4:12ba0ecc2c1f 40 _WR=0;
Geremia 4:12ba0ecc2c1f 41 _WR=1;
Geremia 20:14daa48ffd4c 42 _DC = 1; // 1=data next
Geremia 4:12ba0ecc2c1f 43 }
Geremia 4:12ba0ecc2c1f 44 void PAR16::wr_data8(unsigned char data)
Geremia 4:12ba0ecc2c1f 45 {
Geremia 4:12ba0ecc2c1f 46 _port.write(data); // write 8bit
Geremia 4:12ba0ecc2c1f 47 _WR=0;
Geremia 4:12ba0ecc2c1f 48 _WR=1;
Geremia 4:12ba0ecc2c1f 49 }
Geremia 4:12ba0ecc2c1f 50 void PAR16::wr_cmd16(unsigned short cmd)
Geremia 20:14daa48ffd4c 51 {
Geremia 4:12ba0ecc2c1f 52 _DC = 0; // 0=cmd
Geremia 4:12ba0ecc2c1f 53 _port.write(cmd>>8); // write 8bit
Geremia 4:12ba0ecc2c1f 54 _WR=0;
Geremia 4:12ba0ecc2c1f 55 _WR=1;
Geremia 4:12ba0ecc2c1f 56 _port.write(cmd&0xFF); // write 8bit
Geremia 4:12ba0ecc2c1f 57 _WR=0;
Geremia 4:12ba0ecc2c1f 58 _WR=1;
Geremia 20:14daa48ffd4c 59 _DC = 1; // 1=data next
Geremia 4:12ba0ecc2c1f 60 }
Geremia 4:12ba0ecc2c1f 61 void PAR16::wr_data16(unsigned short data)
Geremia 4:12ba0ecc2c1f 62 {
Geremia 4:12ba0ecc2c1f 63 _port.write(data>>8); // write 8bit
Geremia 4:12ba0ecc2c1f 64 _WR=0;
Geremia 4:12ba0ecc2c1f 65 _WR=1;
Geremia 4:12ba0ecc2c1f 66 _port.write(data&0xFF); // write 8bit
Geremia 4:12ba0ecc2c1f 67 _WR=0;
Geremia 4:12ba0ecc2c1f 68 _WR=1;
Geremia 4:12ba0ecc2c1f 69 }
Geremia 4:12ba0ecc2c1f 70 void PAR16::wr_gram(unsigned short data)
Geremia 4:12ba0ecc2c1f 71 {
Geremia 4:12ba0ecc2c1f 72 _port.write(data); // write 16bit
Geremia 4:12ba0ecc2c1f 73 _WR=0;
Geremia 4:12ba0ecc2c1f 74 _WR=1;
Geremia 4:12ba0ecc2c1f 75 }
Geremia 4:12ba0ecc2c1f 76 void PAR16::wr_gram(unsigned short data, unsigned int count)
Geremia 4:12ba0ecc2c1f 77 {
Geremia 4:12ba0ecc2c1f 78 while(count)
Geremia 4:12ba0ecc2c1f 79 {
Geremia 20:14daa48ffd4c 80 _port.write(data); // rewrite even if same data, otherwise too much fast
Geremia 4:12ba0ecc2c1f 81 _WR=0;
Geremia 4:12ba0ecc2c1f 82 _WR=1;
Geremia 4:12ba0ecc2c1f 83 count--;
Geremia 4:12ba0ecc2c1f 84 }
Geremia 4:12ba0ecc2c1f 85 }
Geremia 4:12ba0ecc2c1f 86 void PAR16::wr_grambuf(unsigned short* data, unsigned int lenght)
Geremia 4:12ba0ecc2c1f 87 {
Geremia 4:12ba0ecc2c1f 88 while(lenght)
Geremia 4:12ba0ecc2c1f 89 {
Geremia 4:12ba0ecc2c1f 90 _port.write(*data); // write 16bit
Geremia 4:12ba0ecc2c1f 91 _WR=0;
Geremia 4:12ba0ecc2c1f 92 _WR=1;
Geremia 4:12ba0ecc2c1f 93 data++;
Geremia 4:12ba0ecc2c1f 94 lenght--;
Geremia 4:12ba0ecc2c1f 95 }
Geremia 4:12ba0ecc2c1f 96 }
Geremia 11:b842b8e332cb 97 unsigned short PAR16::rd_gram(bool convert)
Geremia 5:b222a9461d6b 98 {
Geremia 11:b842b8e332cb 99 unsigned int r=0;
Geremia 7:bb0383b91104 100 _port.input();
Geremia 7:bb0383b91104 101
Geremia 7:bb0383b91104 102 _RD = 0;
Geremia 7:bb0383b91104 103 _port.read(); //dummy read
Geremia 7:bb0383b91104 104 _RD = 1;
Geremia 7:bb0383b91104 105
Geremia 7:bb0383b91104 106 _RD = 0;
Geremia 20:14daa48ffd4c 107 // _RD = 0; // add wait
Geremia 7:bb0383b91104 108 r |= _port.read();
Geremia 7:bb0383b91104 109 _RD = 1;
Geremia 11:b842b8e332cb 110 if(convert)
Geremia 11:b842b8e332cb 111 {
Geremia 11:b842b8e332cb 112 r <<= 8;
Geremia 11:b842b8e332cb 113 _RD = 0;
Geremia 11:b842b8e332cb 114 // _RD = 0; // add wait
Geremia 11:b842b8e332cb 115 r |= _port.read()>>8; //MSB of port read is blue, LSB is red of next pixel
Geremia 11:b842b8e332cb 116 _RD = 1;
Geremia 11:b842b8e332cb 117 // gram is 18bit/pixel, if you set 16bit/pixel (cmd 3A), during writing the 16bits are expanded to 18bit
Geremia 11:b842b8e332cb 118 // during reading, you read the raw 18bit gram
Geremia 11:b842b8e332cb 119 r = RGB24to16((r&0xFF0000)>>16, (r&0xFF00)>>8, r&0xFF);// 18bit pixel padded to 24bits, rrrrrr00_gggggg00_bbbbbb00, converted to 16bit
Geremia 11:b842b8e332cb 120 }
Geremia 7:bb0383b91104 121 _port.output();
Geremia 11:b842b8e332cb 122 return (unsigned short)r;
Geremia 7:bb0383b91104 123 }
Geremia 7:bb0383b91104 124 unsigned int PAR16::rd_reg_data32(unsigned char reg)
Geremia 7:bb0383b91104 125 {
Geremia 7:bb0383b91104 126 wr_cmd8(reg);
Geremia 5:b222a9461d6b 127 unsigned int r=0;
Geremia 20:14daa48ffd4c 128 // _DC = 1; // 1=data
Geremia 5:b222a9461d6b 129 _port.input();
Geremia 5:b222a9461d6b 130
Geremia 5:b222a9461d6b 131 _RD = 0;
Geremia 5:b222a9461d6b 132 _port.read(); //dummy read
Geremia 5:b222a9461d6b 133 _RD = 1;
Geremia 5:b222a9461d6b 134
Geremia 5:b222a9461d6b 135 _RD = 0;
Geremia 5:b222a9461d6b 136 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 137 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 138 r <<= 8;
Geremia 5:b222a9461d6b 139 _RD = 1;
Geremia 5:b222a9461d6b 140
Geremia 5:b222a9461d6b 141 _RD = 0;
Geremia 5:b222a9461d6b 142 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 143 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 144 r <<= 8;
Geremia 5:b222a9461d6b 145 _RD = 1;
Geremia 5:b222a9461d6b 146
Geremia 5:b222a9461d6b 147 _RD = 0;
Geremia 5:b222a9461d6b 148 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 149 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 150 r <<= 8;
Geremia 5:b222a9461d6b 151 _RD = 1;
Geremia 5:b222a9461d6b 152
Geremia 5:b222a9461d6b 153 _RD = 0;
Geremia 5:b222a9461d6b 154 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 155 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 156 _RD = 1;
Geremia 5:b222a9461d6b 157
Geremia 20:14daa48ffd4c 158 _CS = 1; // toggle CS to interupt the cmd in case was not supported
Geremia 5:b222a9461d6b 159 _CS = 0;
Geremia 20:14daa48ffd4c 160
Geremia 5:b222a9461d6b 161 _port.output();
Geremia 5:b222a9461d6b 162 return r;
Geremia 5:b222a9461d6b 163 }
Geremia 7:bb0383b91104 164 // in Par mode EXTC regs (0xB0-0xFF) can be directly read
Geremia 7:bb0383b91104 165 unsigned int PAR16::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
Geremia 5:b222a9461d6b 166 {
Geremia 7:bb0383b91104 167 return rd_reg_data32(reg);
Geremia 5:b222a9461d6b 168 }
Geremia 20:14daa48ffd4c 169 // ILI932x specific
Geremia 20:14daa48ffd4c 170 void PAR16::dummyread()
Geremia 20:14daa48ffd4c 171 {
Geremia 20:14daa48ffd4c 172 _port.input();
Geremia 20:14daa48ffd4c 173 _RD = 0;
Geremia 20:14daa48ffd4c 174 _port.read(); // dummy read
Geremia 20:14daa48ffd4c 175 _RD=1;
Geremia 20:14daa48ffd4c 176 // _port.output();
Geremia 20:14daa48ffd4c 177 }
Geremia 20:14daa48ffd4c 178 // ILI932x specific
Geremia 20:14daa48ffd4c 179 void PAR16::reg_select(unsigned char reg, bool forread)
Geremia 20:14daa48ffd4c 180 {
Geremia 20:14daa48ffd4c 181 _DC = 0;
Geremia 20:14daa48ffd4c 182 _port.write(reg); // write 16bit
Geremia 20:14daa48ffd4c 183 _WR=0;
Geremia 20:14daa48ffd4c 184 _WR=1;
Geremia 20:14daa48ffd4c 185 _DC = 1; // 1=data next
Geremia 20:14daa48ffd4c 186 }
Geremia 20:14daa48ffd4c 187 // ILI932x specific
Geremia 20:14daa48ffd4c 188 void PAR16::reg_write(unsigned char reg, unsigned short data)
Geremia 20:14daa48ffd4c 189 {
Geremia 20:14daa48ffd4c 190 _DC = 0;
Geremia 20:14daa48ffd4c 191 _port.write(reg); // write 16bit
Geremia 20:14daa48ffd4c 192 _WR=0;
Geremia 20:14daa48ffd4c 193 _WR=1;
Geremia 20:14daa48ffd4c 194 _DC = 1;
Geremia 20:14daa48ffd4c 195 _port.write(data); // write 16bit
Geremia 20:14daa48ffd4c 196 _WR=0;
Geremia 20:14daa48ffd4c 197 _WR=1;
Geremia 20:14daa48ffd4c 198 }
Geremia 20:14daa48ffd4c 199 // ILI932x specific
Geremia 20:14daa48ffd4c 200 unsigned short PAR16::reg_read(unsigned char reg)
Geremia 20:14daa48ffd4c 201 {
Geremia 20:14daa48ffd4c 202 unsigned short r=0;
Geremia 20:14daa48ffd4c 203 _DC = 0;
Geremia 20:14daa48ffd4c 204 _port.write(reg); // write 16bit
Geremia 20:14daa48ffd4c 205 _WR=0;
Geremia 20:14daa48ffd4c 206 _WR=1;
Geremia 20:14daa48ffd4c 207 _DC = 1;
Geremia 20:14daa48ffd4c 208 _port.input();
Geremia 20:14daa48ffd4c 209 _RD=0;
Geremia 20:14daa48ffd4c 210 r |= _port.read(); // read 16bit
Geremia 20:14daa48ffd4c 211 _RD=1;
Geremia 20:14daa48ffd4c 212 _port.output();
Geremia 20:14daa48ffd4c 213 return r;
Geremia 20:14daa48ffd4c 214 }
Geremia 4:12ba0ecc2c1f 215 void PAR16::hw_reset()
Geremia 4:12ba0ecc2c1f 216 {
Geremia 4:12ba0ecc2c1f 217 wait_ms(15);
Geremia 4:12ba0ecc2c1f 218 _DC = 1;
Geremia 4:12ba0ecc2c1f 219 _CS = 1;
Geremia 4:12ba0ecc2c1f 220 _WR = 1;
Geremia 4:12ba0ecc2c1f 221 _RD = 1;
Geremia 4:12ba0ecc2c1f 222 _reset = 0; // display reset
Geremia 20:14daa48ffd4c 223 wait_ms(2);
Geremia 4:12ba0ecc2c1f 224 _reset = 1; // end reset
Geremia 20:14daa48ffd4c 225 wait_ms(100);
Geremia 4:12ba0ecc2c1f 226 }
Geremia 4:12ba0ecc2c1f 227 void PAR16::BusEnable(bool enable)
Geremia 4:12ba0ecc2c1f 228 {
Geremia 4:12ba0ecc2c1f 229 _CS = enable ? 0:1;
dreschpe 25:daacdcf34e52 230 }
dreschpe 25:daacdcf34e52 231
dreschpe 25:daacdcf34e52 232 #endif