La Suno / UniGraphic

Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Dependents:   afero_poc15_180216 afero_poc15_180223 afero_poc15_180302 afero_poc15_180403R ... more

Fork of UniGraphic by GraphicsDisplay

UniGraphic for La Suno Version.
To go with La Suno, WatchDog Reset functions were added in ILI9341.

Protocols/PAR16.cpp@25:daacdcf34e52, 2015-10-18 (annotated)

Committer:
dreschpe
Date:
Sun Oct 18 13:53:20 2015 +0000
Revision:
25:daacdcf34e52
Parent:
20:14daa48ffd4c
Child:
27:acb2594b8aa4
Add check if platform supports par port mode

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Geremia 4:12ba0ecc2c1f 1 /* mbed UniGraphic library - PAR16 protocol class
Geremia 4:12ba0ecc2c1f 2 * Copyright (c) 2015 Giuliano Dianda
Geremia 4:12ba0ecc2c1f 3 * Released under the MIT License: http://mbed.org/license/mit
Geremia 4:12ba0ecc2c1f 4 *
Geremia 4:12ba0ecc2c1f 5 * Derived work of:
Geremia 4:12ba0ecc2c1f 6 *
Geremia 4:12ba0ecc2c1f 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
Geremia 4:12ba0ecc2c1f 8 * Copyright (c) 2013 Peter Drescher - DC2PD
Geremia 4:12ba0ecc2c1f 9 *
Geremia 4:12ba0ecc2c1f 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Geremia 4:12ba0ecc2c1f 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Geremia 4:12ba0ecc2c1f 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Geremia 4:12ba0ecc2c1f 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Geremia 4:12ba0ecc2c1f 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Geremia 4:12ba0ecc2c1f 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Geremia 4:12ba0ecc2c1f 16 * THE SOFTWARE.
Geremia 4:12ba0ecc2c1f 17 */
dreschpe 25:daacdcf34e52 18 #if DEVICE_PORTINOUT
dreschpe 25:daacdcf34e52 19
Geremia 4:12ba0ecc2c1f 20 #include "PAR16.h"
Geremia 4:12ba0ecc2c1f 21
Geremia 4:12ba0ecc2c1f 22 PAR16::PAR16(PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD)
Geremia 4:12ba0ecc2c1f 23 : _port(port,0xFFFF), _CS(CS), _reset(reset), _DC(DC), _WR(WR), _RD(RD)
Geremia 4:12ba0ecc2c1f 24 {
Geremia 4:12ba0ecc2c1f 25 _reset = 1;
Geremia 4:12ba0ecc2c1f 26 _DC=1;
Geremia 4:12ba0ecc2c1f 27 _WR=1;
Geremia 4:12ba0ecc2c1f 28 _RD=1;
Geremia 4:12ba0ecc2c1f 29 _CS=1;
Geremia 4:12ba0ecc2c1f 30 _port.mode(PullNone);
Geremia 4:12ba0ecc2c1f 31 _port.output(); // will re-enable our GPIO port
Geremia 4:12ba0ecc2c1f 32 hw_reset();
Geremia 4:12ba0ecc2c1f 33 }
Geremia 4:12ba0ecc2c1f 34
Geremia 4:12ba0ecc2c1f 35 void PAR16::wr_cmd8(unsigned char cmd)
Geremia 20:14daa48ffd4c 36 {
Geremia 4:12ba0ecc2c1f 37 _DC = 0; // 0=cmd
Geremia 4:12ba0ecc2c1f 38 _port.write(cmd); // write 8bit
Geremia 4:12ba0ecc2c1f 39 _WR=0;
Geremia 4:12ba0ecc2c1f 40 _WR=1;
Geremia 20:14daa48ffd4c 41 _DC = 1; // 1=data next
Geremia 4:12ba0ecc2c1f 42 }
Geremia 4:12ba0ecc2c1f 43 void PAR16::wr_data8(unsigned char data)
Geremia 4:12ba0ecc2c1f 44 {
Geremia 4:12ba0ecc2c1f 45 _port.write(data); // write 8bit
Geremia 4:12ba0ecc2c1f 46 _WR=0;
Geremia 4:12ba0ecc2c1f 47 _WR=1;
Geremia 4:12ba0ecc2c1f 48 }
Geremia 4:12ba0ecc2c1f 49 void PAR16::wr_cmd16(unsigned short cmd)
Geremia 20:14daa48ffd4c 50 {
Geremia 4:12ba0ecc2c1f 51 _DC = 0; // 0=cmd
Geremia 4:12ba0ecc2c1f 52 _port.write(cmd>>8); // write 8bit
Geremia 4:12ba0ecc2c1f 53 _WR=0;
Geremia 4:12ba0ecc2c1f 54 _WR=1;
Geremia 4:12ba0ecc2c1f 55 _port.write(cmd&0xFF); // write 8bit
Geremia 4:12ba0ecc2c1f 56 _WR=0;
Geremia 4:12ba0ecc2c1f 57 _WR=1;
Geremia 20:14daa48ffd4c 58 _DC = 1; // 1=data next
Geremia 4:12ba0ecc2c1f 59 }
Geremia 4:12ba0ecc2c1f 60 void PAR16::wr_data16(unsigned short data)
Geremia 4:12ba0ecc2c1f 61 {
Geremia 4:12ba0ecc2c1f 62 _port.write(data>>8); // write 8bit
Geremia 4:12ba0ecc2c1f 63 _WR=0;
Geremia 4:12ba0ecc2c1f 64 _WR=1;
Geremia 4:12ba0ecc2c1f 65 _port.write(data&0xFF); // write 8bit
Geremia 4:12ba0ecc2c1f 66 _WR=0;
Geremia 4:12ba0ecc2c1f 67 _WR=1;
Geremia 4:12ba0ecc2c1f 68 }
Geremia 4:12ba0ecc2c1f 69 void PAR16::wr_gram(unsigned short data)
Geremia 4:12ba0ecc2c1f 70 {
Geremia 4:12ba0ecc2c1f 71 _port.write(data); // write 16bit
Geremia 4:12ba0ecc2c1f 72 _WR=0;
Geremia 4:12ba0ecc2c1f 73 _WR=1;
Geremia 4:12ba0ecc2c1f 74 }
Geremia 4:12ba0ecc2c1f 75 void PAR16::wr_gram(unsigned short data, unsigned int count)
Geremia 4:12ba0ecc2c1f 76 {
Geremia 4:12ba0ecc2c1f 77 while(count)
Geremia 4:12ba0ecc2c1f 78 {
Geremia 20:14daa48ffd4c 79 _port.write(data); // rewrite even if same data, otherwise too much fast
Geremia 4:12ba0ecc2c1f 80 _WR=0;
Geremia 4:12ba0ecc2c1f 81 _WR=1;
Geremia 4:12ba0ecc2c1f 82 count--;
Geremia 4:12ba0ecc2c1f 83 }
Geremia 4:12ba0ecc2c1f 84 }
Geremia 4:12ba0ecc2c1f 85 void PAR16::wr_grambuf(unsigned short* data, unsigned int lenght)
Geremia 4:12ba0ecc2c1f 86 {
Geremia 4:12ba0ecc2c1f 87 while(lenght)
Geremia 4:12ba0ecc2c1f 88 {
Geremia 4:12ba0ecc2c1f 89 _port.write(*data); // write 16bit
Geremia 4:12ba0ecc2c1f 90 _WR=0;
Geremia 4:12ba0ecc2c1f 91 _WR=1;
Geremia 4:12ba0ecc2c1f 92 data++;
Geremia 4:12ba0ecc2c1f 93 lenght--;
Geremia 4:12ba0ecc2c1f 94 }
Geremia 4:12ba0ecc2c1f 95 }
Geremia 11:b842b8e332cb 96 unsigned short PAR16::rd_gram(bool convert)
Geremia 5:b222a9461d6b 97 {
Geremia 11:b842b8e332cb 98 unsigned int r=0;
Geremia 7:bb0383b91104 99 _port.input();
Geremia 7:bb0383b91104 100
Geremia 7:bb0383b91104 101 _RD = 0;
Geremia 7:bb0383b91104 102 _port.read(); //dummy read
Geremia 7:bb0383b91104 103 _RD = 1;
Geremia 7:bb0383b91104 104
Geremia 7:bb0383b91104 105 _RD = 0;
Geremia 20:14daa48ffd4c 106 // _RD = 0; // add wait
Geremia 7:bb0383b91104 107 r |= _port.read();
Geremia 7:bb0383b91104 108 _RD = 1;
Geremia 11:b842b8e332cb 109 if(convert)
Geremia 11:b842b8e332cb 110 {
Geremia 11:b842b8e332cb 111 r <<= 8;
Geremia 11:b842b8e332cb 112 _RD = 0;
Geremia 11:b842b8e332cb 113 // _RD = 0; // add wait
Geremia 11:b842b8e332cb 114 r |= _port.read()>>8; //MSB of port read is blue, LSB is red of next pixel
Geremia 11:b842b8e332cb 115 _RD = 1;
Geremia 11:b842b8e332cb 116 // gram is 18bit/pixel, if you set 16bit/pixel (cmd 3A), during writing the 16bits are expanded to 18bit
Geremia 11:b842b8e332cb 117 // during reading, you read the raw 18bit gram
Geremia 11:b842b8e332cb 118 r = RGB24to16((r&0xFF0000)>>16, (r&0xFF00)>>8, r&0xFF);// 18bit pixel padded to 24bits, rrrrrr00_gggggg00_bbbbbb00, converted to 16bit
Geremia 11:b842b8e332cb 119 }
Geremia 7:bb0383b91104 120 _port.output();
Geremia 11:b842b8e332cb 121 return (unsigned short)r;
Geremia 7:bb0383b91104 122 }
Geremia 7:bb0383b91104 123 unsigned int PAR16::rd_reg_data32(unsigned char reg)
Geremia 7:bb0383b91104 124 {
Geremia 7:bb0383b91104 125 wr_cmd8(reg);
Geremia 5:b222a9461d6b 126 unsigned int r=0;
Geremia 20:14daa48ffd4c 127 // _DC = 1; // 1=data
Geremia 5:b222a9461d6b 128 _port.input();
Geremia 5:b222a9461d6b 129
Geremia 5:b222a9461d6b 130 _RD = 0;
Geremia 5:b222a9461d6b 131 _port.read(); //dummy read
Geremia 5:b222a9461d6b 132 _RD = 1;
Geremia 5:b222a9461d6b 133
Geremia 5:b222a9461d6b 134 _RD = 0;
Geremia 5:b222a9461d6b 135 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 136 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 137 r <<= 8;
Geremia 5:b222a9461d6b 138 _RD = 1;
Geremia 5:b222a9461d6b 139
Geremia 5:b222a9461d6b 140 _RD = 0;
Geremia 5:b222a9461d6b 141 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 142 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 143 r <<= 8;
Geremia 5:b222a9461d6b 144 _RD = 1;
Geremia 5:b222a9461d6b 145
Geremia 5:b222a9461d6b 146 _RD = 0;
Geremia 5:b222a9461d6b 147 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 148 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 149 r <<= 8;
Geremia 5:b222a9461d6b 150 _RD = 1;
Geremia 5:b222a9461d6b 151
Geremia 5:b222a9461d6b 152 _RD = 0;
Geremia 5:b222a9461d6b 153 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 154 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 155 _RD = 1;
Geremia 5:b222a9461d6b 156
Geremia 20:14daa48ffd4c 157 _CS = 1; // toggle CS to interupt the cmd in case was not supported
Geremia 5:b222a9461d6b 158 _CS = 0;
Geremia 20:14daa48ffd4c 159
Geremia 5:b222a9461d6b 160 _port.output();
Geremia 5:b222a9461d6b 161 return r;
Geremia 5:b222a9461d6b 162 }
Geremia 7:bb0383b91104 163 // in Par mode EXTC regs (0xB0-0xFF) can be directly read
Geremia 7:bb0383b91104 164 unsigned int PAR16::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
Geremia 5:b222a9461d6b 165 {
Geremia 7:bb0383b91104 166 return rd_reg_data32(reg);
Geremia 5:b222a9461d6b 167 }
Geremia 20:14daa48ffd4c 168 // ILI932x specific
Geremia 20:14daa48ffd4c 169 void PAR16::dummyread()
Geremia 20:14daa48ffd4c 170 {
Geremia 20:14daa48ffd4c 171 _port.input();
Geremia 20:14daa48ffd4c 172 _RD = 0;
Geremia 20:14daa48ffd4c 173 _port.read(); // dummy read
Geremia 20:14daa48ffd4c 174 _RD=1;
Geremia 20:14daa48ffd4c 175 // _port.output();
Geremia 20:14daa48ffd4c 176 }
Geremia 20:14daa48ffd4c 177 // ILI932x specific
Geremia 20:14daa48ffd4c 178 void PAR16::reg_select(unsigned char reg, bool forread)
Geremia 20:14daa48ffd4c 179 {
Geremia 20:14daa48ffd4c 180 _DC = 0;
Geremia 20:14daa48ffd4c 181 _port.write(reg); // write 16bit
Geremia 20:14daa48ffd4c 182 _WR=0;
Geremia 20:14daa48ffd4c 183 _WR=1;
Geremia 20:14daa48ffd4c 184 _DC = 1; // 1=data next
Geremia 20:14daa48ffd4c 185 }
Geremia 20:14daa48ffd4c 186 // ILI932x specific
Geremia 20:14daa48ffd4c 187 void PAR16::reg_write(unsigned char reg, unsigned short data)
Geremia 20:14daa48ffd4c 188 {
Geremia 20:14daa48ffd4c 189 _DC = 0;
Geremia 20:14daa48ffd4c 190 _port.write(reg); // write 16bit
Geremia 20:14daa48ffd4c 191 _WR=0;
Geremia 20:14daa48ffd4c 192 _WR=1;
Geremia 20:14daa48ffd4c 193 _DC = 1;
Geremia 20:14daa48ffd4c 194 _port.write(data); // write 16bit
Geremia 20:14daa48ffd4c 195 _WR=0;
Geremia 20:14daa48ffd4c 196 _WR=1;
Geremia 20:14daa48ffd4c 197 }
Geremia 20:14daa48ffd4c 198 // ILI932x specific
Geremia 20:14daa48ffd4c 199 unsigned short PAR16::reg_read(unsigned char reg)
Geremia 20:14daa48ffd4c 200 {
Geremia 20:14daa48ffd4c 201 unsigned short r=0;
Geremia 20:14daa48ffd4c 202 _DC = 0;
Geremia 20:14daa48ffd4c 203 _port.write(reg); // write 16bit
Geremia 20:14daa48ffd4c 204 _WR=0;
Geremia 20:14daa48ffd4c 205 _WR=1;
Geremia 20:14daa48ffd4c 206 _DC = 1;
Geremia 20:14daa48ffd4c 207 _port.input();
Geremia 20:14daa48ffd4c 208 _RD=0;
Geremia 20:14daa48ffd4c 209 r |= _port.read(); // read 16bit
Geremia 20:14daa48ffd4c 210 _RD=1;
Geremia 20:14daa48ffd4c 211 _port.output();
Geremia 20:14daa48ffd4c 212 return r;
Geremia 20:14daa48ffd4c 213 }
Geremia 4:12ba0ecc2c1f 214 void PAR16::hw_reset()
Geremia 4:12ba0ecc2c1f 215 {
Geremia 4:12ba0ecc2c1f 216 wait_ms(15);
Geremia 4:12ba0ecc2c1f 217 _DC = 1;
Geremia 4:12ba0ecc2c1f 218 _CS = 1;
Geremia 4:12ba0ecc2c1f 219 _WR = 1;
Geremia 4:12ba0ecc2c1f 220 _RD = 1;
Geremia 4:12ba0ecc2c1f 221 _reset = 0; // display reset
Geremia 20:14daa48ffd4c 222 wait_ms(2);
Geremia 4:12ba0ecc2c1f 223 _reset = 1; // end reset
Geremia 20:14daa48ffd4c 224 wait_ms(100);
Geremia 4:12ba0ecc2c1f 225 }
Geremia 4:12ba0ecc2c1f 226 void PAR16::BusEnable(bool enable)
Geremia 4:12ba0ecc2c1f 227 {
Geremia 4:12ba0ecc2c1f 228 _CS = enable ? 0:1;
dreschpe 25:daacdcf34e52 229 }
dreschpe 25:daacdcf34e52 230
dreschpe 25:daacdcf34e52 231 #endif