LPS22HH pressure sensor library
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Diff: lps22hh_reg.c
- Revision:
- 1:978cae936ddb
- Parent:
- 0:c761bc6186e8
--- a/lps22hh_reg.c Wed Mar 06 09:18:20 2019 +0000 +++ b/lps22hh_reg.c Wed Jul 24 14:19:09 2019 +0000 @@ -63,12 +63,12 @@ * @retval interface status (MANDATORY: return 0 -> no Error) * */ -int32_t lps22hh_read_reg(lps22hh_ctx_t* ctx, uint8_t reg, uint8_t* data, +int32_t lps22hh_read_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len) { - int32_t ret; - ret = ctx->read_reg(ctx->handle, reg, data, len); - return ret; + int32_t ret; + ret = ctx->read_reg(ctx->handle, reg, data, len); + return ret; } /** @@ -81,12 +81,12 @@ * @retval interface status (MANDATORY: return 0 -> no Error) * */ -int32_t lps22hh_write_reg(lps22hh_ctx_t* ctx, uint8_t reg, uint8_t* data, - uint16_t len) +int32_t lps22hh_write_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data, + uint16_t len) { - int32_t ret; - ret = ctx->write_reg(ctx->handle, reg, data, len); - return ret; + int32_t ret; + ret = ctx->write_reg(ctx->handle, reg, data, len); + return ret; } /** @@ -102,12 +102,12 @@ */ float lps22hh_from_lsb_to_hpa(int16_t lsb) { - return ( (float) lsb / 4096.0f ); + return ((float) lsb / 4096.0f); } float lps22hh_from_lsb_to_celsius(int16_t lsb) { - return ( (float) lsb / 100.0f ); + return ((float) lsb / 100.0f); } /** @@ -133,15 +133,15 @@ */ int32_t lps22hh_autozero_rst_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - if (ret == 0) { - reg.reset_az = val; - ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + if (ret == 0) { + reg.reset_az = val; + ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + } + return ret; } /** @@ -154,13 +154,13 @@ */ int32_t lps22hh_autozero_rst_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - *val = reg.reset_az; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + *val = reg.reset_az; - return ret; + return ret; } /** @@ -173,15 +173,15 @@ */ int32_t lps22hh_autozero_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - if (ret == 0) { - reg.autozero = val; - ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + if (ret == 0) { + reg.autozero = val; + ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + } + return ret; } /** @@ -194,13 +194,13 @@ */ int32_t lps22hh_autozero_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - *val = reg.autozero; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + *val = reg.autozero; - return ret; + return ret; } /** @@ -213,15 +213,15 @@ */ int32_t lps22hh_pressure_snap_rst_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - if (ret == 0) { - reg.reset_arp = val; - ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + if (ret == 0) { + reg.reset_arp = val; + ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + } + return ret; } /** @@ -234,13 +234,13 @@ */ int32_t lps22hh_pressure_snap_rst_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - *val = reg.reset_arp; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + *val = reg.reset_arp; - return ret; + return ret; } /** @@ -253,15 +253,15 @@ */ int32_t lps22hh_pressure_snap_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - if (ret == 0) { - reg.autorefp = val; - ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + if (ret == 0) { + reg.autorefp = val; + ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + } + return ret; } /** @@ -274,13 +274,13 @@ */ int32_t lps22hh_pressure_snap_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - *val = reg.autorefp; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + *val = reg.autorefp; - return ret; + return ret; } /** @@ -293,15 +293,15 @@ */ int32_t lps22hh_block_data_update_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_ctrl_reg1_t reg; - int32_t ret; + lps22hh_ctrl_reg1_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); - if (ret == 0) { - reg.bdu = val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1); + if (ret == 0) { + reg.bdu = val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1); + } + return ret; } /** @@ -314,13 +314,13 @@ */ int32_t lps22hh_block_data_update_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_ctrl_reg1_t reg; - int32_t ret; + lps22hh_ctrl_reg1_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); - *val = reg.bdu; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1); + *val = reg.bdu; - return ret; + return ret; } /** @@ -333,24 +333,24 @@ */ int32_t lps22hh_data_rate_set(lps22hh_ctx_t *ctx, lps22hh_odr_t val) { - lps22hh_ctrl_reg1_t ctrl_reg1; - lps22hh_ctrl_reg2_t ctrl_reg2; - int32_t ret; + lps22hh_ctrl_reg1_t ctrl_reg1; + lps22hh_ctrl_reg2_t ctrl_reg2; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1); - if (ret == 0) { - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); - } - if (ret == 0) { - ctrl_reg1.odr = (uint8_t)val & 0x07U; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1); - } - if (ret == 0) { - ctrl_reg2.low_noise_en = ((uint8_t)val & 0x10U) >> 4; - ctrl_reg2.one_shot = ((uint8_t)val & 0x08U) >> 3; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1); + if (ret == 0) { + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1); + } + if (ret == 0) { + ctrl_reg1.odr = (uint8_t)val & 0x07U; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1); + } + if (ret == 0) { + ctrl_reg2.low_noise_en = ((uint8_t)val & 0x10U) >> 4; + ctrl_reg2.one_shot = ((uint8_t)val & 0x08U) >> 3; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1); + } + return ret; } /** @@ -363,66 +363,66 @@ */ int32_t lps22hh_data_rate_get(lps22hh_ctx_t *ctx, lps22hh_odr_t *val) { - lps22hh_ctrl_reg1_t ctrl_reg1; - lps22hh_ctrl_reg2_t ctrl_reg2; - int32_t ret; + lps22hh_ctrl_reg1_t ctrl_reg1; + lps22hh_ctrl_reg2_t ctrl_reg2; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1); - if (ret == 0) { - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); - } - if (ret == 0) { - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); - switch (((ctrl_reg2.low_noise_en << 4) + (ctrl_reg2.one_shot << 3) + - ctrl_reg1.odr )) { - case LPS22HH_POWER_DOWN: - *val = LPS22HH_POWER_DOWN; - break; - case LPS22HH_ONE_SHOOT: - *val = LPS22HH_ONE_SHOOT; - break; - case LPS22HH_1_Hz: - *val = LPS22HH_1_Hz; - break; - case LPS22HH_10_Hz: - *val = LPS22HH_10_Hz; - break; - case LPS22HH_25_Hz: - *val = LPS22HH_25_Hz; - break; - case LPS22HH_50_Hz: - *val = LPS22HH_50_Hz; - break; - case LPS22HH_75_Hz: - *val = LPS22HH_75_Hz; - break; - case LPS22HH_1_Hz_LOW_NOISE: - *val = LPS22HH_1_Hz_LOW_NOISE; - break; - case LPS22HH_10_Hz_LOW_NOISE: - *val = LPS22HH_10_Hz_LOW_NOISE; - break; - case LPS22HH_25_Hz_LOW_NOISE: - *val = LPS22HH_25_Hz_LOW_NOISE; - break; - case LPS22HH_50_Hz_LOW_NOISE: - *val = LPS22HH_50_Hz_LOW_NOISE; - break; - case LPS22HH_75_Hz_LOW_NOISE: - *val = LPS22HH_75_Hz_LOW_NOISE; - break; - case LPS22HH_100_Hz: - *val = LPS22HH_100_Hz; - break; - case LPS22HH_200_Hz: - *val = LPS22HH_200_Hz; - break; - default: - *val = LPS22HH_POWER_DOWN; - break; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1); + if (ret == 0) { + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1); } - } - return ret; + if (ret == 0) { + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1); + switch (((ctrl_reg2.low_noise_en << 4) + (ctrl_reg2.one_shot << 3) + + ctrl_reg1.odr)) { + case LPS22HH_POWER_DOWN: + *val = LPS22HH_POWER_DOWN; + break; + case LPS22HH_ONE_SHOOT: + *val = LPS22HH_ONE_SHOOT; + break; + case LPS22HH_1_Hz: + *val = LPS22HH_1_Hz; + break; + case LPS22HH_10_Hz: + *val = LPS22HH_10_Hz; + break; + case LPS22HH_25_Hz: + *val = LPS22HH_25_Hz; + break; + case LPS22HH_50_Hz: + *val = LPS22HH_50_Hz; + break; + case LPS22HH_75_Hz: + *val = LPS22HH_75_Hz; + break; + case LPS22HH_1_Hz_LOW_NOISE: + *val = LPS22HH_1_Hz_LOW_NOISE; + break; + case LPS22HH_10_Hz_LOW_NOISE: + *val = LPS22HH_10_Hz_LOW_NOISE; + break; + case LPS22HH_25_Hz_LOW_NOISE: + *val = LPS22HH_25_Hz_LOW_NOISE; + break; + case LPS22HH_50_Hz_LOW_NOISE: + *val = LPS22HH_50_Hz_LOW_NOISE; + break; + case LPS22HH_75_Hz_LOW_NOISE: + *val = LPS22HH_75_Hz_LOW_NOISE; + break; + case LPS22HH_100_Hz: + *val = LPS22HH_100_Hz; + break; + case LPS22HH_200_Hz: + *val = LPS22HH_200_Hz; + break; + default: + *val = LPS22HH_POWER_DOWN; + break; + } + } + return ret; } /** @@ -437,9 +437,9 @@ */ int32_t lps22hh_pressure_ref_set(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_write_reg(ctx, LPS22HH_REF_P_XL, buff, 2); - return ret; + int32_t ret; + ret = lps22hh_write_reg(ctx, LPS22HH_REF_P_XL, buff, 2); + return ret; } /** @@ -455,9 +455,9 @@ */ int32_t lps22hh_pressure_ref_get(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_REF_P_XL, buff, 2); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_REF_P_XL, buff, 2); + return ret; } /** @@ -472,9 +472,9 @@ */ int32_t lps22hh_pressure_offset_set(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_write_reg(ctx, LPS22HH_RPDS_L, buff, 2); - return ret; + int32_t ret; + ret = lps22hh_write_reg(ctx, LPS22HH_RPDS_L, buff, 2); + return ret; } /** @@ -490,9 +490,9 @@ */ int32_t lps22hh_pressure_offset_get(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_RPDS_L, buff, 2); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_RPDS_L, buff, 2); + return ret; } /** @@ -505,19 +505,19 @@ */ int32_t lps22hh_all_sources_get(lps22hh_ctx_t *ctx, lps22hh_all_sources_t *val) { - int32_t ret; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INT_SOURCE, - (uint8_t*) &(val->int_source), 1); - if (ret == 0) { - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, - (uint8_t*) &(val->fifo_status2), 1); - } - if (ret == 0) { - ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, - (uint8_t*) &(val->status), 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_INT_SOURCE, + (uint8_t *) & (val->int_source), 1); + if (ret == 0) { + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, + (uint8_t *) & (val->fifo_status2), 1); + } + if (ret == 0) { + ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, + (uint8_t *) & (val->status), 1); + } + return ret; } /** @@ -530,9 +530,9 @@ */ int32_t lps22hh_status_reg_get(lps22hh_ctx_t *ctx, lps22hh_status_t *val) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t*) val, 1); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t *) val, 1); + return ret; } /** @@ -545,13 +545,13 @@ */ int32_t lps22hh_press_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_status_t reg; - int32_t ret; + lps22hh_status_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t*) ®, 1); - *val = reg.p_da; + ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t *) ®, 1); + *val = reg.p_da; - return ret; + return ret; } /** @@ -564,13 +564,13 @@ */ int32_t lps22hh_temp_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_status_t reg; - int32_t ret; + lps22hh_status_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t*) ®, 1); - *val = reg.t_da; + ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t *) ®, 1); + *val = reg.t_da; - return ret; + return ret; } /** @@ -595,9 +595,9 @@ */ int32_t lps22hh_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_PRESSURE_OUT_XL, buff, 3); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_PRESSURE_OUT_XL, buff, 3); + return ret; } /** @@ -610,9 +610,9 @@ */ int32_t lps22hh_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_TEMP_OUT_L, buff, 2); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_TEMP_OUT_L, buff, 2); + return ret; } /** @@ -625,9 +625,9 @@ */ int32_t lps22hh_fifo_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_PRESS_XL, buff, 3); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_PRESS_XL, buff, 3); + return ret; } /** @@ -640,9 +640,9 @@ */ int32_t lps22hh_fifo_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_TEMP_L, buff, 2); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_TEMP_L, buff, 2); + return ret; } /** @@ -667,9 +667,9 @@ */ int32_t lps22hh_device_id_get(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_WHO_AM_I, buff, 1); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_WHO_AM_I, buff, 1); + return ret; } /** @@ -683,15 +683,15 @@ */ int32_t lps22hh_reset_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - if (ret == 0) { - reg.swreset = val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + if (ret == 0) { + reg.swreset = val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + } + return ret; } /** @@ -705,13 +705,13 @@ */ int32_t lps22hh_reset_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - *val = reg.swreset; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + *val = reg.swreset; - return ret; + return ret; } /** @@ -726,15 +726,15 @@ */ int32_t lps22hh_auto_increment_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - if (ret == 0) { - reg.if_add_inc = val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + if (ret == 0) { + reg.if_add_inc = val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + } + return ret; } /** @@ -749,13 +749,13 @@ */ int32_t lps22hh_auto_increment_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - *val = reg.if_add_inc; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + *val = reg.if_add_inc; - return ret; + return ret; } /** @@ -769,15 +769,15 @@ */ int32_t lps22hh_boot_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - if (ret == 0) { - reg.boot = val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + if (ret == 0) { + reg.boot = val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + } + return ret; } /** @@ -791,13 +791,13 @@ */ int32_t lps22hh_boot_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - *val = reg.boot; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + *val = reg.boot; - return ret; + return ret; } /** @@ -823,15 +823,15 @@ */ int32_t lps22hh_lp_bandwidth_set(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t val) { - lps22hh_ctrl_reg1_t reg; - int32_t ret; + lps22hh_ctrl_reg1_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); - if (ret == 0) { - reg.lpfp_cfg = (uint8_t)val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1); + if (ret == 0) { + reg.lpfp_cfg = (uint8_t)val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1); + } + return ret; } /** @@ -844,26 +844,26 @@ */ int32_t lps22hh_lp_bandwidth_get(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t *val) { - lps22hh_ctrl_reg1_t reg; - int32_t ret; + lps22hh_ctrl_reg1_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); - switch (reg.lpfp_cfg) { - case LPS22HH_LPF_ODR_DIV_2: - *val = LPS22HH_LPF_ODR_DIV_2; - break; - case LPS22HH_LPF_ODR_DIV_9: - *val = LPS22HH_LPF_ODR_DIV_9; - break; - case LPS22HH_LPF_ODR_DIV_20: - *val = LPS22HH_LPF_ODR_DIV_20; - break; - default: - *val = LPS22HH_LPF_ODR_DIV_2; - break; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1); + switch (reg.lpfp_cfg) { + case LPS22HH_LPF_ODR_DIV_2: + *val = LPS22HH_LPF_ODR_DIV_2; + break; + case LPS22HH_LPF_ODR_DIV_9: + *val = LPS22HH_LPF_ODR_DIV_9; + break; + case LPS22HH_LPF_ODR_DIV_20: + *val = LPS22HH_LPF_ODR_DIV_20; + break; + default: + *val = LPS22HH_LPF_ODR_DIV_2; + break; } - return ret; + return ret; } /** @@ -890,15 +890,15 @@ int32_t lps22hh_i2c_interface_set(lps22hh_ctx_t *ctx, lps22hh_i2c_disable_t val) { - lps22hh_if_ctrl_t reg; - int32_t ret; + lps22hh_if_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - if (ret == 0) { - reg.i2c_disable = (uint8_t)val; - ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + if (ret == 0) { + reg.i2c_disable = (uint8_t)val; + ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + } + return ret; } /** @@ -912,23 +912,23 @@ int32_t lps22hh_i2c_interface_get(lps22hh_ctx_t *ctx, lps22hh_i2c_disable_t *val) { - lps22hh_if_ctrl_t reg; - int32_t ret; + lps22hh_if_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - switch (reg.i2c_disable) { - case LPS22HH_I2C_ENABLE: - *val = LPS22HH_I2C_ENABLE; - break; - case LPS22HH_I2C_DISABLE: - *val = LPS22HH_I2C_DISABLE; - break; - default: - *val = LPS22HH_I2C_ENABLE; - break; + ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + switch (reg.i2c_disable) { + case LPS22HH_I2C_ENABLE: + *val = LPS22HH_I2C_ENABLE; + break; + case LPS22HH_I2C_DISABLE: + *val = LPS22HH_I2C_DISABLE; + break; + default: + *val = LPS22HH_I2C_ENABLE; + break; } - return ret; + return ret; } /** @@ -942,16 +942,16 @@ int32_t lps22hh_i3c_interface_set(lps22hh_ctx_t *ctx, lps22hh_i3c_disable_t val) { - lps22hh_if_ctrl_t reg; - int32_t ret; + lps22hh_if_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - if (ret == 0) { - reg.i3c_disable = ((uint8_t)val & 0x01u); - reg.int_en_i3c = ((uint8_t)val & 0x10U) >> 4; - ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + if (ret == 0) { + reg.i3c_disable = ((uint8_t)val & 0x01u); + reg.int_en_i3c = ((uint8_t)val & 0x10U) >> 4; + ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + } + return ret; } /** @@ -965,26 +965,26 @@ int32_t lps22hh_i3c_interface_get(lps22hh_ctx_t *ctx, lps22hh_i3c_disable_t *val) { - lps22hh_if_ctrl_t reg; - int32_t ret; + lps22hh_if_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); + ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); - switch ((reg.int_en_i3c << 4) + reg.int_en_i3c) { - case LPS22HH_I3C_ENABLE: - *val = LPS22HH_I3C_ENABLE; - break; - case LPS22HH_I3C_ENABLE_INT_PIN_ENABLE: - *val = LPS22HH_I3C_ENABLE_INT_PIN_ENABLE; - break; - case LPS22HH_I3C_DISABLE: - *val = LPS22HH_I3C_DISABLE; - break; - default: - *val = LPS22HH_I3C_ENABLE; - break; - } - return ret; + switch ((reg.int_en_i3c << 4) + reg.int_en_i3c) { + case LPS22HH_I3C_ENABLE: + *val = LPS22HH_I3C_ENABLE; + break; + case LPS22HH_I3C_ENABLE_INT_PIN_ENABLE: + *val = LPS22HH_I3C_ENABLE_INT_PIN_ENABLE; + break; + case LPS22HH_I3C_DISABLE: + *val = LPS22HH_I3C_DISABLE; + break; + default: + *val = LPS22HH_I3C_ENABLE; + break; + } + return ret; } /** @@ -997,15 +997,15 @@ */ int32_t lps22hh_sdo_sa0_mode_set(lps22hh_ctx_t *ctx, lps22hh_pu_en_t val) { - lps22hh_if_ctrl_t reg; - int32_t ret; + lps22hh_if_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - if (ret == 0) { - reg.sdo_pu_en = (uint8_t)val; - ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + if (ret == 0) { + reg.sdo_pu_en = (uint8_t)val; + ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + } + return ret; } /** @@ -1018,23 +1018,23 @@ */ int32_t lps22hh_sdo_sa0_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val) { - lps22hh_if_ctrl_t reg; - int32_t ret; + lps22hh_if_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - switch (reg.sdo_pu_en) { - case LPS22HH_PULL_UP_DISCONNECT: - *val = LPS22HH_PULL_UP_DISCONNECT; - break; - case LPS22HH_PULL_UP_CONNECT: - *val = LPS22HH_PULL_UP_CONNECT; - break; - default: - *val = LPS22HH_PULL_UP_DISCONNECT; - break; - } + ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + switch (reg.sdo_pu_en) { + case LPS22HH_PULL_UP_DISCONNECT: + *val = LPS22HH_PULL_UP_DISCONNECT; + break; + case LPS22HH_PULL_UP_CONNECT: + *val = LPS22HH_PULL_UP_CONNECT; + break; + default: + *val = LPS22HH_PULL_UP_DISCONNECT; + break; + } - return ret; + return ret; } /** @@ -1047,15 +1047,15 @@ */ int32_t lps22hh_sda_mode_set(lps22hh_ctx_t *ctx, lps22hh_pu_en_t val) { - lps22hh_if_ctrl_t reg; - int32_t ret; + lps22hh_if_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - if (ret == 0) { - reg.sda_pu_en = (uint8_t)val; - ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + if (ret == 0) { + reg.sda_pu_en = (uint8_t)val; + ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + } + return ret; } /** @@ -1068,22 +1068,22 @@ */ int32_t lps22hh_sda_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val) { - lps22hh_if_ctrl_t reg; - int32_t ret; + lps22hh_if_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1); - switch (reg.sda_pu_en) { - case LPS22HH_PULL_UP_DISCONNECT: - *val = LPS22HH_PULL_UP_DISCONNECT; - break; - case LPS22HH_PULL_UP_CONNECT: - *val = LPS22HH_PULL_UP_CONNECT; - break; - default: - *val = LPS22HH_PULL_UP_DISCONNECT; - break; - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1); + switch (reg.sda_pu_en) { + case LPS22HH_PULL_UP_DISCONNECT: + *val = LPS22HH_PULL_UP_DISCONNECT; + break; + case LPS22HH_PULL_UP_CONNECT: + *val = LPS22HH_PULL_UP_CONNECT; + break; + default: + *val = LPS22HH_PULL_UP_DISCONNECT; + break; + } + return ret; } /** @@ -1096,15 +1096,15 @@ */ int32_t lps22hh_spi_mode_set(lps22hh_ctx_t *ctx, lps22hh_sim_t val) { - lps22hh_ctrl_reg1_t reg; - int32_t ret; + lps22hh_ctrl_reg1_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); - if (ret == 0) { - reg.sim = (uint8_t)val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1); + if (ret == 0) { + reg.sim = (uint8_t)val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1); + } + return ret; } /** @@ -1117,22 +1117,22 @@ */ int32_t lps22hh_spi_mode_get(lps22hh_ctx_t *ctx, lps22hh_sim_t *val) { - lps22hh_ctrl_reg1_t reg; - int32_t ret; + lps22hh_ctrl_reg1_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); - switch (reg.sim) { - case LPS22HH_SPI_4_WIRE: - *val = LPS22HH_SPI_4_WIRE; - break; - case LPS22HH_SPI_3_WIRE: - *val = LPS22HH_SPI_3_WIRE; - break; - default: - *val = LPS22HH_SPI_4_WIRE; - break; - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1); + switch (reg.sim) { + case LPS22HH_SPI_4_WIRE: + *val = LPS22HH_SPI_4_WIRE; + break; + case LPS22HH_SPI_3_WIRE: + *val = LPS22HH_SPI_3_WIRE; + break; + default: + *val = LPS22HH_SPI_4_WIRE; + break; + } + return ret; } /** @@ -1158,15 +1158,15 @@ */ int32_t lps22hh_int_notification_set(lps22hh_ctx_t *ctx, lps22hh_lir_t val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - if (ret == 0) { - reg.lir = (uint8_t)val; - ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + if (ret == 0) { + reg.lir = (uint8_t)val; + ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + } + return ret; } /** @@ -1179,23 +1179,23 @@ */ int32_t lps22hh_int_notification_get(lps22hh_ctx_t *ctx, lps22hh_lir_t *val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); - switch (reg.lir) { - case LPS22HH_INT_PULSED: - *val = LPS22HH_INT_PULSED; - break; - case LPS22HH_INT_LATCHED: - *val = LPS22HH_INT_LATCHED; - break; - default: - *val = LPS22HH_INT_PULSED; - break; - } - return ret; + switch (reg.lir) { + case LPS22HH_INT_PULSED: + *val = LPS22HH_INT_PULSED; + break; + case LPS22HH_INT_LATCHED: + *val = LPS22HH_INT_LATCHED; + break; + default: + *val = LPS22HH_INT_PULSED; + break; + } + return ret; } /** @@ -1208,16 +1208,16 @@ */ int32_t lps22hh_pin_mode_set(lps22hh_ctx_t *ctx, lps22hh_pp_od_t val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - if (ret == 0) { - reg.pp_od = (uint8_t)val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - } + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + if (ret == 0) { + reg.pp_od = (uint8_t)val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + } - return ret; + return ret; } /** @@ -1230,25 +1230,25 @@ */ int32_t lps22hh_pin_mode_get(lps22hh_ctx_t *ctx, lps22hh_pp_od_t *val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); - switch (reg.pp_od) { - case LPS22HH_PUSH_PULL: - *val = LPS22HH_PUSH_PULL; - break; - case LPS22HH_OPEN_DRAIN: - *val = LPS22HH_OPEN_DRAIN; - break; - default: - *val = LPS22HH_PUSH_PULL; - break; - } + switch (reg.pp_od) { + case LPS22HH_PUSH_PULL: + *val = LPS22HH_PUSH_PULL; + break; + case LPS22HH_OPEN_DRAIN: + *val = LPS22HH_OPEN_DRAIN; + break; + default: + *val = LPS22HH_PUSH_PULL; + break; + } - return ret; + return ret; } /** @@ -1261,16 +1261,16 @@ */ int32_t lps22hh_pin_polarity_set(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - if (ret == 0) { - reg.int_h_l = (uint8_t)val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); - } + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + if (ret == 0) { + reg.int_h_l = (uint8_t)val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); + } - return ret; + return ret; } /** @@ -1283,24 +1283,24 @@ */ int32_t lps22hh_pin_polarity_get(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t *val) { - lps22hh_ctrl_reg2_t reg; - int32_t ret; + lps22hh_ctrl_reg2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1); - switch (reg.int_h_l) { - case LPS22HH_ACTIVE_HIGH: - *val = LPS22HH_ACTIVE_HIGH; - break; - case LPS22HH_ACTIVE_LOW: - *val = LPS22HH_ACTIVE_LOW; - break; - default: - *val = LPS22HH_ACTIVE_HIGH; - break; - } + switch (reg.int_h_l) { + case LPS22HH_ACTIVE_HIGH: + *val = LPS22HH_ACTIVE_HIGH; + break; + case LPS22HH_ACTIVE_LOW: + *val = LPS22HH_ACTIVE_LOW; + break; + default: + *val = LPS22HH_ACTIVE_HIGH; + break; + } - return ret; + return ret; } /** @@ -1314,9 +1314,9 @@ int32_t lps22hh_pin_int_route_set(lps22hh_ctx_t *ctx, lps22hh_ctrl_reg3_t *val) { - int32_t ret; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t*) val, 1); - return ret; + int32_t ret; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t *) val, 1); + return ret; } /** @@ -1330,9 +1330,9 @@ int32_t lps22hh_pin_int_route_get(lps22hh_ctx_t *ctx, lps22hh_ctrl_reg3_t *val) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t*) val, 1); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t *) val, 1); + return ret; } /** @@ -1358,22 +1358,21 @@ */ int32_t lps22hh_int_on_threshold_set(lps22hh_ctx_t *ctx, lps22hh_pe_t val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - if (ret == 0) { - reg.pe = (uint8_t)val; + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); + if (ret == 0) { + reg.pe = (uint8_t)val; - if (val == LPS22HH_NO_THRESHOLD){ - reg.diff_en = PROPERTY_DISABLE; + if (val == LPS22HH_NO_THRESHOLD) { + reg.diff_en = PROPERTY_DISABLE; + } else { + reg.diff_en = PROPERTY_ENABLE; + } + ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); } - else{ - reg.diff_en = PROPERTY_ENABLE; - } - ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); - } - return ret; + return ret; } /** @@ -1386,30 +1385,30 @@ */ int32_t lps22hh_int_on_threshold_get(lps22hh_ctx_t *ctx, lps22hh_pe_t *val) { - lps22hh_interrupt_cfg_t reg; - int32_t ret; + lps22hh_interrupt_cfg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1); + ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1); - switch (reg.pe) { - case LPS22HH_NO_THRESHOLD: - *val = LPS22HH_NO_THRESHOLD; - break; - case LPS22HH_POSITIVE: - *val = LPS22HH_POSITIVE; - break; - case LPS22HH_NEGATIVE: - *val = LPS22HH_NEGATIVE; - break; - case LPS22HH_BOTH: - *val = LPS22HH_BOTH; - break; - default: - *val = LPS22HH_NO_THRESHOLD; - break; - } + switch (reg.pe) { + case LPS22HH_NO_THRESHOLD: + *val = LPS22HH_NO_THRESHOLD; + break; + case LPS22HH_POSITIVE: + *val = LPS22HH_POSITIVE; + break; + case LPS22HH_NEGATIVE: + *val = LPS22HH_NEGATIVE; + break; + case LPS22HH_BOTH: + *val = LPS22HH_BOTH; + break; + default: + *val = LPS22HH_NO_THRESHOLD; + break; + } - return ret; + return ret; } /** @@ -1422,20 +1421,20 @@ */ int32_t lps22hh_int_treshold_set(lps22hh_ctx_t *ctx, uint16_t buff) { - int32_t ret; - lps22hh_ths_p_l_t ths_p_l; - lps22hh_ths_p_h_t ths_p_h; - - ths_p_l.ths = (uint8_t)(buff & 0x00FFU); - ths_p_h.ths = (uint8_t)((buff & 0x7F00U) >> 8); - - ret = lps22hh_write_reg(ctx, LPS22HH_THS_P_L, - (uint8_t*)&ths_p_l, 1); - if (ret == 0) { - ret = lps22hh_write_reg(ctx, LPS22HH_THS_P_H, - (uint8_t*)&ths_p_h, 1); - } - return ret; + int32_t ret; + lps22hh_ths_p_l_t ths_p_l; + lps22hh_ths_p_h_t ths_p_h; + + ths_p_l.ths = (uint8_t)(buff & 0x00FFU); + ths_p_h.ths = (uint8_t)((buff & 0x7F00U) >> 8); + + ret = lps22hh_write_reg(ctx, LPS22HH_THS_P_L, + (uint8_t *)&ths_p_l, 1); + if (ret == 0) { + ret = lps22hh_write_reg(ctx, LPS22HH_THS_P_H, + (uint8_t *)&ths_p_h, 1); + } + return ret; } /** @@ -1448,19 +1447,19 @@ */ int32_t lps22hh_int_treshold_get(lps22hh_ctx_t *ctx, uint16_t *buff) { - int32_t ret; - lps22hh_ths_p_l_t ths_p_l; - lps22hh_ths_p_h_t ths_p_h; - - ret = lps22hh_read_reg(ctx, LPS22HH_THS_P_L, - (uint8_t*)&ths_p_l, 1); - if (ret == 0) { - ret = lps22hh_read_reg(ctx, LPS22HH_THS_P_H, - (uint8_t*)&ths_p_h, 1); - *buff = (uint16_t)ths_p_h.ths << 8; - *buff |= (uint16_t)ths_p_l.ths; - } - return ret; + int32_t ret; + lps22hh_ths_p_l_t ths_p_l; + lps22hh_ths_p_h_t ths_p_h; + + ret = lps22hh_read_reg(ctx, LPS22HH_THS_P_L, + (uint8_t *)&ths_p_l, 1); + if (ret == 0) { + ret = lps22hh_read_reg(ctx, LPS22HH_THS_P_H, + (uint8_t *)&ths_p_h, 1); + *buff = (uint16_t)ths_p_h.ths << 8; + *buff |= (uint16_t)ths_p_l.ths; + } + return ret; } /** @@ -1485,15 +1484,15 @@ */ int32_t lps22hh_fifo_mode_set(lps22hh_ctx_t *ctx, lps22hh_f_mode_t val) { - lps22hh_fifo_ctrl_t reg; - int32_t ret; + lps22hh_fifo_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); - if (ret == 0) { - reg.f_mode = (uint8_t)val; - ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1); + if (ret == 0) { + reg.f_mode = (uint8_t)val; + ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1); + } + return ret; } /** @@ -1506,39 +1505,39 @@ */ int32_t lps22hh_fifo_mode_get(lps22hh_ctx_t *ctx, lps22hh_f_mode_t *val) { - lps22hh_fifo_ctrl_t reg; - int32_t ret; + lps22hh_fifo_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1); - switch (reg.f_mode) { - case LPS22HH_BYPASS_MODE: - *val = LPS22HH_BYPASS_MODE; - break; - case LPS22HH_FIFO_MODE: - *val = LPS22HH_FIFO_MODE; - break; - case LPS22HH_STREAM_MODE: - *val = LPS22HH_STREAM_MODE; - break; - case LPS22HH_DYNAMIC_STREAM_MODE: - *val = LPS22HH_DYNAMIC_STREAM_MODE; - break; - case LPS22HH_BYPASS_TO_FIFO_MODE: - *val = LPS22HH_BYPASS_TO_FIFO_MODE; - break; - case LPS22HH_BYPASS_TO_STREAM_MODE: - *val = LPS22HH_BYPASS_TO_STREAM_MODE; - break; - case LPS22HH_STREAM_TO_FIFO_MODE: - *val = LPS22HH_STREAM_TO_FIFO_MODE; - break; - default: - *val = LPS22HH_BYPASS_MODE; - break; - } + switch (reg.f_mode) { + case LPS22HH_BYPASS_MODE: + *val = LPS22HH_BYPASS_MODE; + break; + case LPS22HH_FIFO_MODE: + *val = LPS22HH_FIFO_MODE; + break; + case LPS22HH_STREAM_MODE: + *val = LPS22HH_STREAM_MODE; + break; + case LPS22HH_DYNAMIC_STREAM_MODE: + *val = LPS22HH_DYNAMIC_STREAM_MODE; + break; + case LPS22HH_BYPASS_TO_FIFO_MODE: + *val = LPS22HH_BYPASS_TO_FIFO_MODE; + break; + case LPS22HH_BYPASS_TO_STREAM_MODE: + *val = LPS22HH_BYPASS_TO_STREAM_MODE; + break; + case LPS22HH_STREAM_TO_FIFO_MODE: + *val = LPS22HH_STREAM_TO_FIFO_MODE; + break; + default: + *val = LPS22HH_BYPASS_MODE; + break; + } - return ret; + return ret; } /** @@ -1552,15 +1551,15 @@ */ int32_t lps22hh_fifo_stop_on_wtm_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_fifo_ctrl_t reg; - int32_t ret; + lps22hh_fifo_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); - if (ret == 0) { - reg.stop_on_wtm = val; - ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1); + if (ret == 0) { + reg.stop_on_wtm = val; + ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1); + } + return ret; } /** @@ -1574,13 +1573,13 @@ */ int32_t lps22hh_fifo_stop_on_wtm_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_fifo_ctrl_t reg; - int32_t ret; + lps22hh_fifo_ctrl_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); - *val = reg.stop_on_wtm; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1); + *val = reg.stop_on_wtm; - return ret; + return ret; } /** @@ -1593,15 +1592,15 @@ */ int32_t lps22hh_fifo_watermark_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_fifo_wtm_t reg; - int32_t ret; + lps22hh_fifo_wtm_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t*) ®, 1); - if (ret == 0) { - reg.wtm = val; - ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t*) ®, 1); - } - return ret; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t *) ®, 1); + if (ret == 0) { + reg.wtm = val; + ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t *) ®, 1); + } + return ret; } /** @@ -1614,13 +1613,13 @@ */ int32_t lps22hh_fifo_watermark_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_fifo_wtm_t reg; - int32_t ret; + lps22hh_fifo_wtm_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t*) ®, 1); - *val = reg.wtm; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t *) ®, 1); + *val = reg.wtm; - return ret; + return ret; } /** @@ -1633,9 +1632,9 @@ */ int32_t lps22hh_fifo_data_level_get(lps22hh_ctx_t *ctx, uint8_t *buff) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS1, buff, 1); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS1, buff, 1); + return ret; } /** @@ -1648,9 +1647,9 @@ */ int32_t lps22hh_fifo_src_get(lps22hh_ctx_t *ctx, lps22hh_fifo_status2_t *val) { - int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) val, 1); - return ret; + int32_t ret; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) val, 1); + return ret; } /** @@ -1663,13 +1662,13 @@ */ int32_t lps22hh_fifo_full_flag_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_fifo_status2_t reg; - int32_t ret; + lps22hh_fifo_status2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) ®, 1); - *val = reg.fifo_full_ia; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) ®, 1); + *val = reg.fifo_full_ia; - return ret; + return ret; } /** @@ -1682,13 +1681,13 @@ */ int32_t lps22hh_fifo_ovr_flag_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_fifo_status2_t reg; - int32_t ret; + lps22hh_fifo_status2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) ®, 1); - *val = reg.fifo_ovr_ia; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) ®, 1); + *val = reg.fifo_ovr_ia; - return ret; + return ret; } /** @@ -1701,13 +1700,13 @@ */ int32_t lps22hh_fifo_wtm_flag_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_fifo_status2_t reg; - int32_t ret; + lps22hh_fifo_status2_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) ®, 1); - *val = reg.fifo_wtm_ia; + ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) ®, 1); + *val = reg.fifo_wtm_ia; - return ret; + return ret; } /** @@ -1719,14 +1718,14 @@ */ int32_t lps22hh_fifo_ovr_on_int_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_reg_t reg; - int32_t ret; + lps22hh_reg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); - reg.ctrl_reg3.int_f_ovr = val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); + reg.ctrl_reg3.int_f_ovr = val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); - return ret; + return ret; } /** @@ -1738,13 +1737,13 @@ */ int32_t lps22hh_fifo_ovr_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_reg_t reg; - int32_t ret; + lps22hh_reg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); - *val = reg.ctrl_reg3.int_f_ovr; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); + *val = reg.ctrl_reg3.int_f_ovr; - return ret; + return ret; } /** @@ -1756,14 +1755,14 @@ */ int32_t lps22hh_fifo_threshold_on_int_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_reg_t reg; - int32_t ret; + lps22hh_reg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); - reg.ctrl_reg3.int_f_wtm = val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); + reg.ctrl_reg3.int_f_wtm = val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); - return ret; + return ret; } /** @@ -1775,13 +1774,13 @@ */ int32_t lps22hh_fifo_threshold_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_reg_t reg; - int32_t ret; + lps22hh_reg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); - *val = reg.ctrl_reg3.int_f_wtm; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); + *val = reg.ctrl_reg3.int_f_wtm; - return ret; + return ret; } /** @@ -1793,14 +1792,14 @@ */ int32_t lps22hh_fifo_full_on_int_set(lps22hh_ctx_t *ctx, uint8_t val) { - lps22hh_reg_t reg; - int32_t ret; + lps22hh_reg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); - reg.ctrl_reg3.int_f_full = val; - ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); + reg.ctrl_reg3.int_f_full = val; + ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); - return ret; + return ret; } /** @@ -1812,13 +1811,13 @@ */ int32_t lps22hh_fifo_full_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val) { - lps22hh_reg_t reg; - int32_t ret; + lps22hh_reg_t reg; + int32_t ret; - ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); - *val = reg.ctrl_reg3.int_f_full; + ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); + *val = reg.ctrl_reg3.int_f_full; - return ret; + return ret; } /**