LELEC2811 - I&S
LIS2DW12 accelerometer sensor library
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Diff: lis2dw12_reg.c
- Revision:
- 4:94c5d5546161
- Parent:
- 3:111317ba9301
diff -r 111317ba9301 -r 94c5d5546161 lis2dw12_reg.c
--- a/lis2dw12_reg.c Wed Nov 21 15:43:22 2018 +0000
+++ b/lis2dw12_reg.c Wed Jul 24 14:18:07 2019 +0000
@@ -64,12 +64,12 @@
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
-int32_t lis2dw12_read_reg(lis2dw12_ctx_t* ctx, uint8_t reg, uint8_t* data,
+int32_t lis2dw12_read_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t *data,
uint16_t len)
{
- int32_t ret;
- ret = ctx->read_reg(ctx->handle, reg, data, len);
- return ret;
+ int32_t ret;
+ ret = ctx->read_reg(ctx->handle, reg, data, len);
+ return ret;
}
/**
@@ -82,19 +82,19 @@
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
-int32_t lis2dw12_write_reg(lis2dw12_ctx_t* ctx, uint8_t reg, uint8_t* data,
+int32_t lis2dw12_write_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t *data,
uint16_t len)
{
- int32_t ret;
- ret = ctx->write_reg(ctx->handle, reg, data, len);
- return ret;
+ int32_t ret;
+ ret = ctx->write_reg(ctx->handle, reg, data, len);
+ return ret;
}
/**
* @}
*
*/
-
+
/**
* @defgroup LIS2DW12_Sensitivity
* @brief These functions convert raw-data into engineering units.
@@ -104,47 +104,47 @@
float lis2dw12_from_fs2_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.061f;
+ return ((float)lsb) * 0.061f;
}
float lis2dw12_from_fs4_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.122f;
+ return ((float)lsb) * 0.122f;
}
float lis2dw12_from_fs8_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.244f;
+ return ((float)lsb) * 0.244f;
}
float lis2dw12_from_fs16_to_mg(int16_t lsb)
{
- return ((float)lsb) *0.488f;
+ return ((float)lsb) * 0.488f;
}
float lis2dw12_from_fs2_lp1_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.061f;
+ return ((float)lsb) * 0.061f;
}
float lis2dw12_from_fs4_lp1_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.122f;
+ return ((float)lsb) * 0.122f;
}
float lis2dw12_from_fs8_lp1_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.244f;
+ return ((float)lsb) * 0.244f;
}
float lis2dw12_from_fs16_lp1_to_mg(int16_t lsb)
{
- return ((float)lsb) * 0.488f;
+ return ((float)lsb) * 0.488f;
}
float lis2dw12_from_lsb_to_celsius(int16_t lsb)
{
- return (((float)lsb / 16.0f) + 25.0f);
+ return (((float)lsb / 16.0f) + 25.0f);
}
/**
@@ -154,7 +154,7 @@
/**
* @defgroup LIS2DW12_Data_Generation
- * @brief This section groups all the functions concerning
+ * @brief This section groups all the functions concerning
* data generation
* @{
*
@@ -171,24 +171,24 @@
*/
int32_t lis2dw12_power_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_mode_t val)
{
- lis2dw12_ctrl1_t ctrl1;
- lis2dw12_ctrl6_t ctrl6;
- int32_t ret;
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl6_t ctrl6;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- if (ret == 0) {
- ctrl1.mode = ( (uint8_t) val & 0x0CU ) >> 2;
- ctrl1.lp_mode = (uint8_t) val & 0x03U ;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- }
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- }
- if (ret == 0) {
- ctrl6.low_noise = ( (uint8_t) val & 0x10U ) >> 4;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ if (ret == 0) {
+ ctrl1.mode = ((uint8_t) val & 0x0CU) >> 2;
+ ctrl1.lp_mode = (uint8_t) val & 0x03U ;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ }
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ }
+ if (ret == 0) {
+ ctrl6.low_noise = ((uint8_t) val & 0x10U) >> 4;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ }
+ return ret;
}
/**
@@ -202,76 +202,76 @@
*/
int32_t lis2dw12_power_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_mode_t *val)
{
- lis2dw12_ctrl1_t ctrl1;
- lis2dw12_ctrl6_t ctrl6;
- int32_t ret;
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl6_t ctrl6;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
- switch (((ctrl6.low_noise << 4) + (ctrl1.mode << 2) +
- ctrl1.lp_mode)) {
- case LIS2DW12_HIGH_PERFORMANCE:
- *val = LIS2DW12_HIGH_PERFORMANCE;
- break;
- case LIS2DW12_CONT_LOW_PWR_4:
- *val = LIS2DW12_CONT_LOW_PWR_4;
- break;
- case LIS2DW12_CONT_LOW_PWR_3:
- *val = LIS2DW12_CONT_LOW_PWR_3;
- break;
- case LIS2DW12_CONT_LOW_PWR_2:
- *val = LIS2DW12_CONT_LOW_PWR_2;
- break;
- case LIS2DW12_CONT_LOW_PWR_12bit:
- *val = LIS2DW12_CONT_LOW_PWR_12bit;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_4:
- *val = LIS2DW12_SINGLE_LOW_PWR_4;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_3:
- *val = LIS2DW12_SINGLE_LOW_PWR_3;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_2:
- *val = LIS2DW12_SINGLE_LOW_PWR_2;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_12bit:
- *val = LIS2DW12_SINGLE_LOW_PWR_12bit;
- break;
- case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
- *val = LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE;
- break;
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
- *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4;
- break;
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
- *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3;
- break;
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
- *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2;
- break;
- case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
- *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
- *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
- *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3;
- break;
- case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
- *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2;
- break;
- case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
- *val = LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit;
- break;
- default:
- *val = LIS2DW12_HIGH_PERFORMANCE;
- break;
+ switch (((ctrl6.low_noise << 4) + (ctrl1.mode << 2) +
+ ctrl1.lp_mode)) {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ *val = LIS2DW12_HIGH_PERFORMANCE;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_4:
+ *val = LIS2DW12_CONT_LOW_PWR_4;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_3:
+ *val = LIS2DW12_CONT_LOW_PWR_3;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_2:
+ *val = LIS2DW12_CONT_LOW_PWR_2;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ *val = LIS2DW12_CONT_LOW_PWR_12bit;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ *val = LIS2DW12_SINGLE_LOW_PWR_4;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ *val = LIS2DW12_SINGLE_LOW_PWR_3;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ *val = LIS2DW12_SINGLE_LOW_PWR_2;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ *val = LIS2DW12_SINGLE_LOW_PWR_12bit;
+ break;
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *val = LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2;
+ break;
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ *val = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3;
+ break;
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ *val = LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2;
+ break;
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *val = LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit;
+ break;
+ default:
+ *val = LIS2DW12_HIGH_PERFORMANCE;
+ break;
+ }
}
- }
- return ret;
+ return ret;
}
/**
@@ -284,23 +284,23 @@
*/
int32_t lis2dw12_data_rate_set(lis2dw12_ctx_t *ctx, lis2dw12_odr_t val)
{
- lis2dw12_ctrl1_t ctrl1;
- lis2dw12_ctrl3_t ctrl3;
- int32_t ret;
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl3_t ctrl3;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- if (ret == 0) {
- ctrl1.odr = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- }
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) &ctrl3, 1);
- }
- if (ret == 0) {
- ctrl3.slp_mode = ( (uint8_t) val & 0x30U ) >> 4;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) &ctrl3, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ if (ret == 0) {
+ ctrl1.odr = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ }
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) &ctrl3, 1);
+ }
+ if (ret == 0) {
+ ctrl3.slp_mode = ((uint8_t) val & 0x30U) >> 4;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) &ctrl3, 1);
+ }
+ return ret;
}
/**
@@ -313,61 +313,61 @@
*/
int32_t lis2dw12_data_rate_get(lis2dw12_ctx_t *ctx, lis2dw12_odr_t *val)
{
- lis2dw12_ctrl1_t ctrl1;
- lis2dw12_ctrl3_t ctrl3;
- int32_t ret;
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl3_t ctrl3;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, (uint8_t *) &ctrl1, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) &ctrl3, 1);
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1,(uint8_t*) &ctrl1, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) &ctrl3, 1);
-
- switch ((ctrl3.slp_mode << 4) + ctrl1.odr) {
- case LIS2DW12_XL_ODR_OFF:
- *val = LIS2DW12_XL_ODR_OFF;
- break;
- case LIS2DW12_XL_ODR_1Hz6_LP_ONLY:
- *val = LIS2DW12_XL_ODR_1Hz6_LP_ONLY;
- break;
- case LIS2DW12_XL_ODR_12Hz5:
- *val = LIS2DW12_XL_ODR_12Hz5;
- break;
- case LIS2DW12_XL_ODR_25Hz:
- *val = LIS2DW12_XL_ODR_25Hz;
- break;
- case LIS2DW12_XL_ODR_50Hz:
- *val = LIS2DW12_XL_ODR_50Hz;
- break;
- case LIS2DW12_XL_ODR_100Hz:
- *val = LIS2DW12_XL_ODR_100Hz;
- break;
- case LIS2DW12_XL_ODR_200Hz:
- *val = LIS2DW12_XL_ODR_200Hz;
- break;
- case LIS2DW12_XL_ODR_400Hz:
- *val = LIS2DW12_XL_ODR_400Hz;
- break;
- case LIS2DW12_XL_ODR_800Hz:
- *val = LIS2DW12_XL_ODR_800Hz;
- break;
- case LIS2DW12_XL_ODR_1k6Hz:
- *val = LIS2DW12_XL_ODR_1k6Hz;
- break;
- case LIS2DW12_XL_SET_SW_TRIG:
- *val = LIS2DW12_XL_SET_SW_TRIG;
- break;
- case LIS2DW12_XL_SET_PIN_TRIG:
- *val = LIS2DW12_XL_SET_PIN_TRIG;
- break;
- default:
- *val = LIS2DW12_XL_ODR_OFF;
- break;
+ switch ((ctrl3.slp_mode << 4) + ctrl1.odr) {
+ case LIS2DW12_XL_ODR_OFF:
+ *val = LIS2DW12_XL_ODR_OFF;
+ break;
+ case LIS2DW12_XL_ODR_1Hz6_LP_ONLY:
+ *val = LIS2DW12_XL_ODR_1Hz6_LP_ONLY;
+ break;
+ case LIS2DW12_XL_ODR_12Hz5:
+ *val = LIS2DW12_XL_ODR_12Hz5;
+ break;
+ case LIS2DW12_XL_ODR_25Hz:
+ *val = LIS2DW12_XL_ODR_25Hz;
+ break;
+ case LIS2DW12_XL_ODR_50Hz:
+ *val = LIS2DW12_XL_ODR_50Hz;
+ break;
+ case LIS2DW12_XL_ODR_100Hz:
+ *val = LIS2DW12_XL_ODR_100Hz;
+ break;
+ case LIS2DW12_XL_ODR_200Hz:
+ *val = LIS2DW12_XL_ODR_200Hz;
+ break;
+ case LIS2DW12_XL_ODR_400Hz:
+ *val = LIS2DW12_XL_ODR_400Hz;
+ break;
+ case LIS2DW12_XL_ODR_800Hz:
+ *val = LIS2DW12_XL_ODR_800Hz;
+ break;
+ case LIS2DW12_XL_ODR_1k6Hz:
+ *val = LIS2DW12_XL_ODR_1k6Hz;
+ break;
+ case LIS2DW12_XL_SET_SW_TRIG:
+ *val = LIS2DW12_XL_SET_SW_TRIG;
+ break;
+ case LIS2DW12_XL_SET_PIN_TRIG:
+ *val = LIS2DW12_XL_SET_PIN_TRIG;
+ break;
+ default:
+ *val = LIS2DW12_XL_ODR_OFF;
+ break;
+ }
}
- }
- return ret;
+ return ret;
}
/**
- * @brief Block data update.[set]
+ * @brief Block data update.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of bdu in reg CTRL2
@@ -376,15 +376,15 @@
*/
int32_t lis2dw12_block_data_update_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.bdu = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.bdu = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -397,13 +397,13 @@
*/
int32_t lis2dw12_block_data_update_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- *val = reg.bdu;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ *val = reg.bdu;
- return ret;
+ return ret;
}
/**
@@ -416,15 +416,15 @@
*/
int32_t lis2dw12_full_scale_set(lis2dw12_ctx_t *ctx, lis2dw12_fs_t val)
{
- lis2dw12_ctrl6_t reg;
- int32_t ret;
+ lis2dw12_ctrl6_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.fs = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.fs = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -437,44 +437,44 @@
*/
int32_t lis2dw12_full_scale_get(lis2dw12_ctx_t *ctx, lis2dw12_fs_t *val)
{
- lis2dw12_ctrl6_t reg;
- int32_t ret;
+ lis2dw12_ctrl6_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
- switch (reg.fs) {
- case LIS2DW12_2g:
- *val = LIS2DW12_2g;
- break;
- case LIS2DW12_4g:
- *val = LIS2DW12_4g;
- break;
- case LIS2DW12_8g:
- *val = LIS2DW12_8g;
- break;
- case LIS2DW12_16g:
- *val = LIS2DW12_16g;
- break;
- default:
- *val = LIS2DW12_2g;
- break;
- }
- return ret;
+ switch (reg.fs) {
+ case LIS2DW12_2g:
+ *val = LIS2DW12_2g;
+ break;
+ case LIS2DW12_4g:
+ *val = LIS2DW12_4g;
+ break;
+ case LIS2DW12_8g:
+ *val = LIS2DW12_8g;
+ break;
+ case LIS2DW12_16g:
+ *val = LIS2DW12_16g;
+ break;
+ default:
+ *val = LIS2DW12_2g;
+ break;
+ }
+ return ret;
}
/**
* @brief The STATUS_REG register of the device.[get]
*
* @param ctx read / write interface definitions
- * @param val union of registers from STATUS to
+ * @param val union of registers from STATUS to
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lis2dw12_status_reg_get(lis2dw12_ctx_t *ctx, lis2dw12_status_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS, (uint8_t *) val, 1);
+ return ret;
}
/**
@@ -487,17 +487,17 @@
*/
int32_t lis2dw12_flag_data_ready_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_status_t reg;
- int32_t ret;
+ lis2dw12_status_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS,(uint8_t*) ®, 1);
- *val = reg.drdy;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS, (uint8_t *) ®, 1);
+ *val = reg.drdy;
- return ret;
+ return ret;
}
/**
* @brief Read all the interrupt/status flag of the device.[get]
- *
+ *
* @param ctx read / write interface definitions
* @param val registers STATUS_DUP, WAKE_UP_SRC,
* TAP_SRC, SIXD_SRC, ALL_INT_SRC
@@ -507,15 +507,15 @@
int32_t lis2dw12_all_sources_get(lis2dw12_ctx_t *ctx,
lis2dw12_all_sources_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS_DUP, (uint8_t*) val, 5);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_STATUS_DUP, (uint8_t *) val, 5);
+ return ret;
}
/**
- * @brief Accelerometer X-axis user offset correction expressed in two’s
+ * @brief Accelerometer X-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[set]
+ * in the range [-127 127].[set]
*
* @param ctx read / write interface definitions
* @param buff buffer that contains data to write
@@ -524,15 +524,15 @@
*/
int32_t lis2dw12_usr_offset_x_set(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer X-axis user offset correction expressed in two’s
+ * @brief Accelerometer X-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[get]
+ * in the range [-127 127].[get]
*
* @param ctx read / write interface definitions
* @param buff buffer that stores data read
@@ -541,15 +541,15 @@
*/
int32_t lis2dw12_usr_offset_x_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer Y-axis user offset correction expressed in two’s
+ * @brief Accelerometer Y-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[set]
+ * in the range [-127 127].[set]
*
* @param ctx read / write interface definitions
* @param buff buffer that contains data to write
@@ -558,15 +558,15 @@
*/
int32_t lis2dw12_usr_offset_y_set(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer Y-axis user offset correction expressed in two’s
+ * @brief Accelerometer Y-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[get]
+ * in the range [-127 127].[get]
*
* @param ctx read / write interface definitions
* @param buff buffer that stores data read
@@ -575,15 +575,15 @@
*/
int32_t lis2dw12_usr_offset_y_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer Z-axis user offset correction expressed in two’s
+ * @brief Accelerometer Z-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[set]
+ * in the range [-127 127].[set]
*
* @param ctx read / write interface definitions
* @param buff buffer that contains data to write
@@ -592,15 +592,15 @@
*/
int32_t lis2dw12_usr_offset_z_set(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Accelerometer Z-axis user offset correction expressed in two’s
+ * @brief Accelerometer Z-axis user offset correction expressed in two’s
* complement, weight depends on bit USR_OFF_W. The value must be
- * in the range [-127 127].[get]
+ * in the range [-127 127].[get]
*
* @param ctx read / write interface definitions
* @param buff buffer that stores data read
@@ -609,13 +609,13 @@
*/
int32_t lis2dw12_usr_offset_z_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
+ return ret;
}
/**
- * @brief Weight of XL user offset bits of registers X_OFS_USR,
+ * @brief Weight of XL user offset bits of registers X_OFS_USR,
* Y_OFS_USR, Z_OFS_USR.[set]
*
* @param ctx read / write interface definitions
@@ -627,19 +627,19 @@
int32_t lis2dw12_offset_weight_set(lis2dw12_ctx_t *ctx,
lis2dw12_usr_off_w_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.usr_off_w = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.usr_off_w = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief Weight of XL user offset bits of registers X_OFS_USR,
+ * @brief Weight of XL user offset bits of registers X_OFS_USR,
* Y_OFS_USR, Z_OFS_USR.[get]
*
* @param ctx read / write interface definitions
@@ -650,22 +650,22 @@
int32_t lis2dw12_offset_weight_get(lis2dw12_ctx_t *ctx,
lis2dw12_usr_off_w_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- switch (reg.usr_off_w) {
- case LIS2DW12_LSb_977ug:
- *val = LIS2DW12_LSb_977ug;
- break;
- case LIS2DW12_LSb_15mg6:
- *val = LIS2DW12_LSb_15mg6;
- break;
- default:
- *val = LIS2DW12_LSb_977ug;
- break;
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ switch (reg.usr_off_w) {
+ case LIS2DW12_LSb_977ug:
+ *val = LIS2DW12_LSb_977ug;
+ break;
+ case LIS2DW12_LSb_15mg6:
+ *val = LIS2DW12_LSb_15mg6;
+ break;
+ default:
+ *val = LIS2DW12_LSb_977ug;
+ break;
+ }
+ return ret;
}
/**
@@ -681,7 +681,7 @@
*/
/**
- * @brief Temperature data output register (r). L and H registers
+ * @brief Temperature data output register (r). L and H registers
* together express a 16-bit word in two’s complement.[get]
*
* @param ctx read / write interface definitions
@@ -691,13 +691,13 @@
*/
int32_t lis2dw12_temperature_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_OUT_T_L, buff, 2);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_OUT_T_L, buff, 2);
+ return ret;
}
/**
- * @brief Linear acceleration output register. The value is expressed as
+ * @brief Linear acceleration output register. The value is expressed as
* a 16-bit word in two’s complement.[get]
*
* @param ctx read / write interface definitions
@@ -707,9 +707,9 @@
*/
int32_t lis2dw12_acceleration_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_OUT_X_L, buff, 6);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_OUT_X_L, buff, 6);
+ return ret;
}
/**
@@ -734,13 +734,13 @@
*/
int32_t lis2dw12_device_id_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WHO_AM_I, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WHO_AM_I, buff, 1);
+ return ret;
}
/**
- * @brief Register address automatically incremented during multiple byte
+ * @brief Register address automatically incremented during multiple byte
* access with a serial interface.[set]
*
* @param ctx read / write interface definitions
@@ -750,19 +750,19 @@
*/
int32_t lis2dw12_auto_increment_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.if_add_inc = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.if_add_inc = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief Register address automatically incremented during multiple
+ * @brief Register address automatically incremented during multiple
* byte access with a serial interface.[get]
*
* @param ctx read / write interface definitions
@@ -772,13 +772,13 @@
*/
int32_t lis2dw12_auto_increment_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- *val = reg.if_add_inc;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ *val = reg.if_add_inc;
- return ret;
+ return ret;
}
/**
@@ -791,16 +791,16 @@
*/
int32_t lis2dw12_reset_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.soft_reset = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.soft_reset = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -813,13 +813,13 @@
*/
int32_t lis2dw12_reset_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- *val = reg.soft_reset;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ *val = reg.soft_reset;
- return ret;
+ return ret;
}
/**
@@ -832,15 +832,15 @@
*/
int32_t lis2dw12_boot_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.boot = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.boot = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -853,17 +853,17 @@
*/
int32_t lis2dw12_boot_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- *val = reg.boot;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ *val = reg.boot;
- return ret;
+ return ret;
}
/**
- * @brief Sensor self-test enable.[set]
+ * @brief Sensor self-test enable.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of st in reg CTRL3
@@ -872,16 +872,16 @@
*/
int32_t lis2dw12_self_test_set(lis2dw12_ctx_t *ctx, lis2dw12_st_t val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.st = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.st = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -894,26 +894,26 @@
*/
int32_t lis2dw12_self_test_get(lis2dw12_ctx_t *ctx, lis2dw12_st_t *val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
- switch (reg.st) {
- case LIS2DW12_XL_ST_DISABLE:
- *val = LIS2DW12_XL_ST_DISABLE;
- break;
- case LIS2DW12_XL_ST_POSITIVE:
- *val = LIS2DW12_XL_ST_POSITIVE;
- break;
- case LIS2DW12_XL_ST_NEGATIVE:
- *val = LIS2DW12_XL_ST_NEGATIVE;
- break;
- default:
- *val = LIS2DW12_XL_ST_DISABLE;
- break;
- }
- return ret;
+ switch (reg.st) {
+ case LIS2DW12_XL_ST_DISABLE:
+ *val = LIS2DW12_XL_ST_DISABLE;
+ break;
+ case LIS2DW12_XL_ST_POSITIVE:
+ *val = LIS2DW12_XL_ST_POSITIVE;
+ break;
+ case LIS2DW12_XL_ST_NEGATIVE:
+ *val = LIS2DW12_XL_ST_NEGATIVE;
+ break;
+ default:
+ *val = LIS2DW12_XL_ST_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -927,16 +927,16 @@
int32_t lis2dw12_data_ready_mode_set(lis2dw12_ctx_t *ctx,
lis2dw12_drdy_pulsed_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.drdy_pulsed = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.drdy_pulsed = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -950,23 +950,23 @@
int32_t lis2dw12_data_ready_mode_get(lis2dw12_ctx_t *ctx,
lis2dw12_drdy_pulsed_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
- switch (reg.drdy_pulsed) {
- case LIS2DW12_DRDY_LATCHED:
- *val = LIS2DW12_DRDY_LATCHED;
- break;
- case LIS2DW12_DRDY_PULSED:
- *val = LIS2DW12_DRDY_PULSED;
- break;
- default:
- *val = LIS2DW12_DRDY_LATCHED;
- break;
- }
- return ret;
+ switch (reg.drdy_pulsed) {
+ case LIS2DW12_DRDY_LATCHED:
+ *val = LIS2DW12_DRDY_LATCHED;
+ break;
+ case LIS2DW12_DRDY_PULSED:
+ *val = LIS2DW12_DRDY_PULSED;
+ break;
+ default:
+ *val = LIS2DW12_DRDY_LATCHED;
+ break;
+ }
+ return ret;
}
/**
@@ -992,24 +992,24 @@
*/
int32_t lis2dw12_filter_path_set(lis2dw12_ctx_t *ctx, lis2dw12_fds_t val)
{
- lis2dw12_ctrl6_t ctrl6;
- lis2dw12_ctrl_reg7_t ctrl_reg7;
- int32_t ret;
+ lis2dw12_ctrl6_t ctrl6;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- if (ret == 0) {
- ctrl6.fds = ( (uint8_t) val & 0x10U ) >> 4;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- }
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) &ctrl_reg7, 1);
- }
- if (ret == 0) {
- ctrl_reg7.usr_off_on_out = (uint8_t) val & 0x01U;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) &ctrl_reg7, 1);
- }
-
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ if (ret == 0) {
+ ctrl6.fds = ((uint8_t) val & 0x10U) >> 4;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ }
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) &ctrl_reg7, 1);
+ }
+ if (ret == 0) {
+ ctrl_reg7.usr_off_on_out = (uint8_t) val & 0x01U;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) &ctrl_reg7, 1);
+ }
+
+ return ret;
}
/**
@@ -1022,34 +1022,34 @@
*/
int32_t lis2dw12_filter_path_get(lis2dw12_ctx_t *ctx, lis2dw12_fds_t *val)
{
- lis2dw12_ctrl6_t ctrl6;
- lis2dw12_ctrl_reg7_t ctrl_reg7;
- int32_t ret;
+ lis2dw12_ctrl6_t ctrl6;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) &ctrl6, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) &ctrl_reg7, 1);
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) &ctrl6, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) &ctrl_reg7, 1);
-
- switch ((ctrl6.fds << 4 ) + ctrl_reg7.usr_off_on_out) {
- case LIS2DW12_LPF_ON_OUT:
- *val = LIS2DW12_LPF_ON_OUT;
- break;
- case LIS2DW12_USER_OFFSET_ON_OUT:
- *val = LIS2DW12_USER_OFFSET_ON_OUT;
- break;
- case LIS2DW12_HIGH_PASS_ON_OUT:
- *val = LIS2DW12_HIGH_PASS_ON_OUT;
- break;
- default:
- *val = LIS2DW12_LPF_ON_OUT;
- break;
+ switch ((ctrl6.fds << 4) + ctrl_reg7.usr_off_on_out) {
+ case LIS2DW12_LPF_ON_OUT:
+ *val = LIS2DW12_LPF_ON_OUT;
+ break;
+ case LIS2DW12_USER_OFFSET_ON_OUT:
+ *val = LIS2DW12_USER_OFFSET_ON_OUT;
+ break;
+ case LIS2DW12_HIGH_PASS_ON_OUT:
+ *val = LIS2DW12_HIGH_PASS_ON_OUT;
+ break;
+ default:
+ *val = LIS2DW12_LPF_ON_OUT;
+ break;
+ }
}
- }
- return ret;
+ return ret;
}
/**
- * @brief Accelerometer cutoff filter frequency. Valid for low and high
+ * @brief Accelerometer cutoff filter frequency. Valid for low and high
* pass filter.[set]
*
* @param ctx read / write interface definitions
@@ -1058,22 +1058,22 @@
*
*/
int32_t lis2dw12_filter_bandwidth_set(lis2dw12_ctx_t *ctx,
- lis2dw12_bw_filt_t val)
+ lis2dw12_bw_filt_t val)
{
- lis2dw12_ctrl6_t reg;
- int32_t ret;
+ lis2dw12_ctrl6_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.bw_filt = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.bw_filt = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
- * @brief Accelerometer cutoff filter frequency. Valid for low and
+ * @brief Accelerometer cutoff filter frequency. Valid for low and
* high pass filter.[get]
*
* @param ctx read / write interface definitions
@@ -1082,31 +1082,31 @@
*
*/
int32_t lis2dw12_filter_bandwidth_get(lis2dw12_ctx_t *ctx,
- lis2dw12_bw_filt_t *val)
+ lis2dw12_bw_filt_t *val)
{
- lis2dw12_ctrl6_t reg;
- int32_t ret;
+ lis2dw12_ctrl6_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, (uint8_t *) ®, 1);
- switch (reg.bw_filt) {
- case LIS2DW12_ODR_DIV_2:
- *val = LIS2DW12_ODR_DIV_2;
- break;
- case LIS2DW12_ODR_DIV_4:
- *val = LIS2DW12_ODR_DIV_4;
- break;
- case LIS2DW12_ODR_DIV_10:
- *val = LIS2DW12_ODR_DIV_10;
- break;
- case LIS2DW12_ODR_DIV_20:
- *val = LIS2DW12_ODR_DIV_20;
- break;
- default:
- *val = LIS2DW12_ODR_DIV_2;
- break;
- }
- return ret;
+ switch (reg.bw_filt) {
+ case LIS2DW12_ODR_DIV_2:
+ *val = LIS2DW12_ODR_DIV_2;
+ break;
+ case LIS2DW12_ODR_DIV_4:
+ *val = LIS2DW12_ODR_DIV_4;
+ break;
+ case LIS2DW12_ODR_DIV_10:
+ *val = LIS2DW12_ODR_DIV_10;
+ break;
+ case LIS2DW12_ODR_DIV_20:
+ *val = LIS2DW12_ODR_DIV_20;
+ break;
+ default:
+ *val = LIS2DW12_ODR_DIV_2;
+ break;
+ }
+ return ret;
}
/**
@@ -1119,15 +1119,15 @@
*/
int32_t lis2dw12_reference_mode_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.hp_ref_mode = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.hp_ref_mode = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1140,13 +1140,13 @@
*/
int32_t lis2dw12_reference_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- *val = reg.hp_ref_mode;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ *val = reg.hp_ref_mode;
- return ret;
+ return ret;
}
/**
@@ -1172,19 +1172,19 @@
*/
int32_t lis2dw12_spi_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sim_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.sim = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.sim = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief SPI Serial Interface Mode selection.[get]
+ * @brief SPI Serial Interface Mode selection.[get]
*
* @param ctx read / write interface definitions
* @param val Get the values of sim in reg CTRL2
@@ -1193,23 +1193,23 @@
*/
int32_t lis2dw12_spi_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sim_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
- switch (reg.sim) {
- case LIS2DW12_SPI_4_WIRE:
- *val = LIS2DW12_SPI_4_WIRE;
- break;
- case LIS2DW12_SPI_3_WIRE:
- *val = LIS2DW12_SPI_3_WIRE;
- break;
- default:
- *val = LIS2DW12_SPI_4_WIRE;
- break;
- }
- return ret;
+ switch (reg.sim) {
+ case LIS2DW12_SPI_4_WIRE:
+ *val = LIS2DW12_SPI_4_WIRE;
+ break;
+ case LIS2DW12_SPI_3_WIRE:
+ *val = LIS2DW12_SPI_3_WIRE;
+ break;
+ default:
+ *val = LIS2DW12_SPI_4_WIRE;
+ break;
+ }
+ return ret;
}
/**
@@ -1224,19 +1224,19 @@
int32_t lis2dw12_i2c_interface_set(lis2dw12_ctx_t *ctx,
lis2dw12_i2c_disable_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.i2c_disable = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.i2c_disable = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief Disable / Enable I2C interface.[get]
+ * @brief Disable / Enable I2C interface.[get]
*
* @param ctx read / write interface definitions
* @param val Get the values of i2c_disable in reg CTRL2
@@ -1246,23 +1246,23 @@
int32_t lis2dw12_i2c_interface_get(lis2dw12_ctx_t *ctx,
lis2dw12_i2c_disable_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
- switch (reg.i2c_disable) {
- case LIS2DW12_I2C_ENABLE:
- *val = LIS2DW12_I2C_ENABLE;
- break;
- case LIS2DW12_I2C_DISABLE:
- *val = LIS2DW12_I2C_DISABLE;
- break;
- default:
- *val = LIS2DW12_I2C_ENABLE;
- break;
- }
- return ret;
+ switch (reg.i2c_disable) {
+ case LIS2DW12_I2C_ENABLE:
+ *val = LIS2DW12_I2C_ENABLE;
+ break;
+ case LIS2DW12_I2C_DISABLE:
+ *val = LIS2DW12_I2C_DISABLE;
+ break;
+ default:
+ *val = LIS2DW12_I2C_ENABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -1275,15 +1275,15 @@
*/
int32_t lis2dw12_cs_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.cs_pu_disc = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.cs_pu_disc = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1296,23 +1296,23 @@
*/
int32_t lis2dw12_cs_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t *val)
{
- lis2dw12_ctrl2_t reg;
- int32_t ret;
+ lis2dw12_ctrl2_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, (uint8_t *) ®, 1);
- switch (reg.cs_pu_disc) {
- case LIS2DW12_PULL_UP_CONNECT:
- *val = LIS2DW12_PULL_UP_CONNECT;
- break;
- case LIS2DW12_PULL_UP_DISCONNECT:
- *val = LIS2DW12_PULL_UP_DISCONNECT;
- break;
- default:
- *val = LIS2DW12_PULL_UP_CONNECT;
- break;
- }
- return ret;
+ switch (reg.cs_pu_disc) {
+ case LIS2DW12_PULL_UP_CONNECT:
+ *val = LIS2DW12_PULL_UP_CONNECT;
+ break;
+ case LIS2DW12_PULL_UP_DISCONNECT:
+ *val = LIS2DW12_PULL_UP_DISCONNECT;
+ break;
+ default:
+ *val = LIS2DW12_PULL_UP_CONNECT;
+ break;
+ }
+ return ret;
}
/**
@@ -1338,15 +1338,15 @@
int32_t lis2dw12_pin_polarity_set(lis2dw12_ctx_t *ctx,
lis2dw12_h_lactive_t val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.h_lactive = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.h_lactive = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1360,27 +1360,27 @@
int32_t lis2dw12_pin_polarity_get(lis2dw12_ctx_t *ctx,
lis2dw12_h_lactive_t *val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
- switch (reg.h_lactive) {
- case LIS2DW12_ACTIVE_HIGH:
- *val = LIS2DW12_ACTIVE_HIGH;
- break;
- case LIS2DW12_ACTIVE_LOW:
- *val = LIS2DW12_ACTIVE_LOW;
- break;
- default:
- *val = LIS2DW12_ACTIVE_HIGH;
- break;
- }
- return ret;
+ switch (reg.h_lactive) {
+ case LIS2DW12_ACTIVE_HIGH:
+ *val = LIS2DW12_ACTIVE_HIGH;
+ break;
+ case LIS2DW12_ACTIVE_LOW:
+ *val = LIS2DW12_ACTIVE_LOW;
+ break;
+ default:
+ *val = LIS2DW12_ACTIVE_HIGH;
+ break;
+ }
+ return ret;
}
/**
- * @brief Latched/pulsed interrupt.[set]
+ * @brief Latched/pulsed interrupt.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of lir in reg CTRL3
@@ -1390,15 +1390,15 @@
int32_t lis2dw12_int_notification_set(lis2dw12_ctx_t *ctx,
lis2dw12_lir_t val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.lir = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.lir = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1412,23 +1412,23 @@
int32_t lis2dw12_int_notification_get(lis2dw12_ctx_t *ctx,
lis2dw12_lir_t *val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
- switch (reg.lir) {
- case LIS2DW12_INT_PULSED:
- *val = LIS2DW12_INT_PULSED;
- break;
- case LIS2DW12_INT_LATCHED:
- *val = LIS2DW12_INT_LATCHED;
- break;
- default:
- *val = LIS2DW12_INT_PULSED;
- break;
- }
- return ret;
+ switch (reg.lir) {
+ case LIS2DW12_INT_PULSED:
+ *val = LIS2DW12_INT_PULSED;
+ break;
+ case LIS2DW12_INT_LATCHED:
+ *val = LIS2DW12_INT_LATCHED;
+ break;
+ default:
+ *val = LIS2DW12_INT_PULSED;
+ break;
+ }
+ return ret;
}
/**
@@ -1441,15 +1441,15 @@
*/
int32_t lis2dw12_pin_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.pp_od = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.pp_od = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1462,23 +1462,23 @@
*/
int32_t lis2dw12_pin_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t *val)
{
- lis2dw12_ctrl3_t reg;
- int32_t ret;
+ lis2dw12_ctrl3_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, (uint8_t *) ®, 1);
- switch (reg.pp_od) {
- case LIS2DW12_PUSH_PULL:
- *val = LIS2DW12_PUSH_PULL;
- break;
- case LIS2DW12_OPEN_DRAIN:
- *val = LIS2DW12_OPEN_DRAIN;
- break;
- default:
- *val = LIS2DW12_PUSH_PULL;
- break;
- }
- return ret;
+ switch (reg.pp_od) {
+ case LIS2DW12_PUSH_PULL:
+ *val = LIS2DW12_PUSH_PULL;
+ break;
+ case LIS2DW12_OPEN_DRAIN:
+ *val = LIS2DW12_OPEN_DRAIN;
+ break;
+ default:
+ *val = LIS2DW12_PUSH_PULL;
+ break;
+ }
+ return ret;
}
/**
@@ -1492,25 +1492,25 @@
int32_t lis2dw12_pin_int1_route_set(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl4_int1_pad_ctrl_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
-
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- if ((val->int1_tap | val->int1_ff | val->int1_wu | val->int1_single_tap |
- val->int1_6d) != PROPERTY_DISABLE){
- reg.interrupts_enable = PROPERTY_ENABLE;
- }
- else{
- reg.interrupts_enable = PROPERTY_DISABLE;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ if ((val->int1_tap | val->int1_ff | val->int1_wu | val->int1_single_tap |
+ val->int1_6d) != PROPERTY_DISABLE) {
+ reg.interrupts_enable = PROPERTY_ENABLE;
+ } else {
+ reg.interrupts_enable = PROPERTY_DISABLE;
+ }
+
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
+ (uint8_t *) val, 1);
}
-
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
- (uint8_t*) val, 1);
- } if (ret == 0) {
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ if (ret == 0) {
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1524,14 +1524,14 @@
int32_t lis2dw12_pin_int1_route_get(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl4_int1_pad_ctrl_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
- (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
+ (uint8_t *) val, 1);
+ return ret;
}
/**
- * @brief Select the signal that need to route on int2 pad.[set]
+ * @brief Select the signal that need to route on int2 pad.[set]
*
* @param ctx read / write interface definitions
* @param val register CTRL5_INT2_PAD_CTRL.
@@ -1541,26 +1541,25 @@
int32_t lis2dw12_pin_int2_route_set(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl5_int2_pad_ctrl_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
-
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- if ((val->int2_sleep_state | val->int2_sleep_chg ) != PROPERTY_DISABLE) {
- reg.interrupts_enable = PROPERTY_ENABLE;
- }
- else{
- reg.interrupts_enable = PROPERTY_DISABLE;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ if ((val->int2_sleep_state | val->int2_sleep_chg) != PROPERTY_DISABLE) {
+ reg.interrupts_enable = PROPERTY_ENABLE;
+ } else {
+ reg.interrupts_enable = PROPERTY_DISABLE;
+ }
+
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
+ (uint8_t *) val, 1);
}
-
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
- (uint8_t*) val, 1);
- }
- if (ret == 0) {
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
-
- return ret;
+ if (ret == 0) {
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+
+ return ret;
}
/**
@@ -1574,13 +1573,13 @@
int32_t lis2dw12_pin_int2_route_get(lis2dw12_ctx_t *ctx,
lis2dw12_ctrl5_int2_pad_ctrl_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
- (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
+ (uint8_t *) val, 1);
+ return ret;
}
/**
- * @brief All interrupt signals become available on INT1 pin.[set]
+ * @brief All interrupt signals become available on INT1 pin.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of int2_on_int1 in reg CTRL_REG7
@@ -1589,15 +1588,15 @@
*/
int32_t lis2dw12_all_on_int1_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.int2_on_int1 = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.int2_on_int1 = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1610,13 +1609,13 @@
*/
int32_t lis2dw12_all_on_int1_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- *val = reg.int2_on_int1;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ *val = reg.int2_on_int1;
- return ret;
+ return ret;
}
/**
@@ -1642,15 +1641,15 @@
*/
int32_t lis2dw12_wkup_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_wake_up_ths_t reg;
- int32_t ret;
+ lis2dw12_wake_up_ths_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.wk_ths = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.wk_ths = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1663,13 +1662,13 @@
*/
int32_t lis2dw12_wkup_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_wake_up_ths_t reg;
- int32_t ret;
+ lis2dw12_wake_up_ths_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- *val = reg.wk_ths;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ *val = reg.wk_ths;
- return ret;
+ return ret;
}
/**
@@ -1682,15 +1681,15 @@
*/
int32_t lis2dw12_wkup_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_wake_up_dur_t reg;
- int32_t ret;
+ lis2dw12_wake_up_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.wake_dur = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.wake_dur = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1703,13 +1702,13 @@
*/
int32_t lis2dw12_wkup_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_wake_up_dur_t reg;
- int32_t ret;
+ lis2dw12_wake_up_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- *val = reg.wake_dur;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ *val = reg.wake_dur;
- return ret;
+ return ret;
}
/**
@@ -1723,15 +1722,15 @@
int32_t lis2dw12_wkup_feed_data_set(lis2dw12_ctx_t *ctx,
lis2dw12_usr_off_on_wu_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.usr_off_on_wu = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.usr_off_on_wu = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1745,23 +1744,23 @@
int32_t lis2dw12_wkup_feed_data_get(lis2dw12_ctx_t *ctx,
lis2dw12_usr_off_on_wu_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
- switch (reg.usr_off_on_wu) {
- case LIS2DW12_HP_FEED:
- *val = LIS2DW12_HP_FEED;
- break;
- case LIS2DW12_USER_OFFSET_FEED:
- *val = LIS2DW12_USER_OFFSET_FEED;
- break;
- default:
- *val = LIS2DW12_HP_FEED;
- break;
- }
- return ret;
+ switch (reg.usr_off_on_wu) {
+ case LIS2DW12_HP_FEED:
+ *val = LIS2DW12_HP_FEED;
+ break;
+ case LIS2DW12_USER_OFFSET_FEED:
+ *val = LIS2DW12_USER_OFFSET_FEED;
+ break;
+ default:
+ *val = LIS2DW12_HP_FEED;
+ break;
+ }
+ return ret;
}
/**
@@ -1778,7 +1777,7 @@
*/
/**
- * @brief Config activity / inactivity or
+ * @brief Config activity / inactivity or
* stationary / motion detection.[set]
*
* @param ctx read / write interface definitions
@@ -1789,28 +1788,28 @@
*/
int32_t lis2dw12_act_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t val)
{
- lis2dw12_wake_up_ths_t wake_up_ths;
- lis2dw12_wake_up_dur_t wake_up_dur;
- int32_t ret;
-
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) &wake_up_ths, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- }
- if (ret == 0) {
- wake_up_ths.sleep_on = (uint8_t) val & 0x01U;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) &wake_up_ths, 1);
- }
- if (ret == 0) {
- wake_up_dur.stationary = ((uint8_t)val & 0x02U) >> 1;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- }
-
- return ret;
+ lis2dw12_wake_up_ths_t wake_up_ths;
+ lis2dw12_wake_up_dur_t wake_up_dur;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) &wake_up_ths, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ }
+ if (ret == 0) {
+ wake_up_ths.sleep_on = (uint8_t) val & 0x01U;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) &wake_up_ths, 1);
+ }
+ if (ret == 0) {
+ wake_up_dur.stationary = ((uint8_t)val & 0x02U) >> 1;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ }
+
+ return ret;
}
/**
- * @brief Config activity / inactivity or
+ * @brief Config activity / inactivity or
* stationary / motion detection. [get]
*
* @param ctx read / write interface definitions
@@ -1820,30 +1819,30 @@
*/
int32_t lis2dw12_act_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t *val)
{
- lis2dw12_wake_up_ths_t wake_up_ths;
- lis2dw12_wake_up_dur_t wake_up_dur;;
- int32_t ret;
+ lis2dw12_wake_up_ths_t wake_up_ths;
+ lis2dw12_wake_up_dur_t wake_up_dur;;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) &wake_up_ths, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) &wake_up_ths, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
- switch ((wake_up_dur.stationary << 1) + wake_up_ths.sleep_on){
- case LIS2DW12_NO_DETECTION:
- *val = LIS2DW12_NO_DETECTION;
- break;
- case LIS2DW12_DETECT_ACT_INACT:
- *val = LIS2DW12_DETECT_ACT_INACT;
- break;
- case LIS2DW12_DETECT_STAT_MOTION:
- *val = LIS2DW12_DETECT_STAT_MOTION;
- break;
- default:
- *val = LIS2DW12_NO_DETECTION;
- break;
+ switch ((wake_up_dur.stationary << 1) + wake_up_ths.sleep_on) {
+ case LIS2DW12_NO_DETECTION:
+ *val = LIS2DW12_NO_DETECTION;
+ break;
+ case LIS2DW12_DETECT_ACT_INACT:
+ *val = LIS2DW12_DETECT_ACT_INACT;
+ break;
+ case LIS2DW12_DETECT_STAT_MOTION:
+ *val = LIS2DW12_DETECT_STAT_MOTION;
+ break;
+ default:
+ *val = LIS2DW12_NO_DETECTION;
+ break;
+ }
}
- }
- return ret;
+ return ret;
}
/**
@@ -1856,15 +1855,15 @@
*/
int32_t lis2dw12_act_sleep_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_wake_up_dur_t reg;
- int32_t ret;
+ lis2dw12_wake_up_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.sleep_dur = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.sleep_dur = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1877,13 +1876,13 @@
*/
int32_t lis2dw12_act_sleep_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_wake_up_dur_t reg;
- int32_t ret;
+ lis2dw12_wake_up_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) ®, 1);
- *val = reg.sleep_dur;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) ®, 1);
+ *val = reg.sleep_dur;
- return ret;
+ return ret;
}
/**
@@ -1909,15 +1908,15 @@
*/
int32_t lis2dw12_tap_threshold_x_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_thsx = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_thsx = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1930,13 +1929,13 @@
*/
int32_t lis2dw12_tap_threshold_x_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- *val = reg.tap_thsx;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ *val = reg.tap_thsx;
- return ret;
+ return ret;
}
/**
@@ -1949,15 +1948,15 @@
*/
int32_t lis2dw12_tap_threshold_y_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_y_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_y_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_thsy = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_thsy = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1970,13 +1969,13 @@
*/
int32_t lis2dw12_tap_threshold_y_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_y_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_y_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- *val = reg.tap_thsy;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ *val = reg.tap_thsy;
- return ret;
+ return ret;
}
/**
@@ -1990,15 +1989,15 @@
int32_t lis2dw12_tap_axis_priority_set(lis2dw12_ctx_t *ctx,
lis2dw12_tap_prior_t val)
{
- lis2dw12_tap_ths_y_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_y_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_prior = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_prior = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2012,35 +2011,35 @@
int32_t lis2dw12_tap_axis_priority_get(lis2dw12_ctx_t *ctx,
lis2dw12_tap_prior_t *val)
{
- lis2dw12_tap_ths_y_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_y_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, (uint8_t *) ®, 1);
- switch (reg.tap_prior) {
- case LIS2DW12_XYZ:
- *val = LIS2DW12_XYZ;
- break;
- case LIS2DW12_YXZ:
- *val = LIS2DW12_YXZ;
- break;
- case LIS2DW12_XZY:
- *val = LIS2DW12_XZY;
- break;
- case LIS2DW12_ZYX:
- *val = LIS2DW12_ZYX;
- break;
- case LIS2DW12_YZX:
- *val = LIS2DW12_YZX;
- break;
- case LIS2DW12_ZXY:
- *val = LIS2DW12_ZXY;
- break;
- default:
- *val = LIS2DW12_XYZ;
- break;
- }
- return ret;
+ switch (reg.tap_prior) {
+ case LIS2DW12_XYZ:
+ *val = LIS2DW12_XYZ;
+ break;
+ case LIS2DW12_YXZ:
+ *val = LIS2DW12_YXZ;
+ break;
+ case LIS2DW12_XZY:
+ *val = LIS2DW12_XZY;
+ break;
+ case LIS2DW12_ZYX:
+ *val = LIS2DW12_ZYX;
+ break;
+ case LIS2DW12_YZX:
+ *val = LIS2DW12_YZX;
+ break;
+ case LIS2DW12_ZXY:
+ *val = LIS2DW12_ZXY;
+ break;
+ default:
+ *val = LIS2DW12_XYZ;
+ break;
+ }
+ return ret;
}
/**
@@ -2053,16 +2052,16 @@
*/
int32_t lis2dw12_tap_threshold_z_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_thsz = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_thsz = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -2075,13 +2074,13 @@
*/
int32_t lis2dw12_tap_threshold_z_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- *val = reg.tap_thsz;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ *val = reg.tap_thsz;
- return ret;
+ return ret;
}
/**
@@ -2094,15 +2093,15 @@
*/
int32_t lis2dw12_tap_detection_on_z_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_z_en = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_z_en = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2115,13 +2114,13 @@
*/
int32_t lis2dw12_tap_detection_on_z_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- *val = reg.tap_z_en;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ *val = reg.tap_z_en;
- return ret;
+ return ret;
}
/**
@@ -2134,15 +2133,15 @@
*/
int32_t lis2dw12_tap_detection_on_y_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_y_en = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_y_en = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2155,13 +2154,13 @@
*/
int32_t lis2dw12_tap_detection_on_y_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- *val = reg.tap_y_en;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ *val = reg.tap_y_en;
- return ret;
+ return ret;
}
/**
@@ -2174,15 +2173,15 @@
*/
int32_t lis2dw12_tap_detection_on_x_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.tap_x_en = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.tap_x_en = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2195,13 +2194,13 @@
*/
int32_t lis2dw12_tap_detection_on_x_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_z_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_z_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z,(uint8_t*) ®, 1);
- *val = reg.tap_x_en;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, (uint8_t *) ®, 1);
+ *val = reg.tap_x_en;
- return ret;
+ return ret;
}
/**
@@ -2218,16 +2217,16 @@
*/
int32_t lis2dw12_tap_shock_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.shock = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.shock = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -2244,19 +2243,19 @@
*/
int32_t lis2dw12_tap_shock_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- *val = reg.shock;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ *val = reg.shock;
- return ret;
+ return ret;
}
/**
- * @brief Quiet time is the time after the first detected tap in which
+ * @brief Quiet time is the time after the first detected tap in which
* there must not be any overthreshold event.
- * The default value of these bits is 00b which corresponds
+ * The default value of these bits is 00b which corresponds
* to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different
* value, 1LSB corresponds to 4*ODR_XL time.[set]
*
@@ -2267,21 +2266,21 @@
*/
int32_t lis2dw12_tap_quiet_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.quiet = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.quiet = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief Quiet time is the time after the first detected tap in which
+ * @brief Quiet time is the time after the first detected tap in which
* there must not be any overthreshold event.
- * The default value of these bits is 00b which corresponds
+ * The default value of these bits is 00b which corresponds
* to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different
* value, 1LSB corresponds to 4*ODR_XL time.[get]
*
@@ -2292,21 +2291,21 @@
*/
int32_t lis2dw12_tap_quiet_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- *val = reg.quiet;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ *val = reg.quiet;
- return ret;
+ return ret;
}
/**
- * @brief When double tap recognition is enabled, this register expresses
- * the maximum time between two consecutive detected taps to
+ * @brief When double tap recognition is enabled, this register expresses
+ * the maximum time between two consecutive detected taps to
* determine a double tap event.
- * The default value of these bits is 0000b which corresponds
- * to 16*ODR_XL time. If the DUR[3:0] bits are set to a different
+ * The default value of these bits is 0000b which corresponds
+ * to 16*ODR_XL time. If the DUR[3:0] bits are set to a different
* value, 1LSB corresponds to 32*ODR_XL time.[set]
*
* @param ctx read / write interface definitions
@@ -2316,23 +2315,23 @@
*/
int32_t lis2dw12_tap_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.latency = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.latency = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
- * @brief When double tap recognition is enabled, this register expresses
- * the maximum time between two consecutive detected taps to
+ * @brief When double tap recognition is enabled, this register expresses
+ * the maximum time between two consecutive detected taps to
* determine a double tap event.
- * The default value of these bits is 0000b which corresponds
- * to 16*ODR_XL time. If the DUR[3:0] bits are set to a different
+ * The default value of these bits is 0000b which corresponds
+ * to 16*ODR_XL time. If the DUR[3:0] bits are set to a different
* value, 1LSB corresponds to 32*ODR_XL time.[get]
*
* @param ctx read / write interface definitions
@@ -2342,13 +2341,13 @@
*/
int32_t lis2dw12_tap_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_int_dur_t reg;
- int32_t ret;
+ lis2dw12_int_dur_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR,(uint8_t*) ®, 1);
- *val = reg.latency;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, (uint8_t *) ®, 1);
+ *val = reg.latency;
- return ret;
+ return ret;
}
/**
@@ -2362,15 +2361,15 @@
int32_t lis2dw12_tap_mode_set(lis2dw12_ctx_t *ctx,
lis2dw12_single_double_tap_t val)
{
- lis2dw12_wake_up_ths_t reg;
- int32_t ret;
+ lis2dw12_wake_up_ths_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.single_double_tap = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.single_double_tap = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2384,39 +2383,39 @@
int32_t lis2dw12_tap_mode_get(lis2dw12_ctx_t *ctx,
lis2dw12_single_double_tap_t *val)
{
- lis2dw12_wake_up_ths_t reg;
- int32_t ret;
+ lis2dw12_wake_up_ths_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, (uint8_t *) ®, 1);
- switch (reg.single_double_tap) {
- case LIS2DW12_ONLY_SINGLE:
- *val = LIS2DW12_ONLY_SINGLE;
- break;
- case LIS2DW12_BOTH_SINGLE_DOUBLE:
- *val = LIS2DW12_BOTH_SINGLE_DOUBLE;
- break;
- default:
- *val = LIS2DW12_ONLY_SINGLE;
- break;
- }
+ switch (reg.single_double_tap) {
+ case LIS2DW12_ONLY_SINGLE:
+ *val = LIS2DW12_ONLY_SINGLE;
+ break;
+ case LIS2DW12_BOTH_SINGLE_DOUBLE:
+ *val = LIS2DW12_BOTH_SINGLE_DOUBLE;
+ break;
+ default:
+ *val = LIS2DW12_ONLY_SINGLE;
+ break;
+ }
- return ret;
+ return ret;
}
/**
* @brief Read the tap / double tap source register.[get]
*
* @param ctx read / write interface definitions
- * @param lis2dw12_tap_src: union of registers from TAP_SRC to
+ * @param lis2dw12_tap_src: union of registers from TAP_SRC to
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lis2dw12_tap_src_get(lis2dw12_ctx_t *ctx, lis2dw12_tap_src_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_SRC, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_SRC, (uint8_t *) val, 1);
+ return ret;
}
/**
@@ -2433,7 +2432,7 @@
*/
/**
- * @brief Threshold for 4D/6D function.[set]
+ * @brief Threshold for 4D/6D function.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of 6d_ths in reg TAP_THS_X
@@ -2442,15 +2441,15 @@
*/
int32_t lis2dw12_6d_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg._6d_ths = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg._6d_ths = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2463,13 +2462,13 @@
*/
int32_t lis2dw12_6d_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- *val = reg._6d_ths;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ *val = reg._6d_ths;
- return ret;
+ return ret;
}
/**
@@ -2482,16 +2481,16 @@
*/
int32_t lis2dw12_4d_mode_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg._4d_en = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg._4d_en = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -2504,13 +2503,13 @@
*/
int32_t lis2dw12_4d_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_tap_ths_x_t reg;
- int32_t ret;
+ lis2dw12_tap_ths_x_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X,(uint8_t*) ®, 1);
- *val = reg._4d_en;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, (uint8_t *) ®, 1);
+ *val = reg._4d_en;
- return ret;
+ return ret;
}
/**
@@ -2523,9 +2522,9 @@
*/
int32_t lis2dw12_6d_src_get(lis2dw12_ctx_t *ctx, lis2dw12_sixd_src_t *val)
{
- int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_SIXD_SRC, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_SIXD_SRC, (uint8_t *) val, 1);
+ return ret;
}
/**
* @brief Data sent to 6D interrupt function.[set]
@@ -2538,15 +2537,15 @@
int32_t lis2dw12_6d_feed_data_set(lis2dw12_ctx_t *ctx,
lis2dw12_lpass_on6d_t val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.lpass_on6d = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.lpass_on6d = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2560,23 +2559,23 @@
int32_t lis2dw12_6d_feed_data_get(lis2dw12_ctx_t *ctx,
lis2dw12_lpass_on6d_t *val)
{
- lis2dw12_ctrl_reg7_t reg;
- int32_t ret;
+ lis2dw12_ctrl_reg7_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, (uint8_t *) ®, 1);
- switch (reg.lpass_on6d) {
- case LIS2DW12_ODR_DIV_2_FEED:
- *val = LIS2DW12_ODR_DIV_2_FEED;
- break;
- case LIS2DW12_LPF2_FEED:
- *val = LIS2DW12_LPF2_FEED;
- break;
- default:
- *val = LIS2DW12_ODR_DIV_2_FEED;
- break;
- }
- return ret;
+ switch (reg.lpass_on6d) {
+ case LIS2DW12_ODR_DIV_2_FEED:
+ *val = LIS2DW12_ODR_DIV_2_FEED;
+ break;
+ case LIS2DW12_LPF2_FEED:
+ *val = LIS2DW12_LPF2_FEED;
+ break;
+ default:
+ *val = LIS2DW12_ODR_DIV_2_FEED;
+ break;
+ }
+ return ret;
}
/**
@@ -2603,24 +2602,24 @@
*/
int32_t lis2dw12_ff_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_wake_up_dur_t wake_up_dur;
- lis2dw12_free_fall_t free_fall;
- int32_t ret;
+ lis2dw12_wake_up_dur_t wake_up_dur;
+ lis2dw12_free_fall_t free_fall;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) &free_fall, 1);
- }
- if(ret == 0) {
- wake_up_dur.ff_dur = ( (uint8_t) val & 0x20U) >> 5;
- free_fall.ff_dur = (uint8_t) val & 0x1FU;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- }
- if(ret == 0) {
- ret = lis2dw12_write_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) &free_fall, 1);
- }
-
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) &free_fall, 1);
+ }
+ if (ret == 0) {
+ wake_up_dur.ff_dur = ((uint8_t) val & 0x20U) >> 5;
+ free_fall.ff_dur = (uint8_t) val & 0x1FU;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ }
+ if (ret == 0) {
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) &free_fall, 1);
+ }
+
+ return ret;
}
/**
@@ -2628,22 +2627,22 @@
*
* @param ctx read / write interface definitions
* @param val change the values of ff_dur in
- * reg WAKE_UP_DUR /F REE_FALL
+ * reg WAKE_UP_DUR /F REE_FALL
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
int32_t lis2dw12_ff_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_wake_up_dur_t wake_up_dur;
- lis2dw12_free_fall_t free_fall;
- int32_t ret;
-
- ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR,(uint8_t*) &wake_up_dur, 1);
- if (ret == 0) {
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) &free_fall, 1);
- *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
- }
- return ret;
+ lis2dw12_wake_up_dur_t wake_up_dur;
+ lis2dw12_free_fall_t free_fall;
+ int32_t ret;
+
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, (uint8_t *) &wake_up_dur, 1);
+ if (ret == 0) {
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) &free_fall, 1);
+ *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
+ }
+ return ret;
}
/**
@@ -2656,16 +2655,16 @@
*/
int32_t lis2dw12_ff_threshold_set(lis2dw12_ctx_t *ctx, lis2dw12_ff_ths_t val)
{
- lis2dw12_free_fall_t reg;
- int32_t ret;
+ lis2dw12_free_fall_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.ff_ths = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.ff_ths = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -2679,41 +2678,41 @@
int32_t lis2dw12_ff_threshold_get(lis2dw12_ctx_t *ctx,
lis2dw12_ff_ths_t *val)
{
- lis2dw12_free_fall_t reg;
- int32_t ret;
+ lis2dw12_free_fall_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, (uint8_t *) ®, 1);
- switch (reg.ff_ths) {
- case LIS2DW12_FF_TSH_5LSb_FS2g:
- *val = LIS2DW12_FF_TSH_5LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_7LSb_FS2g:
- *val = LIS2DW12_FF_TSH_7LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_8LSb_FS2g:
- *val = LIS2DW12_FF_TSH_8LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_10LSb_FS2g:
- *val = LIS2DW12_FF_TSH_10LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_11LSb_FS2g:
- *val = LIS2DW12_FF_TSH_11LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_13LSb_FS2g:
- *val = LIS2DW12_FF_TSH_13LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_15LSb_FS2g:
- *val = LIS2DW12_FF_TSH_15LSb_FS2g;
- break;
- case LIS2DW12_FF_TSH_16LSb_FS2g:
- *val = LIS2DW12_FF_TSH_16LSb_FS2g;
- break;
- default:
- *val = LIS2DW12_FF_TSH_5LSb_FS2g;
- break;
- }
- return ret;
+ switch (reg.ff_ths) {
+ case LIS2DW12_FF_TSH_5LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_5LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_7LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_7LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_8LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_8LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_10LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_10LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_11LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_11LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_13LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_13LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_15LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_15LSb_FS2g;
+ break;
+ case LIS2DW12_FF_TSH_16LSb_FS2g:
+ *val = LIS2DW12_FF_TSH_16LSb_FS2g;
+ break;
+ default:
+ *val = LIS2DW12_FF_TSH_5LSb_FS2g;
+ break;
+ }
+ return ret;
}
/**
@@ -2738,20 +2737,20 @@
*/
int32_t lis2dw12_fifo_watermark_set(lis2dw12_ctx_t *ctx, uint8_t val)
{
- lis2dw12_fifo_ctrl_t reg;
- int32_t ret;
+ lis2dw12_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.fth = val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- }
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.fth = val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
- * @brief FIFO watermark level selection.[get]
+ * @brief FIFO watermark level selection.[get]
*
* @param ctx read / write interface definitions
* @param val change the values of fth in reg FIFO_CTRL
@@ -2760,13 +2759,13 @@
*/
int32_t lis2dw12_fifo_watermark_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_fifo_ctrl_t reg;
- int32_t ret;
+ lis2dw12_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- *val = reg.fth;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ *val = reg.fth;
- return ret;
+ return ret;
}
/**
@@ -2779,15 +2778,15 @@
*/
int32_t lis2dw12_fifo_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t val)
{
- lis2dw12_fifo_ctrl_t reg;
- int32_t ret;
+ lis2dw12_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- if (ret == 0) {
- reg.fmode = (uint8_t) val;
- ret = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
- }
- return ret;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.fmode = (uint8_t) val;
+ ret = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -2800,32 +2799,32 @@
*/
int32_t lis2dw12_fifo_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t *val)
{
- lis2dw12_fifo_ctrl_t reg;
- int32_t ret;
+ lis2dw12_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL,(uint8_t*) ®, 1);
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, (uint8_t *) ®, 1);
- switch (reg.fmode) {
- case LIS2DW12_BYPASS_MODE:
- *val = LIS2DW12_BYPASS_MODE;
- break;
- case LIS2DW12_FIFO_MODE:
- *val = LIS2DW12_FIFO_MODE;
- break;
- case LIS2DW12_STREAM_TO_FIFO_MODE:
- *val = LIS2DW12_STREAM_TO_FIFO_MODE;
- break;
- case LIS2DW12_BYPASS_TO_STREAM_MODE:
- *val = LIS2DW12_BYPASS_TO_STREAM_MODE;
- break;
- case LIS2DW12_STREAM_MODE:
- *val = LIS2DW12_STREAM_MODE;
- break;
- default:
- *val = LIS2DW12_BYPASS_MODE;
- break;
- }
- return ret;
+ switch (reg.fmode) {
+ case LIS2DW12_BYPASS_MODE:
+ *val = LIS2DW12_BYPASS_MODE;
+ break;
+ case LIS2DW12_FIFO_MODE:
+ *val = LIS2DW12_FIFO_MODE;
+ break;
+ case LIS2DW12_STREAM_TO_FIFO_MODE:
+ *val = LIS2DW12_STREAM_TO_FIFO_MODE;
+ break;
+ case LIS2DW12_BYPASS_TO_STREAM_MODE:
+ *val = LIS2DW12_BYPASS_TO_STREAM_MODE;
+ break;
+ case LIS2DW12_STREAM_MODE:
+ *val = LIS2DW12_STREAM_MODE;
+ break;
+ default:
+ *val = LIS2DW12_BYPASS_MODE;
+ break;
+ }
+ return ret;
}
/**
@@ -2838,13 +2837,13 @@
*/
int32_t lis2dw12_fifo_data_level_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_fifo_samples_t reg;
- int32_t ret;
+ lis2dw12_fifo_samples_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES,(uint8_t*) ®, 1);
- *val = reg.diff;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES, (uint8_t *) ®, 1);
+ *val = reg.diff;
- return ret;
+ return ret;
}
/**
* @brief FIFO overrun status.[get]
@@ -2856,13 +2855,13 @@
*/
int32_t lis2dw12_fifo_ovr_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_fifo_samples_t reg;
- int32_t ret;
+ lis2dw12_fifo_samples_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES,(uint8_t*) ®, 1);
- *val = reg.fifo_ovr;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES, (uint8_t *) ®, 1);
+ *val = reg.fifo_ovr;
- return ret;
+ return ret;
}
/**
* @brief FIFO threshold status flag.[get]
@@ -2874,17 +2873,17 @@
*/
int32_t lis2dw12_fifo_wtm_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val)
{
- lis2dw12_fifo_samples_t reg;
- int32_t ret;
+ lis2dw12_fifo_samples_t reg;
+ int32_t ret;
- ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES,(uint8_t*) ®, 1);
- *val = reg.fifo_fth;
+ ret = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES, (uint8_t *) ®, 1);
+ *val = reg.fifo_fth;
- return ret;
+ return ret;
}
/**
* @}
- *
+ *
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/