Diff: BufferedSerial/BufferedSerial.cpp

Revision:

28:d993f3bbe302

Parent:

6:2b68f85a984a

Child:

34:4bda9af9a0cd

--- a/BufferedSerial/BufferedSerial.cpp	Sun Jun 28 15:42:26 2015 +0000
+++ b/BufferedSerial/BufferedSerial.cpp	Wed Jul 01 14:57:24 2015 +0000
@@ -132,7 +132,7 @@
 void BufferedSerial::txIrq(void)
 {
     // see if there is room in the hardware fifo and if something is in the software fifo
-    while(serial_writable(&_serial) && !_cts) {
+    while(serial_writable(&_serial) && checkCTS()) {
         if(_txbuf.available()) {
             serial_putc(&_serial, (int)_txbuf.get());
         } else {
@@ -148,7 +148,7 @@
 void BufferedSerial::prime(void)
 {
     // if already busy then the irq will pick this up
-    if(serial_writable(&_serial) && !_cts) {
+    if(serial_writable(&_serial) && checkCTS()) {
         SERIAL_BASE::attach(NULL, SERIAL_BASE::TxIrq);    // make sure not to cause contention in the irq
         BufferedSerial::txIrq();                // only write to hardware in one place
         SERIAL_BASE::attach(this, &BufferedSerial::txIrq, SERIAL_BASE::TxIrq);
@@ -157,8 +157,28 @@
     return;
 }
 
+bool BufferedSerial::checkCTS(void)
+{
+    static bool _send_flg=true;
+    if(_send_flg) {
+        _send_flg=!_cts;
+    } else {
+        if(_cts) {
+            _cts_timer.reset();
+        } else {
+            if(_cts_timer.read_ms()>XBEE_WAIT_TIME) {
+                _cts_timer.stop();
+                _send_flg=true;
+            }
+        }
+    }
+    return _send_flg;
+}
+
 void BufferedSerial::ctsInterrupt(void)
 {
+    _cts_timer.reset();
+    _cts_timer.start();
     BufferedSerial::prime();
     return;
 }