This is a work in progress for an NRF2401P
Dependencies: mbed
Fork of NRF2401P by
Diff: NRF2401P.cpp
- Revision:
- 2:ca0a3c0bba70
- Parent:
- 1:ff53b1ac3bad
- Child:
- 3:afe8d307b5c3
--- a/NRF2401P.cpp Thu Jun 11 17:00:18 2015 +0000 +++ b/NRF2401P.cpp Thu Jun 11 23:19:52 2015 +0000 @@ -1,6 +1,3 @@ -#include "mbed.h" -#include "NRF2401P.h" - /** *@section DESCRIPTION * mbed NRF2401+ Library @@ -26,7 +23,9 @@ * THE SOFTWARE. * @file "NRF2401P.cpp" */ - +#include "mbed.h" +#include "NRF2401P.h" +#include "nRF24l01.h" NRF2401P::NRF2401P ( PinName mosi, PinName miso, PinName sclk, PinName _csn, PinName _ce ) : @@ -52,7 +51,7 @@ void NRF2401P::log (char *msg) { if(debug) { - printf("<%s \t %s>\n\r",statusString(), msg); + printf("\t <%s \t %s>\n\r",statusString(), msg); wait(0.01); }; } @@ -74,24 +73,35 @@ } /** +* start here to configure the basics of the NRF +*/ + +void NRF2401P::start() +{ + writeReg( CONFIG, 0x0c ); // set 16 bit crc + setTxRetry(0x01,0x0f); // 500 uS, 15 retries + setRadio(0,0x03); // 1MB/S 0dB + setDynamicPayload(); + setChannel(76); // should be clear? + setAddressWidth(5); + flushRx(); + flushTx(); + setPwrUp(); + setTxMode(); // just make sure no spurious reads.... + +} +/** * Sets up a reciever using shockburst and dynamic payload. Uses pipe 1 * defaults to 5 bytes */ -void NRF2401P::quickRxSetup(int channel,long long addr) +void NRF2401P::quickRxSetup(int channel,long long addrRx) { - setRadio(0,3); + start(); setChannel(channel); + setRxAddress(addrRx,1); setRxMode(); - - setAddressWidth(3); - setRxAddress(addr,0); - setDynamicPayload(); - writeReg(0x02,0x03); // EN_RXADDR for P1 - writeReg(0x01,0x03); // EN_AA regi for P1 - setPwrUp(); - ce=1; - wait (0.1f); + wait (0.001f); } /** * Sets up for receive of a message to address 0XA0A0A0 @@ -118,23 +128,26 @@ } /** +* Sets the number and the timimg of TX retries +*/ + +void NRF2401P::setTxRetry(char delay, char numTries) +{ + char val = (delay&0xf)<<4 | (numTries&0xf); + writeReg (SETUP_RETR, val); +} + + +/** * Sets up a transmitter using shockburst and dynamic payload. Uses pipe 1 * defaults to 5 bytes */ void NRF2401P::quickTxSetup(int channel,long long addr) { - setRadio(0,3); + start(); setChannel(channel); - + setTxAddress(addr); setTxMode(); - setPwrUp(); - setDynamicPayload(); - setAddressWidth(3); - setTxAddress(addr); - writeReg(0x04,0x2f); // ARD 750 uS ARC 15 - writeReg(0x02,0x03); // EN_RXADDR for P1 and P0 - setPwrUp(); - ce=1; wait (0.0016f); // wait for pll to settle } @@ -199,8 +212,8 @@ */ char NRF2401P::transmitData( char *data, char width ) { - clearStatus(); - ce = 1; + //clearStatus(); + //ce = 1; csn = 0; char address = 0XA0; int i; @@ -210,8 +223,10 @@ spi->write( data[ i ] ); } csn = 1; - sprintf(logMsg, " Transmit data %d bytes to %02x (%02x) = %02x", width, address, status, data ); + if (debug){ + sprintf(logMsg, " Transmit data %d bytes to %02x (%02x) = %10s", width, address, status, *data ); log(logMsg); + } return status; } @@ -223,17 +238,20 @@ { ce = 1; csn = 0; - writeReg(0x1d,0x06); // enable payload with ack - char address = 0XA8| (pipe&0x07); + //writeReg(0x1d,0x06); // enable payload with ack + char address = W_ACK_PAYLOAD | (pipe&0x07); int i; // set up for writing + csn = 0; status = spi->write( address ); for ( i = 0; i <width; i++ ) { spi->write( data[ i ] ); } csn = 1; - sprintf(logMsg, " acknowledge data %d bytes to %02x (%02x) = %02x", width, address, status, *data ); + if (debug){ + sprintf(logMsg, " acknowledge data %d bytes to %02x (%02x) = %c", width, address, status, *data ); log(logMsg); + } return status; } @@ -270,8 +288,10 @@ spi->write( data[ i ] ); } csn = 1; - sprintf(logMsg, " register write %d bytes to %02x (%02x) = %02x %02x %02x", width, address, status, data[0], data[1], data[2] ); - log(logMsg); + if (debug) { + sprintf(logMsg, " register write %d bytes to %02x (%02x) = %02x %02x %02x", width, address, status, data[0], data[1], data[2] ); + log(logMsg); + } return status; } /** @@ -293,9 +313,11 @@ */ bool NRF2401P::clearStatus() { - status = writeReg(0x07,0x70); - sprintf(logMsg, "Clear status (%02x)", status ); - log(logMsg); + status = writeReg(STATUS,0x70); + if (debug) { + sprintf(logMsg, "Clear status (%02x)", status ); + log(logMsg); + } } /** * flushes TX FIFO and resets status flags @@ -303,11 +325,13 @@ bool NRF2401P::flushTx() { csn = 0; - status = spi->write( 0xE1 ); + status = spi->write( FLUSH_TX ); csn = 1; clearStatus(); - sprintf(logMsg, "Flush TX FIFO (%02x)", status ); - log(logMsg); + if (debug) { + sprintf(logMsg, "Flush TX FIFO (%02x)", status ); + log(logMsg); + } return; } @@ -317,11 +341,13 @@ bool NRF2401P::flushRx() { csn = 0; - status = spi->write( 0xE2 ); - status = spi->write( 0xFF ); //Update status + status = spi->write( FLUSH_RX ); csn = 1; - sprintf(logMsg, "Flush RX FIFO (%02x)", status ); - log(logMsg); + clearStatus(); + if (debug) { + sprintf(logMsg, "Flush RX FIFO (%02x)", status ); + log(logMsg); + } } /** * Sets PRIM_RX = 0; @@ -330,17 +356,22 @@ { char data; char bit; - sprintf(logMsg, "Set Tx Mode"); - log(logMsg); - readReg( 0x00, &data ); + if (debug) { + sprintf(logMsg, "Set Tx Mode"); + log(logMsg); + } + readReg( CONFIG, &data ); data &= ~( 1 << 0 ); - writeReg( 0x00, data ); + flushTx(); + flushRx(); + writeReg( CONFIG, data ); + writeReg( RX_ADDR_P0, txAdd, addressWidth ); // reset p0 + writeReg(EN_RXADDR,0x01); // enable pipe 0 for reading // check readReg( 0x00, &data ); bit = ( data >> 0 ) & 1; + ce=1; - clearStatus(); - flushTx(); wait(0.003); return ( bit == 0 ); } @@ -362,6 +393,7 @@ */ char NRF2401P::setTxAddress( char *address ) { + memcpy (txAdd,address, addressWidth); writeReg( 0x0A, address, addressWidth ); //Write to RX_ADDR_P0 return writeReg( 0x10, address, addressWidth ); //Write to TX_ADDR @@ -385,10 +417,18 @@ /** * Sets the address, uses addess width set (either 3,4 or 5) +* Enables pipe for receiving; */ char NRF2401P::setRxAddress( char *address, char pipe ) { - log ("Set Rx Address"); + if(debug) { + log ("Set Rx Address"); + } + if (pipe>5) return 0xff; + if (pipe ==0) { + memcpy (pipe0Add,address, addressWidth); + } + char reg = 0x0A + pipe; switch ( pipe ) { case ( 0 ) : @@ -405,7 +445,9 @@ } } - // writeReg( 0x0A, address, addressWidth ); //Write to RX_ADDR_P0 + readReg(EN_RXADDR,®); + reg |= (1<<pipe); + writeReg( EN_RXADDR,reg ); //Enable the pipe return status; } @@ -510,14 +552,15 @@ /** * Sets all the receive pipes to dynamic payload length */ -char NRF2401P::setDynamicPayload() +void NRF2401P::setDynamicPayload() { dynamic = true; - writeReg (0x1D,0x06); - writeReg(0x01,0x3f); // EN_AA regi for P1 and P0 - return(writeReg(0x1C, 0x1F)); + writeReg(FEATURE,0x07); // Enable Dyn payload, Payload with Ack and w_tx_noack command + writeReg(EN_AA,0x3f); // EN_AA regi for P1 and P0 + writeReg(DYNPD, 0x1F); } + /** * Sets PWR_UP = 1; */ @@ -526,15 +569,22 @@ char data; char bit; ce=1; - readReg( 0x00, &data ); + readReg( CONFIG, &data ); + if ((data>>1) &0x01) { + return true; // Already powered up + }; data |= ( 0x02 ); writeReg( 0x00, data ); // check readReg( 0x00, &data ); bit = ( data >> 1 ) & 1; - sprintf(logMsg, "Set PWR_UP to %x", bit); - log(logMsg); + wait(0.005); // wait 5ms + if(debug) { + sprintf(logMsg, "Set PWR_UP to %x", bit); + log(logMsg); + } + return ( bit == 1 ); } /** @@ -546,15 +596,23 @@ char bit; ce=1; readReg( 0x00, &data ); - data |= ( 0x03 ); + data |= ( 0x01 ); + writeReg( 0x00, data ); + if (pipe0Add[0]|pipe0Add[1]|pipe0Add[2]|pipe0Add[3]|pipe0Add[4] >0){ + setRxAddress(pipe0Add,0); + } // check readReg( 0x00, &data ); bit = ( data >> 0 ) & 1; - sprintf(logMsg, " set PRIM_RX to %x", bit); - log(logMsg); - clearStatus(); + + wait (0.001); flushRx(); + flushTx(); + if (debug) { + sprintf(logMsg, " set PRIM_RX to %x", bit); + log(logMsg); + } return ( bit == 1 ); } /**