Future Electronics / Mbed OS lorawan-neoiso-lab

Lab exercise code for FAE Summit 09/2019.

neo_iso_drv.h@59:4628ef4b0d52, 2019-09-18 (annotated)

Committer:
lru
Date:
Wed Sep 18 18:52:39 2019 +0000
Revision:
59:4628ef4b0d52
Parent:
58:cf54c181a632 
Fixed lorawan configuration.; Removed leftover DummySensor file.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lru 58:cf54c181a632 1 /*
lru 58:cf54c181a632 2 * Mbed OS device driver for Semtech TS13401 Neo-Iso SSR driver.
lru 58:cf54c181a632 3 *
lru 58:cf54c181a632 4 * Copyright (c) 2019 Future Electronics
lru 58:cf54c181a632 5 *
lru 58:cf54c181a632 6 * Licensed under the Apache License, Version 2.0 (the "License");
lru 58:cf54c181a632 7 * you may not use this file except in compliance with the License.
lru 58:cf54c181a632 8 * You may obtain a copy of the License at
lru 58:cf54c181a632 9 *
lru 58:cf54c181a632 10 * http://www.apache.org/licenses/LICENSE-2.0
lru 58:cf54c181a632 11 *
lru 58:cf54c181a632 12 * Unless required by applicable law or agreed to in writing, software
lru 58:cf54c181a632 13 * distributed under the License is distributed on an "AS IS" BASIS,
lru 58:cf54c181a632 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
lru 58:cf54c181a632 15 * See the License for the specific language governing permissions and
lru 58:cf54c181a632 16 * limitations under the License.
lru 58:cf54c181a632 17 */
lru 58:cf54c181a632 18 #ifndef NEO_ISO_DRV_H__
lru 58:cf54c181a632 19 #define NEO_ISO_DRV_H__
lru 58:cf54c181a632 20
lru 58:cf54c181a632 21 #include "mbed.h"
lru 58:cf54c181a632 22
lru 58:cf54c181a632 23 namespace neoiso {
lru 58:cf54c181a632 24
lru 58:cf54c181a632 25 class NeoIso {
lru 58:cf54c181a632 26 public:
lru 58:cf54c181a632 27 typedef enum {
lru 58:cf54c181a632 28 COMMAND_NO_OPERATION = 0,
lru 58:cf54c181a632 29 COMMAND_OFF_IMMEDIATE = 1,
lru 58:cf54c181a632 30 COMMAND_OFF_ZERO_CROSSING = 2,
lru 58:cf54c181a632 31 COMMAND_ON_IMMEDIATE = 3,
lru 58:cf54c181a632 32 COMMAND_ON_ZERO_CROSSING = 4,
lru 58:cf54c181a632 33 COMMAND_ON_IMMEDIATE_WITH_DITHERING = 5,
lru 58:cf54c181a632 34 COMMAND_ON_ZERO_CROSSING_WITH_DITHERING = 6,
lru 58:cf54c181a632 35 COMMAND_HEARTBEAT = 7,
lru 58:cf54c181a632 36 COMMAND_SET_POWER_TRANSFER_MODE = 8,
lru 58:cf54c181a632 37 COMMAND_CANCEL_POWER_TRANSFER_MODE = 9,
lru 58:cf54c181a632 38 COMMAND_SET_INRUSH_MODE = 10,
lru 58:cf54c181a632 39 COMMAND_CANCEL_INRUSH_MODE = 11,
lru 58:cf54c181a632 40 COMMAND_START_A_LOAD_CURRENT_MEASURMENT = 12,
lru 58:cf54c181a632 41 COMMAND_START_A_SYSTEM_VOLTAGE_MEASURMENT = 13,
lru 58:cf54c181a632 42 COMMAND_START_A_SWITCH_TEMPERATURE_MEASURMENT = 14,
lru 58:cf54c181a632 43 COMMAND_POOL_STATE = 15
lru 58:cf54c181a632 44 } command_t;
lru 58:cf54c181a632 45
lru 58:cf54c181a632 46 typedef enum {
lru 58:cf54c181a632 47 PAGE_COMMAND = 6,
lru 58:cf54c181a632 48 PAGE_CONFIGURATION = 7
lru 58:cf54c181a632 49 } page_t;
lru 58:cf54c181a632 50
lru 58:cf54c181a632 51
lru 58:cf54c181a632 52 public:
lru 58:cf54c181a632 53 NeoIso(PinName clk_pin, PinName data_pin, uint8_t address);
lru 58:cf54c181a632 54
lru 58:cf54c181a632 55 ~NeoIso();
lru 58:cf54c181a632 56
lru 58:cf54c181a632 57 int send_command(page_t page, command_t command);
lru 58:cf54c181a632 58 int get_status(uint8_t &status);
lru 58:cf54c181a632 59
lru 58:cf54c181a632 60 int set_output(bool on);
lru 58:cf54c181a632 61
lru 58:cf54c181a632 62 NeoIso& operator=(int value)
lru 58:cf54c181a632 63 {
lru 58:cf54c181a632 64 set_output(value != 0);
lru 58:cf54c181a632 65 return *this;
lru 58:cf54c181a632 66 }
lru 58:cf54c181a632 67
lru 58:cf54c181a632 68 operator int()
lru 58:cf54c181a632 69 {
lru 58:cf54c181a632 70 return _on;
lru 58:cf54c181a632 71 }
lru 58:cf54c181a632 72
lru 58:cf54c181a632 73 protected:
lru 58:cf54c181a632 74 void _clear_buffer();
lru 58:cf54c181a632 75 void _buffer_put_bit(bool bit);
lru 58:cf54c181a632 76 int _send_buffer();
lru 58:cf54c181a632 77
lru 58:cf54c181a632 78 protected:
lru 58:cf54c181a632 79 static const size_t RESET_LENGTH = 3;
lru 58:cf54c181a632 80 static const size_t MAX_COMMAND_LENGTH = 34;
lru 58:cf54c181a632 81
lru 58:cf54c181a632 82 typedef enum {
lru 58:cf54c181a632 83 BIT_RESET = 0,
lru 58:cf54c181a632 84 BIT_ZERO = 0xA000,
lru 58:cf54c181a632 85 BIT_ONE = 0xAA00,
lru 58:cf54c181a632 86 } bit_value_t;
lru 58:cf54c181a632 87
lru 58:cf54c181a632 88 mbed::SPI _spi;
lru 58:cf54c181a632 89 uint8_t _address;
lru 58:cf54c181a632 90 uint8_t _on;
lru 58:cf54c181a632 91 uint32_t _buffer_index;
lru 58:cf54c181a632 92 uint16_t _tx_buffer[MAX_COMMAND_LENGTH];
lru 58:cf54c181a632 93 uint16_t _rx_buffer[MAX_COMMAND_LENGTH];
lru 58:cf54c181a632 94 };
lru 58:cf54c181a632 95
lru 58:cf54c181a632 96 }
lru 58:cf54c181a632 97
lru 58:cf54c181a632 98 #endif // NEO_ISO_DRV_H__