Freescale_Cachan
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Programme_course_30Tr
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Programme_course_vir_am_2
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SPI_MemMap Struct Reference
[SPI]
SPI - Peripheral register structure. More...
#include <MKL25Z4.h>
Data Fields | |
| uint8_t | C1 |
| SPI control register 1, offset: 0x0. | |
| uint8_t | C2 |
| SPI control register 2, offset: 0x1. | |
| uint8_t | BR |
| SPI baud rate register, offset: 0x2. | |
| uint8_t | S |
| SPI status register, offset: 0x3. | |
| uint8_t | D |
| SPI data register, offset: 0x5. | |
| uint8_t | M |
| SPI match register, offset: 0x7. | |
Detailed Description
SPI - Peripheral register structure.
Definition at line 5391 of file MKL25Z4.h.
Field Documentation
Generated on Tue Jul 12 2022 16:20:12 by
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