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Programme_course_30Tr
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PIT_MemMap Struct Reference
[PIT]
PIT - Peripheral register structure. More...
#include <MKL25Z4.h>
Data Fields | |
| uint32_t | MCR |
| PIT Module Control Register, offset: 0x0. | |
| uint32_t | LTMR64H |
| PIT Upper Lifetime Timer Register, offset: 0xE0. | |
| uint32_t | LTMR64L |
| PIT Lower Lifetime Timer Register, offset: 0xE4. | |
| uint32_t | LDVAL |
| Timer Load Value Register, array offset: 0x100, array step: 0x10. | |
| uint32_t | CVAL |
| Current Timer Value Register, array offset: 0x104, array step: 0x10. | |
| uint32_t | TCTRL |
| Timer Control Register, array offset: 0x108, array step: 0x10. | |
| uint32_t | TFLG |
| Timer Flag Register, array offset: 0x10C, array step: 0x10. | |
Detailed Description
PIT - Peripheral register structure.
Definition at line 3723 of file MKL25Z4.h.
Field Documentation
| uint32_t CVAL |
| uint32_t LDVAL |
| uint32_t LTMR64H |
| uint32_t LTMR64L |
| uint32_t TCTRL |
Generated on Tue Jul 12 2022 16:20:12 by
1.7.2