Freescale_Cachan / Mbed 2 deprecated Programme_course_30Tr

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Dependencies:   MMA8451Q mbed

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NVIC_MemMap Struct Reference
Data Fields

NVIC_MemMap Struct Reference
[NVIC]

NVIC - Peripheral register structure. More...

#include <MKL25Z4.h>

Data Fields

uint32_t ISER
 Interrupt Set Enable Register, offset: 0x0.
uint32_t ICER
 Interrupt Clear Enable Register, offset: 0x80.
uint32_t ISPR
 Interrupt Set Pending Register, offset: 0x100.
uint32_t ICPR
 Interrupt Clear Pending Register, offset: 0x180.
uint32_t IP [8]
 Interrupt Priority Register n, array offset: 0x300, array step: 0x4.

Detailed Description

NVIC - Peripheral register structure.

Definition at line 3417 of file MKL25Z4.h.

Field Documentation

uint32_t ICER

Interrupt Clear Enable Register, offset: 0x80.

Definition at line 3420 of file MKL25Z4.h.

uint32_t ICPR

Interrupt Clear Pending Register, offset: 0x180.

Definition at line 3424 of file MKL25Z4.h.

uint32_t IP[8]

Interrupt Priority Register n, array offset: 0x300, array step: 0x4.

Definition at line 3426 of file MKL25Z4.h.

uint32_t ISER

Interrupt Set Enable Register, offset: 0x0.

Definition at line 3418 of file MKL25Z4.h.

uint32_t ISPR

Interrupt Set Pending Register, offset: 0x100.

Definition at line 3422 of file MKL25Z4.h.

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