Freescale_Cachan
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Programme_course_30Tr
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Programme_course_vir_am_2
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MTB_MemMap Struct Reference
[MTB]
MTB - Peripheral register structure. More...
#include <MKL25Z4.h>
Data Fields | |
| uint32_t | POSITION |
| MTB Position Register, offset: 0x0. | |
| uint32_t | MASTER |
| MTB Master Register, offset: 0x4. | |
| uint32_t | FLOW |
| MTB Flow Register, offset: 0x8. | |
| uint32_t | BASE |
| MTB Base Register, offset: 0xC. | |
| uint32_t | MODECTRL |
| Integration Mode Control Register, offset: 0xF00. | |
| uint32_t | TAGSET |
| Claim TAG Set Register, offset: 0xFA0. | |
| uint32_t | TAGCLEAR |
| Claim TAG Clear Register, offset: 0xFA4. | |
| uint32_t | LOCKACCESS |
| Lock Access Register, offset: 0xFB0. | |
| uint32_t | LOCKSTAT |
| Lock Status Register, offset: 0xFB4. | |
| uint32_t | AUTHSTAT |
| Authentication Status Register, offset: 0xFB8. | |
| uint32_t | DEVICEARCH |
| Device Architecture Register, offset: 0xFBC. | |
| uint32_t | DEVICECFG |
| Device Configuration Register, offset: 0xFC8. | |
| uint32_t | DEVICETYPID |
| Device Type Identifier Register, offset: 0xFCC. | |
| uint32_t | PERIPHID [8] |
| Peripheral ID Register, array offset: 0xFD0, array step: 0x4. | |
| uint32_t | COMPID [4] |
| Component ID Register, array offset: 0xFF0, array step: 0x4. | |
Detailed Description
MTB - Peripheral register structure.
Definition at line 2829 of file MKL25Z4.h.
Field Documentation
| uint32_t AUTHSTAT |
| uint32_t COMPID[4] |
| uint32_t DEVICEARCH |
| uint32_t DEVICECFG |
| uint32_t DEVICETYPID |
| uint32_t LOCKACCESS |
| uint32_t MODECTRL |
| uint32_t PERIPHID[8] |
| uint32_t TAGCLEAR |
Generated on Tue Jul 12 2022 16:20:12 by
1.7.2