Freescale_Cachan
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Programme_course_30Tr
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Programme_course_vir_am_2
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MCG_MemMap Struct Reference
[MCG]
MCG - Peripheral register structure. More...
#include <MKL25Z4.h>
Data Fields | |
| uint8_t | C1 |
| MCG Control 1 Register, offset: 0x0. | |
| uint8_t | C2 |
| MCG Control 2 Register, offset: 0x1. | |
| uint8_t | C3 |
| MCG Control 3 Register, offset: 0x2. | |
| uint8_t | C4 |
| MCG Control 4 Register, offset: 0x3. | |
| uint8_t | C5 |
| MCG Control 5 Register, offset: 0x4. | |
| uint8_t | C6 |
| MCG Control 6 Register, offset: 0x5. | |
| uint8_t | S |
| MCG Status Register, offset: 0x6. | |
| uint8_t | SC |
| MCG Status and Control Register, offset: 0x8. | |
| uint8_t | ATCVH |
| MCG Auto Trim Compare Value High Register, offset: 0xA. | |
| uint8_t | ATCVL |
| MCG Auto Trim Compare Value Low Register, offset: 0xB. | |
| uint8_t | C7 |
| MCG Control 7 Register, offset: 0xC. | |
| uint8_t | C8 |
| MCG Control 8 Register, offset: 0xD. | |
| uint8_t | C9 |
| MCG Control 9 Register, offset: 0xE. | |
| uint8_t | C10 |
| MCG Control 10 Register, offset: 0xF. | |
Detailed Description
MCG - Peripheral register structure.
Definition at line 2490 of file MKL25Z4.h.
Field Documentation
| uint8_t ATCVH |
| uint8_t ATCVL |
Generated on Tue Jul 12 2022 16:20:12 by
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