Freescale_Cachan / Mbed 2 deprecated Programme_course_30Tr

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Dependencies:   MMA8451Q mbed

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LPTMR_MemMap Struct Reference
Data Fields

LPTMR_MemMap Struct Reference
[LPTMR]

LPTMR - Peripheral register structure. More...

#include <MKL25Z4.h>

Data Fields

uint32_t CSR
 Low Power Timer Control Status Register, offset: 0x0.
uint32_t PSR
 Low Power Timer Prescale Register, offset: 0x4.
uint32_t CMR
 Low Power Timer Compare Register, offset: 0x8.
uint32_t CNR
 Low Power Timer Counter Register, offset: 0xC.

Detailed Description

LPTMR - Peripheral register structure.

Definition at line 2371 of file MKL25Z4.h.

Field Documentation

uint32_t CMR

Low Power Timer Compare Register, offset: 0x8.

Definition at line 2374 of file MKL25Z4.h.

uint32_t CNR

Low Power Timer Counter Register, offset: 0xC.

Definition at line 2375 of file MKL25Z4.h.

uint32_t CSR

Low Power Timer Control Status Register, offset: 0x0.

Definition at line 2372 of file MKL25Z4.h.

uint32_t PSR

Low Power Timer Prescale Register, offset: 0x4.

Definition at line 2373 of file MKL25Z4.h.

Generated on Tue Jul 12 2022 16:20:12 by  doxygen 1.7.2