Freescale_Cachan
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Programme_course_30Tr
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Programme_course_vir_am_2
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FGPIO_MemMap Struct Reference
[FGPIO]
FGPIO - Peripheral register structure. More...
#include <MKL25Z4.h>
Data Fields | |
| uint32_t | PDOR |
| Port Data Output Register, offset: 0x0. | |
| uint32_t | PSOR |
| Port Set Output Register, offset: 0x4. | |
| uint32_t | PCOR |
| Port Clear Output Register, offset: 0x8. | |
| uint32_t | PTOR |
| Port Toggle Output Register, offset: 0xC. | |
| uint32_t | PDIR |
| Port Data Input Register, offset: 0x10. | |
| uint32_t | PDDR |
| Port Data Direction Register, offset: 0x14. | |
Detailed Description
FGPIO - Peripheral register structure.
Definition at line 1359 of file MKL25Z4.h.
Field Documentation
| uint32_t PDDR |
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