Semtech SX1272 radio chipset driver - ported based on Semtech SX1276 driver.
Dependents: Elmo-Terminal LoRaWAN-test-app Elmo-Terminal-App LoRaWAN_Semtech_stack ... more
Diff: sx1272/sx1272-hal.cpp
- Revision:
- 1:51fd7a5843e5
- Parent:
- 0:669f3b0e91c8
- Child:
- 2:b0a793d995ad
diff -r 669f3b0e91c8 -r 51fd7a5843e5 sx1272/sx1272-hal.cpp --- a/sx1272/sx1272-hal.cpp Thu Sep 17 14:42:20 2015 +0200 +++ b/sx1272/sx1272-hal.cpp Thu Sep 17 15:03:32 2015 +0200 @@ -15,7 +15,7 @@ */ #include "sx1272-hal.h" -const RadioRegisters_t SX1272MB1xAS::RadioRegsInit[] = +const RadioRegisters_t SX1272BRD::RadioRegsInit[] = { { MODEM_FSK , REG_LNA , 0x23 }, { MODEM_FSK , REG_RXCONFIG , 0x1E }, @@ -34,7 +34,7 @@ { MODEM_LORA, REG_LR_PAYLOADMAXLENGTH, 0x40 }, }; -SX1272MB1xAS::SX1272MB1xAS( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ), +SX1272BRD::SX1272BRD( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ), void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool ChannelActivityDetected ), PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset, PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5, @@ -60,7 +60,7 @@ } -SX1272MB1xAS::~SX1272MB1xAS ( ) +SX1272BRD::~SX1272BRD ( ) { IoIrqDeInit( ); }; @@ -68,13 +68,13 @@ //------------------------------------------------------------------------- // Board relative functions //------------------------------------------------------------------------- -void SX1272MB1xAS::IoInit( void ) +void SX1272BRD::IoInit( void ) { AntSwInit( ); SpiInit( ); } -void SX1272MB1xAS::RadioRegistersInit( ){ +void SX1272BRD::RadioRegistersInit( ){ uint8_t i = 0; for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ ) { @@ -83,7 +83,7 @@ } } -void SX1272MB1xAS::SpiInit( void ) +void SX1272BRD::SpiInit( void ) { nss = 1; spi.format( 8,0 ); @@ -98,7 +98,7 @@ wait(0.1); } -void SX1272MB1xAS::IoIrqInit( DioIrqHandler *irqHandlers ) +void SX1272BRD::IoIrqInit( DioIrqHandler *irqHandlers ) { #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_LPC11U6X ) ) dio0.mode(PullDown); @@ -114,7 +114,7 @@ dio4.rise( this, static_cast< TriggerMB1xASSX1272 > ( irqHandlers[4] ) ); } -void SX1272MB1xAS::IoIrqDeInit( ) +void SX1272BRD::IoIrqDeInit( ) { dio0.disable_irq(); dio1.disable_irq(); @@ -123,17 +123,17 @@ dio4.disable_irq(); } -void SX1272MB1xAS::IoDeInit( void ) +void SX1272BRD::IoDeInit( void ) { //nothing } -uint8_t SX1272MB1xAS::GetPaSelect( uint32_t channel ) +uint8_t SX1272BRD::GetPaSelect( uint32_t channel ) { return RF_PACONFIG_PASELECT_RFO; } -void SX1272MB1xAS::SetAntSwLowPower( bool status ) +void SX1272BRD::SetAntSwLowPower( bool status ) { if( isRadioActive != status ) { @@ -150,17 +150,17 @@ } } -void SX1272MB1xAS::AntSwInit( void ) +void SX1272BRD::AntSwInit( void ) { antSwitch = 0; } -void SX1272MB1xAS::AntSwDeInit( void ) +void SX1272BRD::AntSwDeInit( void ) { antSwitch = 0; } -void SX1272MB1xAS::SetAntSw( uint8_t rxTx ) +void SX1272BRD::SetAntSw( uint8_t rxTx ) { if( this->rxTx == rxTx ) { @@ -180,14 +180,14 @@ } } -bool SX1272MB1xAS::CheckRfFrequency( uint32_t frequency ) +bool SX1272BRD::CheckRfFrequency( uint32_t frequency ) { //TODO: Implement check, currently all frequencies are supported return true; } -void SX1272MB1xAS::Reset( void ) +void SX1272BRD::Reset( void ) { reset.output(); reset = 1; @@ -196,19 +196,19 @@ wait_ms( 6 ); } -void SX1272MB1xAS::Write( uint8_t addr, uint8_t data ) +void SX1272BRD::Write( uint8_t addr, uint8_t data ) { Write( addr, &data, 1 ); } -uint8_t SX1272MB1xAS::Read( uint8_t addr ) +uint8_t SX1272BRD::Read( uint8_t addr ) { uint8_t data; Read( addr, &data, 1 ); return data; } -void SX1272MB1xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size ) +void SX1272BRD::Write( uint8_t addr, uint8_t *buffer, uint8_t size ) { uint8_t i; @@ -221,7 +221,7 @@ nss = 1; } -void SX1272MB1xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size ) +void SX1272BRD::Read( uint8_t addr, uint8_t *buffer, uint8_t size ) { uint8_t i; @@ -234,12 +234,12 @@ nss = 1; } -void SX1272MB1xAS::WriteFifo( uint8_t *buffer, uint8_t size ) +void SX1272BRD::WriteFifo( uint8_t *buffer, uint8_t size ) { Write( 0, buffer, size ); } -void SX1272MB1xAS::ReadFifo( uint8_t *buffer, uint8_t size ) +void SX1272BRD::ReadFifo( uint8_t *buffer, uint8_t size ) { Read( 0, buffer, size ); }