Espotel
Semtech SX1272 radio chipset driver - ported based on Semtech SX1276 driver.
Dependents: Elmo-Terminal LoRaWAN-test-app Elmo-Terminal-App LoRaWAN_Semtech_stack ... more
registers/sx1272Regs-LoRa.h@12:a3b1b64969b0, 2016-06-27 (annotated)
- Committer:
- Daniel_espo
- Date:
- Mon Jun 27 11:28:17 2016 +0000
- Revision:
- 12:a3b1b64969b0
- Parent:
- 0:669f3b0e91c8
Merge with Revision 10
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| WGorniak | 0:669f3b0e91c8 | 1 | /* |
| WGorniak | 0:669f3b0e91c8 | 2 | / _____) _ | | |
| WGorniak | 0:669f3b0e91c8 | 3 | ( (____ _____ ____ _| |_ _____ ____| |__ |
| WGorniak | 0:669f3b0e91c8 | 4 | \____ \| ___ | (_ _) ___ |/ ___) _ \ |
| WGorniak | 0:669f3b0e91c8 | 5 | _____) ) ____| | | || |_| ____( (___| | | | |
| WGorniak | 0:669f3b0e91c8 | 6 | (______/|_____)_|_|_| \__)_____)\____)_| |_| |
| WGorniak | 0:669f3b0e91c8 | 7 | ( C ) Semtech |
| WGorniak | 0:669f3b0e91c8 | 8 | |
| WGorniak | 0:669f3b0e91c8 | 9 | Description: Port of Semtech SX1276 C++ library to support SX1272 chipset performed by Espotel |
| WGorniak | 0:669f3b0e91c8 | 10 | |
| WGorniak | 0:669f3b0e91c8 | 11 | License: Revised BSD License, see LICENSE.TXT file include in the project |
| WGorniak | 0:669f3b0e91c8 | 12 | |
| WGorniak | 0:669f3b0e91c8 | 13 | Maintainers: www.espotel.com |
| WGorniak | 0:669f3b0e91c8 | 14 | |
| WGorniak | 0:669f3b0e91c8 | 15 | */ |
| WGorniak | 0:669f3b0e91c8 | 16 | #ifndef __SX1272_REGS_LORA_H__ |
| WGorniak | 0:669f3b0e91c8 | 17 | #define __SX1272_REGS_LORA_H__ |
| WGorniak | 0:669f3b0e91c8 | 18 | |
| WGorniak | 0:669f3b0e91c8 | 19 | /*! |
| WGorniak | 0:669f3b0e91c8 | 20 | * ============================================================================ |
| WGorniak | 0:669f3b0e91c8 | 21 | * SX1272 Internal registers Address |
| WGorniak | 0:669f3b0e91c8 | 22 | * ============================================================================ |
| WGorniak | 0:669f3b0e91c8 | 23 | */ |
| WGorniak | 0:669f3b0e91c8 | 24 | #define REG_LR_FIFO 0x00 |
| WGorniak | 0:669f3b0e91c8 | 25 | // Common settings |
| WGorniak | 0:669f3b0e91c8 | 26 | #define REG_LR_OPMODE 0x01 |
| WGorniak | 0:669f3b0e91c8 | 27 | #define REG_LR_FRFMSB 0x06 |
| WGorniak | 0:669f3b0e91c8 | 28 | #define REG_LR_FRFMID 0x07 |
| WGorniak | 0:669f3b0e91c8 | 29 | #define REG_LR_FRFLSB 0x08 |
| WGorniak | 0:669f3b0e91c8 | 30 | // Tx settings |
| WGorniak | 0:669f3b0e91c8 | 31 | #define REG_LR_PACONFIG 0x09 |
| WGorniak | 0:669f3b0e91c8 | 32 | #define REG_LR_PARAMP 0x0A |
| WGorniak | 0:669f3b0e91c8 | 33 | #define REG_LR_OCP 0x0B |
| WGorniak | 0:669f3b0e91c8 | 34 | // Rx settings |
| WGorniak | 0:669f3b0e91c8 | 35 | #define REG_LR_LNA 0x0C |
| WGorniak | 0:669f3b0e91c8 | 36 | // LoRa registers |
| WGorniak | 0:669f3b0e91c8 | 37 | #define REG_LR_FIFOADDRPTR 0x0D |
| WGorniak | 0:669f3b0e91c8 | 38 | #define REG_LR_FIFOTXBASEADDR 0x0E |
| WGorniak | 0:669f3b0e91c8 | 39 | #define REG_LR_FIFORXBASEADDR 0x0F |
| WGorniak | 0:669f3b0e91c8 | 40 | #define REG_LR_FIFORXCURRENTADDR 0x10 |
| WGorniak | 0:669f3b0e91c8 | 41 | #define REG_LR_IRQFLAGSMASK 0x11 |
| WGorniak | 0:669f3b0e91c8 | 42 | #define REG_LR_IRQFLAGS 0x12 |
| WGorniak | 0:669f3b0e91c8 | 43 | #define REG_LR_RXNBBYTES 0x13 |
| WGorniak | 0:669f3b0e91c8 | 44 | #define REG_LR_RXHEADERCNTVALUEMSB 0x14 |
| WGorniak | 0:669f3b0e91c8 | 45 | #define REG_LR_RXHEADERCNTVALUELSB 0x15 |
| WGorniak | 0:669f3b0e91c8 | 46 | #define REG_LR_RXPACKETCNTVALUEMSB 0x16 |
| WGorniak | 0:669f3b0e91c8 | 47 | #define REG_LR_RXPACKETCNTVALUELSB 0x17 |
| WGorniak | 0:669f3b0e91c8 | 48 | #define REG_LR_MODEMSTAT 0x18 |
| WGorniak | 0:669f3b0e91c8 | 49 | #define REG_LR_PKTSNRVALUE 0x19 |
| WGorniak | 0:669f3b0e91c8 | 50 | #define REG_LR_PKTRSSIVALUE 0x1A |
| WGorniak | 0:669f3b0e91c8 | 51 | #define REG_LR_RSSIVALUE 0x1B |
| WGorniak | 0:669f3b0e91c8 | 52 | #define REG_LR_HOPCHANNEL 0x1C |
| WGorniak | 0:669f3b0e91c8 | 53 | #define REG_LR_MODEMCONFIG1 0x1D |
| WGorniak | 0:669f3b0e91c8 | 54 | #define REG_LR_MODEMCONFIG2 0x1E |
| WGorniak | 0:669f3b0e91c8 | 55 | #define REG_LR_SYMBTIMEOUTLSB 0x1F |
| WGorniak | 0:669f3b0e91c8 | 56 | #define REG_LR_PREAMBLEMSB 0x20 |
| WGorniak | 0:669f3b0e91c8 | 57 | #define REG_LR_PREAMBLELSB 0x21 |
| WGorniak | 0:669f3b0e91c8 | 58 | #define REG_LR_PAYLOADLENGTH 0x22 |
| WGorniak | 0:669f3b0e91c8 | 59 | #define REG_LR_PAYLOADMAXLENGTH 0x23 |
| WGorniak | 0:669f3b0e91c8 | 60 | #define REG_LR_HOPPERIOD 0x24 |
| WGorniak | 0:669f3b0e91c8 | 61 | #define REG_LR_FIFORXBYTEADDR 0x25 |
| WGorniak | 0:669f3b0e91c8 | 62 | #define REG_LR_FEIMSB 0x28 |
| WGorniak | 0:669f3b0e91c8 | 63 | #define REG_LR_FEIMID 0x29 |
| WGorniak | 0:669f3b0e91c8 | 64 | #define REG_LR_FEILSB 0x2A |
| WGorniak | 0:669f3b0e91c8 | 65 | #define REG_LR_RSSIWIDEBAND 0x2C |
| WGorniak | 0:669f3b0e91c8 | 66 | #define REG_LR_DETECTOPTIMIZE 0x31 |
| WGorniak | 0:669f3b0e91c8 | 67 | #define REG_LR_INVERTIQ 0x33 |
| WGorniak | 0:669f3b0e91c8 | 68 | #define REG_LR_DETECTIONTHRESHOLD 0x37 |
| WGorniak | 0:669f3b0e91c8 | 69 | #define REG_LR_SYNCWORD 0x39 |
| WGorniak | 0:669f3b0e91c8 | 70 | #define REG_LR_INVERTIQ2 0x3B |
| WGorniak | 0:669f3b0e91c8 | 71 | |
| WGorniak | 0:669f3b0e91c8 | 72 | // end of documented register in datasheet |
| WGorniak | 0:669f3b0e91c8 | 73 | // I/O settings |
| WGorniak | 0:669f3b0e91c8 | 74 | #define REG_LR_DIOMAPPING1 0x40 |
| WGorniak | 0:669f3b0e91c8 | 75 | #define REG_LR_DIOMAPPING2 0x41 |
| WGorniak | 0:669f3b0e91c8 | 76 | // Version |
| WGorniak | 0:669f3b0e91c8 | 77 | #define REG_LR_VERSION 0x42 |
| WGorniak | 0:669f3b0e91c8 | 78 | // Additional settings |
| WGorniak | 0:669f3b0e91c8 | 79 | #define REG_LR_AGCREF 0x43 |
| WGorniak | 0:669f3b0e91c8 | 80 | #define REG_LR_AGCTHRESH1 0x44 |
| WGorniak | 0:669f3b0e91c8 | 81 | #define REG_LR_AGCTHRESH2 0x45 |
| WGorniak | 0:669f3b0e91c8 | 82 | #define REG_LR_AGCTHRESH3 0x46 |
| WGorniak | 0:669f3b0e91c8 | 83 | #define REG_LR_PLLHOP 0x4B |
| WGorniak | 0:669f3b0e91c8 | 84 | #define REG_LR_TCXO 0x58 |
| WGorniak | 0:669f3b0e91c8 | 85 | #define REG_LR_PADAC 0x5A |
| WGorniak | 0:669f3b0e91c8 | 86 | #define REG_LR_PLL 0x5C |
| WGorniak | 0:669f3b0e91c8 | 87 | #define REG_LR_PLLLOWPN 0x5E |
| WGorniak | 0:669f3b0e91c8 | 88 | #define REG_LR_FORMERTEMP 0x6C |
| WGorniak | 0:669f3b0e91c8 | 89 | |
| WGorniak | 0:669f3b0e91c8 | 90 | /*! |
| WGorniak | 0:669f3b0e91c8 | 91 | * ============================================================================ |
| WGorniak | 0:669f3b0e91c8 | 92 | * SX1272 LoRa bits control definition |
| WGorniak | 0:669f3b0e91c8 | 93 | * ============================================================================ |
| WGorniak | 0:669f3b0e91c8 | 94 | */ |
| WGorniak | 0:669f3b0e91c8 | 95 | |
| WGorniak | 0:669f3b0e91c8 | 96 | /*! |
| WGorniak | 0:669f3b0e91c8 | 97 | * RegFifo |
| WGorniak | 0:669f3b0e91c8 | 98 | */ |
| WGorniak | 0:669f3b0e91c8 | 99 | |
| WGorniak | 0:669f3b0e91c8 | 100 | /*! |
| WGorniak | 0:669f3b0e91c8 | 101 | * RegOpMode |
| WGorniak | 0:669f3b0e91c8 | 102 | */ |
| WGorniak | 0:669f3b0e91c8 | 103 | #define RFLR_OPMODE_LONGRANGEMODE_MASK 0x7F |
| WGorniak | 0:669f3b0e91c8 | 104 | #define RFLR_OPMODE_LONGRANGEMODE_OFF 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 105 | #define RFLR_OPMODE_LONGRANGEMODE_ON 0x80 |
| WGorniak | 0:669f3b0e91c8 | 106 | |
| WGorniak | 0:669f3b0e91c8 | 107 | #define RFLR_OPMODE_ACCESSSHAREDREG_MASK 0xBF |
| WGorniak | 0:669f3b0e91c8 | 108 | #define RFLR_OPMODE_ACCESSSHAREDREG_ENABLE 0x40 |
| WGorniak | 0:669f3b0e91c8 | 109 | #define RFLR_OPMODE_ACCESSSHAREDREG_DISABLE 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 110 | |
| WGorniak | 0:669f3b0e91c8 | 111 | #define RFLR_OPMODE_MASK 0xF8 |
| WGorniak | 0:669f3b0e91c8 | 112 | #define RFLR_OPMODE_SLEEP 0x00 |
| WGorniak | 0:669f3b0e91c8 | 113 | #define RFLR_OPMODE_STANDBY 0x01 // Default |
| WGorniak | 0:669f3b0e91c8 | 114 | #define RFLR_OPMODE_SYNTHESIZER_TX 0x02 |
| WGorniak | 0:669f3b0e91c8 | 115 | #define RFLR_OPMODE_TRANSMITTER 0x03 |
| WGorniak | 0:669f3b0e91c8 | 116 | #define RFLR_OPMODE_SYNTHESIZER_RX 0x04 |
| WGorniak | 0:669f3b0e91c8 | 117 | #define RFLR_OPMODE_RECEIVER 0x05 |
| WGorniak | 0:669f3b0e91c8 | 118 | // LoRa specific modes |
| WGorniak | 0:669f3b0e91c8 | 119 | #define RFLR_OPMODE_RECEIVER_SINGLE 0x06 |
| WGorniak | 0:669f3b0e91c8 | 120 | #define RFLR_OPMODE_CAD 0x07 |
| WGorniak | 0:669f3b0e91c8 | 121 | |
| WGorniak | 0:669f3b0e91c8 | 122 | /*! |
| WGorniak | 0:669f3b0e91c8 | 123 | * RegFrf (MHz) |
| WGorniak | 0:669f3b0e91c8 | 124 | */ |
| WGorniak | 0:669f3b0e91c8 | 125 | #define RFLR_FRFMSB_915_MHZ 0xE4 // Default |
| WGorniak | 0:669f3b0e91c8 | 126 | #define RFLR_FRFMID_915_MHZ 0xC0 // Default |
| WGorniak | 0:669f3b0e91c8 | 127 | #define RFLR_FRFLSB_915_MHZ 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 128 | |
| WGorniak | 0:669f3b0e91c8 | 129 | /*! |
| WGorniak | 0:669f3b0e91c8 | 130 | * RegPaConfig |
| WGorniak | 0:669f3b0e91c8 | 131 | */ |
| WGorniak | 0:669f3b0e91c8 | 132 | #define RFLR_PACONFIG_PASELECT_MASK 0x7F |
| WGorniak | 0:669f3b0e91c8 | 133 | #define RFLR_PACONFIG_PASELECT_PABOOST 0x80 |
| WGorniak | 0:669f3b0e91c8 | 134 | #define RFLR_PACONFIG_PASELECT_RFO 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 135 | |
| WGorniak | 0:669f3b0e91c8 | 136 | #define RFLR_PACONFIG_OUTPUTPOWER_MASK 0xF0 |
| WGorniak | 0:669f3b0e91c8 | 137 | |
| WGorniak | 0:669f3b0e91c8 | 138 | /*! |
| WGorniak | 0:669f3b0e91c8 | 139 | * RegPaRamp |
| WGorniak | 0:669f3b0e91c8 | 140 | */ |
| WGorniak | 0:669f3b0e91c8 | 141 | #define RFLR_PARAMP_LOWPNTXPLL_MASK 0xE0 |
| WGorniak | 0:669f3b0e91c8 | 142 | #define RFLR_PARAMP_LOWPNTXPLL_OFF 0x10 // Default |
| WGorniak | 0:669f3b0e91c8 | 143 | #define RFLR_PARAMP_LOWPNTXPLL_ON 0x00 |
| WGorniak | 0:669f3b0e91c8 | 144 | |
| WGorniak | 0:669f3b0e91c8 | 145 | #define RFLR_PARAMP_MASK 0xF0 |
| WGorniak | 0:669f3b0e91c8 | 146 | #define RFLR_PARAMP_3400_US 0x00 |
| WGorniak | 0:669f3b0e91c8 | 147 | #define RFLR_PARAMP_2000_US 0x01 |
| WGorniak | 0:669f3b0e91c8 | 148 | #define RFLR_PARAMP_1000_US 0x02 |
| WGorniak | 0:669f3b0e91c8 | 149 | #define RFLR_PARAMP_0500_US 0x03 |
| WGorniak | 0:669f3b0e91c8 | 150 | #define RFLR_PARAMP_0250_US 0x04 |
| WGorniak | 0:669f3b0e91c8 | 151 | #define RFLR_PARAMP_0125_US 0x05 |
| WGorniak | 0:669f3b0e91c8 | 152 | #define RFLR_PARAMP_0100_US 0x06 |
| WGorniak | 0:669f3b0e91c8 | 153 | #define RFLR_PARAMP_0062_US 0x07 |
| WGorniak | 0:669f3b0e91c8 | 154 | #define RFLR_PARAMP_0050_US 0x08 |
| WGorniak | 0:669f3b0e91c8 | 155 | #define RFLR_PARAMP_0040_US 0x09 // Default |
| WGorniak | 0:669f3b0e91c8 | 156 | #define RFLR_PARAMP_0031_US 0x0A |
| WGorniak | 0:669f3b0e91c8 | 157 | #define RFLR_PARAMP_0025_US 0x0B |
| WGorniak | 0:669f3b0e91c8 | 158 | #define RFLR_PARAMP_0020_US 0x0C |
| WGorniak | 0:669f3b0e91c8 | 159 | #define RFLR_PARAMP_0015_US 0x0D |
| WGorniak | 0:669f3b0e91c8 | 160 | #define RFLR_PARAMP_0012_US 0x0E |
| WGorniak | 0:669f3b0e91c8 | 161 | #define RFLR_PARAMP_0010_US 0x0F |
| WGorniak | 0:669f3b0e91c8 | 162 | |
| WGorniak | 0:669f3b0e91c8 | 163 | /*! |
| WGorniak | 0:669f3b0e91c8 | 164 | * RegOcp |
| WGorniak | 0:669f3b0e91c8 | 165 | */ |
| WGorniak | 0:669f3b0e91c8 | 166 | #define RFLR_OCP_MASK 0xDF |
| WGorniak | 0:669f3b0e91c8 | 167 | #define RFLR_OCP_ON 0x20 // Default |
| WGorniak | 0:669f3b0e91c8 | 168 | #define RFLR_OCP_OFF 0x00 |
| WGorniak | 0:669f3b0e91c8 | 169 | |
| WGorniak | 0:669f3b0e91c8 | 170 | #define RFLR_OCP_TRIM_MASK 0xE0 |
| WGorniak | 0:669f3b0e91c8 | 171 | #define RFLR_OCP_TRIM_045_MA 0x00 |
| WGorniak | 0:669f3b0e91c8 | 172 | #define RFLR_OCP_TRIM_050_MA 0x01 |
| WGorniak | 0:669f3b0e91c8 | 173 | #define RFLR_OCP_TRIM_055_MA 0x02 |
| WGorniak | 0:669f3b0e91c8 | 174 | #define RFLR_OCP_TRIM_060_MA 0x03 |
| WGorniak | 0:669f3b0e91c8 | 175 | #define RFLR_OCP_TRIM_065_MA 0x04 |
| WGorniak | 0:669f3b0e91c8 | 176 | #define RFLR_OCP_TRIM_070_MA 0x05 |
| WGorniak | 0:669f3b0e91c8 | 177 | #define RFLR_OCP_TRIM_075_MA 0x06 |
| WGorniak | 0:669f3b0e91c8 | 178 | #define RFLR_OCP_TRIM_080_MA 0x07 |
| WGorniak | 0:669f3b0e91c8 | 179 | #define RFLR_OCP_TRIM_085_MA 0x08 |
| WGorniak | 0:669f3b0e91c8 | 180 | #define RFLR_OCP_TRIM_090_MA 0x09 |
| WGorniak | 0:669f3b0e91c8 | 181 | #define RFLR_OCP_TRIM_095_MA 0x0A |
| WGorniak | 0:669f3b0e91c8 | 182 | #define RFLR_OCP_TRIM_100_MA 0x0B // Default |
| WGorniak | 0:669f3b0e91c8 | 183 | #define RFLR_OCP_TRIM_105_MA 0x0C |
| WGorniak | 0:669f3b0e91c8 | 184 | #define RFLR_OCP_TRIM_110_MA 0x0D |
| WGorniak | 0:669f3b0e91c8 | 185 | #define RFLR_OCP_TRIM_115_MA 0x0E |
| WGorniak | 0:669f3b0e91c8 | 186 | #define RFLR_OCP_TRIM_120_MA 0x0F |
| WGorniak | 0:669f3b0e91c8 | 187 | #define RFLR_OCP_TRIM_130_MA 0x10 |
| WGorniak | 0:669f3b0e91c8 | 188 | #define RFLR_OCP_TRIM_140_MA 0x11 |
| WGorniak | 0:669f3b0e91c8 | 189 | #define RFLR_OCP_TRIM_150_MA 0x12 |
| WGorniak | 0:669f3b0e91c8 | 190 | #define RFLR_OCP_TRIM_160_MA 0x13 |
| WGorniak | 0:669f3b0e91c8 | 191 | #define RFLR_OCP_TRIM_170_MA 0x14 |
| WGorniak | 0:669f3b0e91c8 | 192 | #define RFLR_OCP_TRIM_180_MA 0x15 |
| WGorniak | 0:669f3b0e91c8 | 193 | #define RFLR_OCP_TRIM_190_MA 0x16 |
| WGorniak | 0:669f3b0e91c8 | 194 | #define RFLR_OCP_TRIM_200_MA 0x17 |
| WGorniak | 0:669f3b0e91c8 | 195 | #define RFLR_OCP_TRIM_210_MA 0x18 |
| WGorniak | 0:669f3b0e91c8 | 196 | #define RFLR_OCP_TRIM_220_MA 0x19 |
| WGorniak | 0:669f3b0e91c8 | 197 | #define RFLR_OCP_TRIM_230_MA 0x1A |
| WGorniak | 0:669f3b0e91c8 | 198 | #define RFLR_OCP_TRIM_240_MA 0x1B |
| WGorniak | 0:669f3b0e91c8 | 199 | |
| WGorniak | 0:669f3b0e91c8 | 200 | /*! |
| WGorniak | 0:669f3b0e91c8 | 201 | * RegLna |
| WGorniak | 0:669f3b0e91c8 | 202 | */ |
| WGorniak | 0:669f3b0e91c8 | 203 | #define RFLR_LNA_GAIN_MASK 0x1F |
| WGorniak | 0:669f3b0e91c8 | 204 | #define RFLR_LNA_GAIN_G1 0x20 // Default |
| WGorniak | 0:669f3b0e91c8 | 205 | #define RFLR_LNA_GAIN_G2 0x40 |
| WGorniak | 0:669f3b0e91c8 | 206 | #define RFLR_LNA_GAIN_G3 0x60 |
| WGorniak | 0:669f3b0e91c8 | 207 | #define RFLR_LNA_GAIN_G4 0x80 |
| WGorniak | 0:669f3b0e91c8 | 208 | #define RFLR_LNA_GAIN_G5 0xA0 |
| WGorniak | 0:669f3b0e91c8 | 209 | #define RFLR_LNA_GAIN_G6 0xC0 |
| WGorniak | 0:669f3b0e91c8 | 210 | |
| WGorniak | 0:669f3b0e91c8 | 211 | #define RFLR_LNA_BOOST_MASK 0xFC |
| WGorniak | 0:669f3b0e91c8 | 212 | #define RFLR_LNA_BOOST_OFF 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 213 | #define RFLR_LNA_BOOST_ON 0x03 |
| WGorniak | 0:669f3b0e91c8 | 214 | |
| WGorniak | 0:669f3b0e91c8 | 215 | /*! |
| WGorniak | 0:669f3b0e91c8 | 216 | * RegFifoAddrPtr |
| WGorniak | 0:669f3b0e91c8 | 217 | */ |
| WGorniak | 0:669f3b0e91c8 | 218 | #define RFLR_FIFOADDRPTR 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 219 | |
| WGorniak | 0:669f3b0e91c8 | 220 | /*! |
| WGorniak | 0:669f3b0e91c8 | 221 | * RegFifoTxBaseAddr |
| WGorniak | 0:669f3b0e91c8 | 222 | */ |
| WGorniak | 0:669f3b0e91c8 | 223 | #define RFLR_FIFOTXBASEADDR 0x80 // Default |
| WGorniak | 0:669f3b0e91c8 | 224 | |
| WGorniak | 0:669f3b0e91c8 | 225 | /*! |
| WGorniak | 0:669f3b0e91c8 | 226 | * RegFifoTxBaseAddr |
| WGorniak | 0:669f3b0e91c8 | 227 | */ |
| WGorniak | 0:669f3b0e91c8 | 228 | #define RFLR_FIFORXBASEADDR 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 229 | |
| WGorniak | 0:669f3b0e91c8 | 230 | /*! |
| WGorniak | 0:669f3b0e91c8 | 231 | * RegFifoRxCurrentAddr (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 232 | */ |
| WGorniak | 0:669f3b0e91c8 | 233 | |
| WGorniak | 0:669f3b0e91c8 | 234 | /*! |
| WGorniak | 0:669f3b0e91c8 | 235 | * RegIrqFlagsMask |
| WGorniak | 0:669f3b0e91c8 | 236 | */ |
| WGorniak | 0:669f3b0e91c8 | 237 | #define RFLR_IRQFLAGS_RXTIMEOUT_MASK 0x80 |
| WGorniak | 0:669f3b0e91c8 | 238 | #define RFLR_IRQFLAGS_RXDONE_MASK 0x40 |
| WGorniak | 0:669f3b0e91c8 | 239 | #define RFLR_IRQFLAGS_PAYLOADCRCERROR_MASK 0x20 |
| WGorniak | 0:669f3b0e91c8 | 240 | #define RFLR_IRQFLAGS_VALIDHEADER_MASK 0x10 |
| WGorniak | 0:669f3b0e91c8 | 241 | #define RFLR_IRQFLAGS_TXDONE_MASK 0x08 |
| WGorniak | 0:669f3b0e91c8 | 242 | #define RFLR_IRQFLAGS_CADDONE_MASK 0x04 |
| WGorniak | 0:669f3b0e91c8 | 243 | #define RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL_MASK 0x02 |
| WGorniak | 0:669f3b0e91c8 | 244 | #define RFLR_IRQFLAGS_CADDETECTED_MASK 0x01 |
| WGorniak | 0:669f3b0e91c8 | 245 | |
| WGorniak | 0:669f3b0e91c8 | 246 | /*! |
| WGorniak | 0:669f3b0e91c8 | 247 | * RegIrqFlags |
| WGorniak | 0:669f3b0e91c8 | 248 | */ |
| WGorniak | 0:669f3b0e91c8 | 249 | #define RFLR_IRQFLAGS_RXTIMEOUT 0x80 |
| WGorniak | 0:669f3b0e91c8 | 250 | #define RFLR_IRQFLAGS_RXDONE 0x40 |
| WGorniak | 0:669f3b0e91c8 | 251 | #define RFLR_IRQFLAGS_PAYLOADCRCERROR 0x20 |
| WGorniak | 0:669f3b0e91c8 | 252 | #define RFLR_IRQFLAGS_VALIDHEADER 0x10 |
| WGorniak | 0:669f3b0e91c8 | 253 | #define RFLR_IRQFLAGS_TXDONE 0x08 |
| WGorniak | 0:669f3b0e91c8 | 254 | #define RFLR_IRQFLAGS_CADDONE 0x04 |
| WGorniak | 0:669f3b0e91c8 | 255 | #define RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL 0x02 |
| WGorniak | 0:669f3b0e91c8 | 256 | #define RFLR_IRQFLAGS_CADDETECTED 0x01 |
| WGorniak | 0:669f3b0e91c8 | 257 | |
| WGorniak | 0:669f3b0e91c8 | 258 | /*! |
| WGorniak | 0:669f3b0e91c8 | 259 | * RegFifoRxNbBytes (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 260 | */ |
| WGorniak | 0:669f3b0e91c8 | 261 | |
| WGorniak | 0:669f3b0e91c8 | 262 | /*! |
| WGorniak | 0:669f3b0e91c8 | 263 | * RegRxHeaderCntValueMsb (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 264 | */ |
| WGorniak | 0:669f3b0e91c8 | 265 | |
| WGorniak | 0:669f3b0e91c8 | 266 | /*! |
| WGorniak | 0:669f3b0e91c8 | 267 | * RegRxHeaderCntValueLsb (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 268 | */ |
| WGorniak | 0:669f3b0e91c8 | 269 | |
| WGorniak | 0:669f3b0e91c8 | 270 | /*! |
| WGorniak | 0:669f3b0e91c8 | 271 | * RegRxPacketCntValueMsb (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 272 | */ |
| WGorniak | 0:669f3b0e91c8 | 273 | |
| WGorniak | 0:669f3b0e91c8 | 274 | /*! |
| WGorniak | 0:669f3b0e91c8 | 275 | * RegRxPacketCntValueLsb (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 276 | */ |
| WGorniak | 0:669f3b0e91c8 | 277 | |
| WGorniak | 0:669f3b0e91c8 | 278 | /*! |
| WGorniak | 0:669f3b0e91c8 | 279 | * RegModemStat (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 280 | */ |
| WGorniak | 0:669f3b0e91c8 | 281 | #define RFLR_MODEMSTAT_RX_CR_MASK 0x1F |
| WGorniak | 0:669f3b0e91c8 | 282 | #define RFLR_MODEMSTAT_MODEM_STATUS_MASK 0xE0 |
| WGorniak | 0:669f3b0e91c8 | 283 | |
| WGorniak | 0:669f3b0e91c8 | 284 | /*! |
| WGorniak | 0:669f3b0e91c8 | 285 | * RegPktSnrValue (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 286 | */ |
| WGorniak | 0:669f3b0e91c8 | 287 | |
| WGorniak | 0:669f3b0e91c8 | 288 | /*! |
| WGorniak | 0:669f3b0e91c8 | 289 | * RegPktRssiValue (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 290 | */ |
| WGorniak | 0:669f3b0e91c8 | 291 | |
| WGorniak | 0:669f3b0e91c8 | 292 | /*! |
| WGorniak | 0:669f3b0e91c8 | 293 | * RegRssiValue (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 294 | */ |
| WGorniak | 0:669f3b0e91c8 | 295 | |
| WGorniak | 0:669f3b0e91c8 | 296 | /*! |
| WGorniak | 0:669f3b0e91c8 | 297 | * RegHopChannel (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 298 | */ |
| WGorniak | 0:669f3b0e91c8 | 299 | #define RFLR_HOPCHANNEL_PLL_LOCK_TIMEOUT_MASK 0x7F |
| WGorniak | 0:669f3b0e91c8 | 300 | #define RFLR_HOPCHANNEL_PLL_LOCK_FAIL 0x80 |
| WGorniak | 0:669f3b0e91c8 | 301 | #define RFLR_HOPCHANNEL_PLL_LOCK_SUCCEED 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 302 | |
| WGorniak | 0:669f3b0e91c8 | 303 | #define RFLR_HOPCHANNEL_CRCONPAYLOAD_MASK 0xBF |
| WGorniak | 0:669f3b0e91c8 | 304 | #define RFLR_HOPCHANNEL_CRCONPAYLOAD_ON 0x40 |
| WGorniak | 0:669f3b0e91c8 | 305 | #define RFLR_HOPCHANNEL_CRCONPAYLOAD_OFF 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 306 | |
| WGorniak | 0:669f3b0e91c8 | 307 | #define RFLR_HOPCHANNEL_CHANNEL_MASK 0x3F |
| WGorniak | 0:669f3b0e91c8 | 308 | |
| WGorniak | 0:669f3b0e91c8 | 309 | /*! |
| WGorniak | 0:669f3b0e91c8 | 310 | * RegModemConfig1 |
| WGorniak | 0:669f3b0e91c8 | 311 | */ |
| WGorniak | 0:669f3b0e91c8 | 312 | #define RFLR_MODEMCONFIG1_BW_MASK 0x3F |
| WGorniak | 0:669f3b0e91c8 | 313 | #define RFLR_MODEMCONFIG1_BW_125_KHZ 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 314 | #define RFLR_MODEMCONFIG1_BW_250_KHZ 0x40 |
| WGorniak | 0:669f3b0e91c8 | 315 | #define RFLR_MODEMCONFIG1_BW_500_KHZ 0x80 |
| WGorniak | 0:669f3b0e91c8 | 316 | |
| WGorniak | 0:669f3b0e91c8 | 317 | #define RFLR_MODEMCONFIG1_CODINGRATE_MASK 0xC7 |
| WGorniak | 0:669f3b0e91c8 | 318 | #define RFLR_MODEMCONFIG1_CODINGRATE_4_5 0x08 |
| WGorniak | 0:669f3b0e91c8 | 319 | #define RFLR_MODEMCONFIG1_CODINGRATE_4_6 0x10 // Default |
| WGorniak | 0:669f3b0e91c8 | 320 | #define RFLR_MODEMCONFIG1_CODINGRATE_4_7 0x18 |
| WGorniak | 0:669f3b0e91c8 | 321 | #define RFLR_MODEMCONFIG1_CODINGRATE_4_8 0x20 |
| WGorniak | 0:669f3b0e91c8 | 322 | |
| WGorniak | 0:669f3b0e91c8 | 323 | #define RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK 0xFB |
| WGorniak | 0:669f3b0e91c8 | 324 | #define RFLR_MODEMCONFIG1_IMPLICITHEADER_ON 0x04 |
| WGorniak | 0:669f3b0e91c8 | 325 | #define RFLR_MODEMCONFIG1_IMPLICITHEADER_OFF 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 326 | |
| WGorniak | 0:669f3b0e91c8 | 327 | #define RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK 0xFD |
| WGorniak | 0:669f3b0e91c8 | 328 | #define RFLR_MODEMCONFIG1_RXPAYLOADCRC_ON 0x02 |
| WGorniak | 0:669f3b0e91c8 | 329 | #define RFLR_MODEMCONFIG1_RXPAYLOADCRC_OFF 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 330 | |
| WGorniak | 0:669f3b0e91c8 | 331 | #define RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK 0xFE |
| WGorniak | 0:669f3b0e91c8 | 332 | #define RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_ON 0x01 |
| WGorniak | 0:669f3b0e91c8 | 333 | #define RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_OFF 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 334 | |
| WGorniak | 0:669f3b0e91c8 | 335 | /*! |
| WGorniak | 0:669f3b0e91c8 | 336 | * RegModemConfig2 |
| WGorniak | 0:669f3b0e91c8 | 337 | */ |
| WGorniak | 0:669f3b0e91c8 | 338 | #define RFLR_MODEMCONFIG2_SF_MASK 0x0F |
| WGorniak | 0:669f3b0e91c8 | 339 | #define RFLR_MODEMCONFIG2_SF_6 0x60 |
| WGorniak | 0:669f3b0e91c8 | 340 | #define RFLR_MODEMCONFIG2_SF_7 0x70 // Default |
| WGorniak | 0:669f3b0e91c8 | 341 | #define RFLR_MODEMCONFIG2_SF_8 0x80 |
| WGorniak | 0:669f3b0e91c8 | 342 | #define RFLR_MODEMCONFIG2_SF_9 0x90 |
| WGorniak | 0:669f3b0e91c8 | 343 | #define RFLR_MODEMCONFIG2_SF_10 0xA0 |
| WGorniak | 0:669f3b0e91c8 | 344 | #define RFLR_MODEMCONFIG2_SF_11 0xB0 |
| WGorniak | 0:669f3b0e91c8 | 345 | #define RFLR_MODEMCONFIG2_SF_12 0xC0 |
| WGorniak | 0:669f3b0e91c8 | 346 | |
| WGorniak | 0:669f3b0e91c8 | 347 | #define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_MASK 0xF7 |
| WGorniak | 0:669f3b0e91c8 | 348 | #define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_ON 0x08 |
| WGorniak | 0:669f3b0e91c8 | 349 | #define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_OFF 0x00 |
| WGorniak | 0:669f3b0e91c8 | 350 | |
| WGorniak | 0:669f3b0e91c8 | 351 | #define RFLR_MODEMCONFIG2_AGCAUTO_MASK 0xFB |
| WGorniak | 0:669f3b0e91c8 | 352 | #define RFLR_MODEMCONFIG2_AGCAUTO_ON 0x04 // Default |
| WGorniak | 0:669f3b0e91c8 | 353 | #define RFLR_MODEMCONFIG2_AGCAUTO_OFF 0x00 |
| WGorniak | 0:669f3b0e91c8 | 354 | |
| WGorniak | 0:669f3b0e91c8 | 355 | #define RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK 0xFC |
| WGorniak | 0:669f3b0e91c8 | 356 | #define RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 357 | |
| WGorniak | 0:669f3b0e91c8 | 358 | /*! |
| WGorniak | 0:669f3b0e91c8 | 359 | * RegSymbTimeoutLsb |
| WGorniak | 0:669f3b0e91c8 | 360 | */ |
| WGorniak | 0:669f3b0e91c8 | 361 | #define RFLR_SYMBTIMEOUTLSB_SYMBTIMEOUT 0x64 // Default |
| WGorniak | 0:669f3b0e91c8 | 362 | |
| WGorniak | 0:669f3b0e91c8 | 363 | /*! |
| WGorniak | 0:669f3b0e91c8 | 364 | * RegPreambleLengthMsb |
| WGorniak | 0:669f3b0e91c8 | 365 | */ |
| WGorniak | 0:669f3b0e91c8 | 366 | #define RFLR_PREAMBLELENGTHMSB 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 367 | |
| WGorniak | 0:669f3b0e91c8 | 368 | /*! |
| WGorniak | 0:669f3b0e91c8 | 369 | * RegPreambleLengthLsb |
| WGorniak | 0:669f3b0e91c8 | 370 | */ |
| WGorniak | 0:669f3b0e91c8 | 371 | #define RFLR_PREAMBLELENGTHLSB 0x08 // Default |
| WGorniak | 0:669f3b0e91c8 | 372 | |
| WGorniak | 0:669f3b0e91c8 | 373 | /*! |
| WGorniak | 0:669f3b0e91c8 | 374 | * RegPayloadLength |
| WGorniak | 0:669f3b0e91c8 | 375 | */ |
| WGorniak | 0:669f3b0e91c8 | 376 | #define RFLR_PAYLOADLENGTH 0x0E // Default |
| WGorniak | 0:669f3b0e91c8 | 377 | |
| WGorniak | 0:669f3b0e91c8 | 378 | /*! |
| WGorniak | 0:669f3b0e91c8 | 379 | * RegPayloadMaxLength |
| WGorniak | 0:669f3b0e91c8 | 380 | */ |
| WGorniak | 0:669f3b0e91c8 | 381 | #define RFLR_PAYLOADMAXLENGTH 0xFF // Default |
| WGorniak | 0:669f3b0e91c8 | 382 | |
| WGorniak | 0:669f3b0e91c8 | 383 | /*! |
| WGorniak | 0:669f3b0e91c8 | 384 | * RegHopPeriod |
| WGorniak | 0:669f3b0e91c8 | 385 | */ |
| WGorniak | 0:669f3b0e91c8 | 386 | #define RFLR_HOPPERIOD_FREQFOPPINGPERIOD 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 387 | |
| WGorniak | 0:669f3b0e91c8 | 388 | /*! |
| WGorniak | 0:669f3b0e91c8 | 389 | * RegFifoRxByteAddr (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 390 | */ |
| WGorniak | 0:669f3b0e91c8 | 391 | |
| WGorniak | 0:669f3b0e91c8 | 392 | /*! |
| WGorniak | 0:669f3b0e91c8 | 393 | * RegFeiMsb (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 394 | */ |
| WGorniak | 0:669f3b0e91c8 | 395 | |
| WGorniak | 0:669f3b0e91c8 | 396 | /*! |
| WGorniak | 0:669f3b0e91c8 | 397 | * RegFeiMid (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 398 | */ |
| WGorniak | 0:669f3b0e91c8 | 399 | |
| WGorniak | 0:669f3b0e91c8 | 400 | /*! |
| WGorniak | 0:669f3b0e91c8 | 401 | * RegFeiLsb (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 402 | */ |
| WGorniak | 0:669f3b0e91c8 | 403 | |
| WGorniak | 0:669f3b0e91c8 | 404 | /*! |
| WGorniak | 0:669f3b0e91c8 | 405 | * RegRssiWideband (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 406 | */ |
| WGorniak | 0:669f3b0e91c8 | 407 | |
| WGorniak | 0:669f3b0e91c8 | 408 | /*! |
| WGorniak | 0:669f3b0e91c8 | 409 | * RegDetectOptimize |
| WGorniak | 0:669f3b0e91c8 | 410 | */ |
| WGorniak | 0:669f3b0e91c8 | 411 | #define RFLR_DETECTIONOPTIMIZE_MASK 0xF8 |
| WGorniak | 0:669f3b0e91c8 | 412 | #define RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 0x03 // Default |
| WGorniak | 0:669f3b0e91c8 | 413 | #define RFLR_DETECTIONOPTIMIZE_SF6 0x05 |
| WGorniak | 0:669f3b0e91c8 | 414 | |
| WGorniak | 0:669f3b0e91c8 | 415 | /*! |
| WGorniak | 0:669f3b0e91c8 | 416 | * RegInvertIQ |
| WGorniak | 0:669f3b0e91c8 | 417 | */ |
| WGorniak | 0:669f3b0e91c8 | 418 | #define RFLR_INVERTIQ_RX_MASK 0xBF |
| WGorniak | 0:669f3b0e91c8 | 419 | #define RFLR_INVERTIQ_RX_OFF 0x00 |
| WGorniak | 0:669f3b0e91c8 | 420 | #define RFLR_INVERTIQ_RX_ON 0x40 |
| WGorniak | 0:669f3b0e91c8 | 421 | #define RFLR_INVERTIQ_TX_MASK 0xFE |
| WGorniak | 0:669f3b0e91c8 | 422 | #define RFLR_INVERTIQ_TX_OFF 0x01 |
| WGorniak | 0:669f3b0e91c8 | 423 | #define RFLR_INVERTIQ_TX_ON 0x00 |
| WGorniak | 0:669f3b0e91c8 | 424 | |
| WGorniak | 0:669f3b0e91c8 | 425 | /*! |
| WGorniak | 0:669f3b0e91c8 | 426 | * RegDetectionThreshold |
| WGorniak | 0:669f3b0e91c8 | 427 | */ |
| WGorniak | 0:669f3b0e91c8 | 428 | #define RFLR_DETECTIONTHRESH_SF7_TO_SF12 0x0A // Default |
| WGorniak | 0:669f3b0e91c8 | 429 | #define RFLR_DETECTIONTHRESH_SF6 0x0C |
| WGorniak | 0:669f3b0e91c8 | 430 | |
| WGorniak | 0:669f3b0e91c8 | 431 | /*! |
| WGorniak | 0:669f3b0e91c8 | 432 | * RegInvertIQ2 |
| WGorniak | 0:669f3b0e91c8 | 433 | */ |
| WGorniak | 0:669f3b0e91c8 | 434 | #define RFLR_INVERTIQ2_ON 0x19 |
| WGorniak | 0:669f3b0e91c8 | 435 | #define RFLR_INVERTIQ2_OFF 0x1D |
| WGorniak | 0:669f3b0e91c8 | 436 | |
| WGorniak | 0:669f3b0e91c8 | 437 | /*! |
| WGorniak | 0:669f3b0e91c8 | 438 | * RegDioMapping1 |
| WGorniak | 0:669f3b0e91c8 | 439 | */ |
| WGorniak | 0:669f3b0e91c8 | 440 | #define RFLR_DIOMAPPING1_DIO0_MASK 0x3F |
| WGorniak | 0:669f3b0e91c8 | 441 | #define RFLR_DIOMAPPING1_DIO0_00 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 442 | #define RFLR_DIOMAPPING1_DIO0_01 0x40 |
| WGorniak | 0:669f3b0e91c8 | 443 | #define RFLR_DIOMAPPING1_DIO0_10 0x80 |
| WGorniak | 0:669f3b0e91c8 | 444 | #define RFLR_DIOMAPPING1_DIO0_11 0xC0 |
| WGorniak | 0:669f3b0e91c8 | 445 | |
| WGorniak | 0:669f3b0e91c8 | 446 | #define RFLR_DIOMAPPING1_DIO1_MASK 0xCF |
| WGorniak | 0:669f3b0e91c8 | 447 | #define RFLR_DIOMAPPING1_DIO1_00 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 448 | #define RFLR_DIOMAPPING1_DIO1_01 0x10 |
| WGorniak | 0:669f3b0e91c8 | 449 | #define RFLR_DIOMAPPING1_DIO1_10 0x20 |
| WGorniak | 0:669f3b0e91c8 | 450 | #define RFLR_DIOMAPPING1_DIO1_11 0x30 |
| WGorniak | 0:669f3b0e91c8 | 451 | |
| WGorniak | 0:669f3b0e91c8 | 452 | #define RFLR_DIOMAPPING1_DIO2_MASK 0xF3 |
| WGorniak | 0:669f3b0e91c8 | 453 | #define RFLR_DIOMAPPING1_DIO2_00 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 454 | #define RFLR_DIOMAPPING1_DIO2_01 0x04 |
| WGorniak | 0:669f3b0e91c8 | 455 | #define RFLR_DIOMAPPING1_DIO2_10 0x08 |
| WGorniak | 0:669f3b0e91c8 | 456 | #define RFLR_DIOMAPPING1_DIO2_11 0x0C |
| WGorniak | 0:669f3b0e91c8 | 457 | |
| WGorniak | 0:669f3b0e91c8 | 458 | #define RFLR_DIOMAPPING1_DIO3_MASK 0xFC |
| WGorniak | 0:669f3b0e91c8 | 459 | #define RFLR_DIOMAPPING1_DIO3_00 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 460 | #define RFLR_DIOMAPPING1_DIO3_01 0x01 |
| WGorniak | 0:669f3b0e91c8 | 461 | #define RFLR_DIOMAPPING1_DIO3_10 0x02 |
| WGorniak | 0:669f3b0e91c8 | 462 | #define RFLR_DIOMAPPING1_DIO3_11 0x03 |
| WGorniak | 0:669f3b0e91c8 | 463 | |
| WGorniak | 0:669f3b0e91c8 | 464 | /*! |
| WGorniak | 0:669f3b0e91c8 | 465 | * RegDioMapping2 |
| WGorniak | 0:669f3b0e91c8 | 466 | */ |
| WGorniak | 0:669f3b0e91c8 | 467 | #define RFLR_DIOMAPPING2_DIO4_MASK 0x3F |
| WGorniak | 0:669f3b0e91c8 | 468 | #define RFLR_DIOMAPPING2_DIO4_00 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 469 | #define RFLR_DIOMAPPING2_DIO4_01 0x40 |
| WGorniak | 0:669f3b0e91c8 | 470 | #define RFLR_DIOMAPPING2_DIO4_10 0x80 |
| WGorniak | 0:669f3b0e91c8 | 471 | #define RFLR_DIOMAPPING2_DIO4_11 0xC0 |
| WGorniak | 0:669f3b0e91c8 | 472 | |
| WGorniak | 0:669f3b0e91c8 | 473 | #define RFLR_DIOMAPPING2_DIO5_MASK 0xCF |
| WGorniak | 0:669f3b0e91c8 | 474 | #define RFLR_DIOMAPPING2_DIO5_00 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 475 | #define RFLR_DIOMAPPING2_DIO5_01 0x10 |
| WGorniak | 0:669f3b0e91c8 | 476 | #define RFLR_DIOMAPPING2_DIO5_10 0x20 |
| WGorniak | 0:669f3b0e91c8 | 477 | #define RFLR_DIOMAPPING2_DIO5_11 0x30 |
| WGorniak | 0:669f3b0e91c8 | 478 | |
| WGorniak | 0:669f3b0e91c8 | 479 | #define RFLR_DIOMAPPING2_MAP_MASK 0xFE |
| WGorniak | 0:669f3b0e91c8 | 480 | #define RFLR_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01 |
| WGorniak | 0:669f3b0e91c8 | 481 | #define RFLR_DIOMAPPING2_MAP_RSSI 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 482 | |
| WGorniak | 0:669f3b0e91c8 | 483 | /*! |
| WGorniak | 0:669f3b0e91c8 | 484 | * RegVersion (Read Only) |
| WGorniak | 0:669f3b0e91c8 | 485 | */ |
| WGorniak | 0:669f3b0e91c8 | 486 | |
| WGorniak | 0:669f3b0e91c8 | 487 | /*! |
| WGorniak | 0:669f3b0e91c8 | 488 | * RegAgcRef |
| WGorniak | 0:669f3b0e91c8 | 489 | */ |
| WGorniak | 0:669f3b0e91c8 | 490 | |
| WGorniak | 0:669f3b0e91c8 | 491 | /*! |
| WGorniak | 0:669f3b0e91c8 | 492 | * RegAgcThresh1 |
| WGorniak | 0:669f3b0e91c8 | 493 | */ |
| WGorniak | 0:669f3b0e91c8 | 494 | |
| WGorniak | 0:669f3b0e91c8 | 495 | /*! |
| WGorniak | 0:669f3b0e91c8 | 496 | * RegAgcThresh2 |
| WGorniak | 0:669f3b0e91c8 | 497 | */ |
| WGorniak | 0:669f3b0e91c8 | 498 | |
| WGorniak | 0:669f3b0e91c8 | 499 | /*! |
| WGorniak | 0:669f3b0e91c8 | 500 | * RegAgcThresh3 |
| WGorniak | 0:669f3b0e91c8 | 501 | */ |
| WGorniak | 0:669f3b0e91c8 | 502 | |
| WGorniak | 0:669f3b0e91c8 | 503 | /*! |
| WGorniak | 0:669f3b0e91c8 | 504 | * RegPllHop |
| WGorniak | 0:669f3b0e91c8 | 505 | */ |
| WGorniak | 0:669f3b0e91c8 | 506 | #define RFLR_PLLHOP_FASTHOP_MASK 0x7F |
| WGorniak | 0:669f3b0e91c8 | 507 | #define RFLR_PLLHOP_FASTHOP_ON 0x80 |
| WGorniak | 0:669f3b0e91c8 | 508 | #define RFLR_PLLHOP_FASTHOP_OFF 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 509 | |
| WGorniak | 0:669f3b0e91c8 | 510 | /*! |
| WGorniak | 0:669f3b0e91c8 | 511 | * RegTcxo |
| WGorniak | 0:669f3b0e91c8 | 512 | */ |
| WGorniak | 0:669f3b0e91c8 | 513 | #define RFLR_TCXO_TCXOINPUT_MASK 0xEF |
| WGorniak | 0:669f3b0e91c8 | 514 | #define RFLR_TCXO_TCXOINPUT_ON 0x10 |
| WGorniak | 0:669f3b0e91c8 | 515 | #define RFLR_TCXO_TCXOINPUT_OFF 0x00 // Default |
| WGorniak | 0:669f3b0e91c8 | 516 | |
| WGorniak | 0:669f3b0e91c8 | 517 | /*! |
| WGorniak | 0:669f3b0e91c8 | 518 | * RegPaDac |
| WGorniak | 0:669f3b0e91c8 | 519 | */ |
| WGorniak | 0:669f3b0e91c8 | 520 | #define RFLR_PADAC_20DBM_MASK 0xF8 |
| WGorniak | 0:669f3b0e91c8 | 521 | #define RFLR_PADAC_20DBM_ON 0x07 |
| WGorniak | 0:669f3b0e91c8 | 522 | #define RFLR_PADAC_20DBM_OFF 0x04 // Default |
| WGorniak | 0:669f3b0e91c8 | 523 | |
| WGorniak | 0:669f3b0e91c8 | 524 | /*! |
| WGorniak | 0:669f3b0e91c8 | 525 | * RegPll |
| WGorniak | 0:669f3b0e91c8 | 526 | */ |
| WGorniak | 0:669f3b0e91c8 | 527 | #define RFLR_PLL_BANDWIDTH_MASK 0x3F |
| WGorniak | 0:669f3b0e91c8 | 528 | #define RFLR_PLL_BANDWIDTH_75 0x00 |
| WGorniak | 0:669f3b0e91c8 | 529 | #define RFLR_PLL_BANDWIDTH_150 0x40 |
| WGorniak | 0:669f3b0e91c8 | 530 | #define RFLR_PLL_BANDWIDTH_225 0x80 |
| WGorniak | 0:669f3b0e91c8 | 531 | #define RFLR_PLL_BANDWIDTH_300 0xC0 // Default |
| WGorniak | 0:669f3b0e91c8 | 532 | |
| WGorniak | 0:669f3b0e91c8 | 533 | /*! |
| WGorniak | 0:669f3b0e91c8 | 534 | * RegPllLowPn |
| WGorniak | 0:669f3b0e91c8 | 535 | */ |
| WGorniak | 0:669f3b0e91c8 | 536 | #define RFLR_PLLLOWPN_BANDWIDTH_MASK 0x3F |
| WGorniak | 0:669f3b0e91c8 | 537 | #define RFLR_PLLLOWPN_BANDWIDTH_75 0x00 |
| WGorniak | 0:669f3b0e91c8 | 538 | #define RFLR_PLLLOWPN_BANDWIDTH_150 0x40 |
| WGorniak | 0:669f3b0e91c8 | 539 | #define RFLR_PLLLOWPN_BANDWIDTH_225 0x80 |
| WGorniak | 0:669f3b0e91c8 | 540 | #define RFLR_PLLLOWPN_BANDWIDTH_300 0xC0 // Default |
| WGorniak | 0:669f3b0e91c8 | 541 | |
| WGorniak | 0:669f3b0e91c8 | 542 | /*! |
| WGorniak | 0:669f3b0e91c8 | 543 | * RegFormerTemp |
| WGorniak | 0:669f3b0e91c8 | 544 | */ |
| WGorniak | 0:669f3b0e91c8 | 545 | |
| WGorniak | 0:669f3b0e91c8 | 546 | #endif // __SX1272_REGS_LORA_H__ |