Initial Fork
Fork of MODSERIAL by
Device/MODSERIAL_KL25Z.h@29:9a41078f0488, 2013-07-12 (annotated)
- Committer:
- Sissors
- Date:
- Fri Jul 12 15:56:20 2013 +0000
- Revision:
- 29:9a41078f0488
- Parent:
- 28:76793a84f9e5
Added documentation
;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Sissors | 28:76793a84f9e5 | 1 | #if defined(TARGET_KL25Z) |
Sissors | 28:76793a84f9e5 | 2 | |
Sissors | 28:76793a84f9e5 | 3 | #define MODSERIAL_IRQ_REG ((UART_Type*)_base)->C2 |
Sissors | 28:76793a84f9e5 | 4 | #define DISABLE_TX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << UART_C2_TIE_SHIFT) |
Sissors | 28:76793a84f9e5 | 5 | #define DISABLE_RX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << UART_C2_RIE_SHIFT) |
Sissors | 28:76793a84f9e5 | 6 | #define ENABLE_TX_IRQ MODSERIAL_IRQ_REG |= (1UL << UART_C2_TIE_SHIFT) |
Sissors | 28:76793a84f9e5 | 7 | #define ENABLE_RX_IRQ MODSERIAL_IRQ_REG |= (1UL << UART_C2_RIE_SHIFT) |
Sissors | 28:76793a84f9e5 | 8 | |
Sissors | 28:76793a84f9e5 | 9 | #define MODSERIAL_READ_REG ((UART_Type*)_base)->D |
Sissors | 28:76793a84f9e5 | 10 | #define MODSERIAL_WRITE_REG ((UART_Type*)_base)->D |
Sissors | 28:76793a84f9e5 | 11 | #define MODSERIAL_READABLE ((((UART_Type*)_base)->S1 & (1UL<<5)) != 0) |
Sissors | 28:76793a84f9e5 | 12 | #define MODSERIAL_WRITABLE ((((UART_Type*)_base)->S1 & (1UL<<7)) != 0) |
Sissors | 28:76793a84f9e5 | 13 | |
Sissors | 29:9a41078f0488 | 14 | #define RESET_TX_FIFO while(0 == 1) |
Sissors | 29:9a41078f0488 | 15 | #define RESET_RX_FIFO while(MODSERIAL_READABLE) char dummy = MODSERIAL_READ_REG |
Sissors | 29:9a41078f0488 | 16 | |
Sissors | 28:76793a84f9e5 | 17 | #define RX_IRQ_ENABLED ((MODSERIAL_IRQ_REG & (1UL << UART_C2_RIE_SHIFT)) != 0 ) |
Sissors | 28:76793a84f9e5 | 18 | #define TX_IRQ_ENABLED ((MODSERIAL_IRQ_REG & (1UL << UART_C2_TIE_SHIFT)) != 0 ) |
Sissors | 28:76793a84f9e5 | 19 | |
Sissors | 28:76793a84f9e5 | 20 | #endif |