Mouse code for the MacroRat
mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/i2c_ipc7208_map.h@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @file i2c_ipc7208_map.h |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @brief I2C IPC 7208 HW register map |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @internal |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @author ON Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 7 | * $Rev: 3324 $ |
sahilmgandhi | 18:6a4db94011d3 | 8 | * $Date: 2015-03-27 17:00:28 +0530 (Fri, 27 Mar 2015) $ |
sahilmgandhi | 18:6a4db94011d3 | 9 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
sahilmgandhi | 18:6a4db94011d3 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
sahilmgandhi | 18:6a4db94011d3 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
sahilmgandhi | 18:6a4db94011d3 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
sahilmgandhi | 18:6a4db94011d3 | 15 | * if applicable the software license agreement. Do not use this software and/or |
sahilmgandhi | 18:6a4db94011d3 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
sahilmgandhi | 18:6a4db94011d3 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
sahilmgandhi | 18:6a4db94011d3 | 18 | * terms and conditions. |
sahilmgandhi | 18:6a4db94011d3 | 19 | * |
sahilmgandhi | 18:6a4db94011d3 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
sahilmgandhi | 18:6a4db94011d3 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
sahilmgandhi | 18:6a4db94011d3 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
sahilmgandhi | 18:6a4db94011d3 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
sahilmgandhi | 18:6a4db94011d3 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
sahilmgandhi | 18:6a4db94011d3 | 25 | * @endinternal |
sahilmgandhi | 18:6a4db94011d3 | 26 | * |
sahilmgandhi | 18:6a4db94011d3 | 27 | * @ingroup i2c_ipc7208 |
sahilmgandhi | 18:6a4db94011d3 | 28 | * |
sahilmgandhi | 18:6a4db94011d3 | 29 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 30 | * <p> |
sahilmgandhi | 18:6a4db94011d3 | 31 | * I2C IPC 7208 HW register map description |
sahilmgandhi | 18:6a4db94011d3 | 32 | * </p> |
sahilmgandhi | 18:6a4db94011d3 | 33 | * |
sahilmgandhi | 18:6a4db94011d3 | 34 | * <h1> Reference document(s) </h1> |
sahilmgandhi | 18:6a4db94011d3 | 35 | * <p> |
sahilmgandhi | 18:6a4db94011d3 | 36 | * <a href="../pdf/IPC7208_I2C_APB_DS_v1P3.pdf" target="_blank"> |
sahilmgandhi | 18:6a4db94011d3 | 37 | * IPC7208 APB I2C Master Design Specification v1.3 </a> |
sahilmgandhi | 18:6a4db94011d3 | 38 | * </p> |
sahilmgandhi | 18:6a4db94011d3 | 39 | */ |
sahilmgandhi | 18:6a4db94011d3 | 40 | |
sahilmgandhi | 18:6a4db94011d3 | 41 | #if defined ( __CC_ARM ) |
sahilmgandhi | 18:6a4db94011d3 | 42 | #pragma anon_unions |
sahilmgandhi | 18:6a4db94011d3 | 43 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 44 | |
sahilmgandhi | 18:6a4db94011d3 | 45 | #ifndef I2C_IPC7208_MAP_H_ |
sahilmgandhi | 18:6a4db94011d3 | 46 | #define I2C_IPC7208_MAP_H_ |
sahilmgandhi | 18:6a4db94011d3 | 47 | |
sahilmgandhi | 18:6a4db94011d3 | 48 | #include "architecture.h" |
sahilmgandhi | 18:6a4db94011d3 | 49 | |
sahilmgandhi | 18:6a4db94011d3 | 50 | /** I2C HW Structure Overlay */ |
sahilmgandhi | 18:6a4db94011d3 | 51 | typedef struct { |
sahilmgandhi | 18:6a4db94011d3 | 52 | union { |
sahilmgandhi | 18:6a4db94011d3 | 53 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 54 | __IO uint32_t CMD_FIFO_EMPTY :1; /**< 1 = Command FIFO is empty , 0 = Command FIFO is empty */ |
sahilmgandhi | 18:6a4db94011d3 | 55 | __IO uint32_t RD_FIFO_NOT_EMPTY :1; /**< 0 = Read data is not ready , 1 = Read data is ready */ |
sahilmgandhi | 18:6a4db94011d3 | 56 | __IO uint32_t I2C_BUS_ERR :1; /**< 0 = No buss error occurred , 1 = buss error */ |
sahilmgandhi | 18:6a4db94011d3 | 57 | __IO uint32_t RD_FIFO_UFL :1; /**< 0 = Read data FIFO is not underflowed , 1 = Read data FIFO is underflowed */ |
sahilmgandhi | 18:6a4db94011d3 | 58 | __IO uint32_t CMD_FIFO_OFL :1;/**< 0 = Command FIFO is not overflowed 1 = Command FIFO is overflowed */ |
sahilmgandhi | 18:6a4db94011d3 | 59 | __IO uint32_t CMD_FIFO_FULL :1; /**< 0 = Command FIFO not full , 1 = Command FIFO full */ |
sahilmgandhi | 18:6a4db94011d3 | 60 | __IO uint32_t PAD :2; /**< Reserved . Always reads back 0. */ |
sahilmgandhi | 18:6a4db94011d3 | 61 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 62 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 63 | } STATUS; |
sahilmgandhi | 18:6a4db94011d3 | 64 | __IO uint32_t RD_FIFO_REG;/**< Data from the I2C Slave to be read by the processor. */ |
sahilmgandhi | 18:6a4db94011d3 | 65 | __IO uint32_t CMD_REG; /**< I2C Command Programming interface */ |
sahilmgandhi | 18:6a4db94011d3 | 66 | union { |
sahilmgandhi | 18:6a4db94011d3 | 67 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 68 | __IO uint32_t CMD_FIFO_INT :1; /**< Command FIFO empty interrupt : 0 = disable , 1 = enable */ |
sahilmgandhi | 18:6a4db94011d3 | 69 | __IO uint32_t RD_FIFO_INT :1; /**< Read Data FIFO Not Empty Interrupt : 0 = disable , 1 = enable */ |
sahilmgandhi | 18:6a4db94011d3 | 70 | __IO uint32_t I2C_ERR_INT :1; /**< I2C Error Interrupt : 0 = disable , 1 = enable */ |
sahilmgandhi | 18:6a4db94011d3 | 71 | // __IO uint32_t PAD :4; /**< Reserved. Writes have no effect; Read as 0x00. */ |
sahilmgandhi | 18:6a4db94011d3 | 72 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 73 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 74 | } IER; |
sahilmgandhi | 18:6a4db94011d3 | 75 | union { |
sahilmgandhi | 18:6a4db94011d3 | 76 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 77 | __IO uint32_t CD_VAL :5; /**< I2C APB Clock Divider Value (low 5 bits). */ |
sahilmgandhi | 18:6a4db94011d3 | 78 | __IO uint32_t I2C_APB_CD_EN :1; /**< 0 = I2C clock divider disable 1 = I2C clock divider enable */ |
sahilmgandhi | 18:6a4db94011d3 | 79 | __IO uint32_t I2C_CLK_SRC :1; /**< I2C clock source : 0 = external clock , 1 = APB clock */ |
sahilmgandhi | 18:6a4db94011d3 | 80 | __IO uint32_t I2C_MODULE_EN :1; /**< 0 = I2C disable , 1 = I2C enable */ |
sahilmgandhi | 18:6a4db94011d3 | 81 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 82 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 83 | } CR; |
sahilmgandhi | 18:6a4db94011d3 | 84 | __IO uint32_t PRE_SCALE_REG; /* I2C APB Clock Divider Value (upper 8 bits). */ |
sahilmgandhi | 18:6a4db94011d3 | 85 | } I2cIpc7208Reg_t, *I2cIpc7208Reg_pt; |
sahilmgandhi | 18:6a4db94011d3 | 86 | |
sahilmgandhi | 18:6a4db94011d3 | 87 | #endif /* I2C_IPC7208_MAP_H_ */ |