Mouse code for the MacroRat
mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM4/drivers/efc/efc.h@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | * \file |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * \brief Embedded Flash Controller (EFC) driver for SAM. |
sahilmgandhi | 18:6a4db94011d3 | 5 | * |
sahilmgandhi | 18:6a4db94011d3 | 6 | * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved. |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * \asf_license_start |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * \page License |
sahilmgandhi | 18:6a4db94011d3 | 11 | * |
sahilmgandhi | 18:6a4db94011d3 | 12 | * Redistribution and use in source and binary forms, with or without |
sahilmgandhi | 18:6a4db94011d3 | 13 | * modification, are permitted provided that the following conditions are met: |
sahilmgandhi | 18:6a4db94011d3 | 14 | * |
sahilmgandhi | 18:6a4db94011d3 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 16 | * this list of conditions and the following disclaimer. |
sahilmgandhi | 18:6a4db94011d3 | 17 | * |
sahilmgandhi | 18:6a4db94011d3 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 19 | * this list of conditions and the following disclaimer in the documentation |
sahilmgandhi | 18:6a4db94011d3 | 20 | * and/or other materials provided with the distribution. |
sahilmgandhi | 18:6a4db94011d3 | 21 | * |
sahilmgandhi | 18:6a4db94011d3 | 22 | * 3. The name of Atmel may not be used to endorse or promote products derived |
sahilmgandhi | 18:6a4db94011d3 | 23 | * from this software without specific prior written permission. |
sahilmgandhi | 18:6a4db94011d3 | 24 | * |
sahilmgandhi | 18:6a4db94011d3 | 25 | * 4. This software may only be redistributed and used in connection with an |
sahilmgandhi | 18:6a4db94011d3 | 26 | * Atmel microcontroller product. |
sahilmgandhi | 18:6a4db94011d3 | 27 | * |
sahilmgandhi | 18:6a4db94011d3 | 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
sahilmgandhi | 18:6a4db94011d3 | 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
sahilmgandhi | 18:6a4db94011d3 | 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
sahilmgandhi | 18:6a4db94011d3 | 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
sahilmgandhi | 18:6a4db94011d3 | 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
sahilmgandhi | 18:6a4db94011d3 | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
sahilmgandhi | 18:6a4db94011d3 | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
sahilmgandhi | 18:6a4db94011d3 | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
sahilmgandhi | 18:6a4db94011d3 | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
sahilmgandhi | 18:6a4db94011d3 | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
sahilmgandhi | 18:6a4db94011d3 | 38 | * POSSIBILITY OF SUCH DAMAGE. |
sahilmgandhi | 18:6a4db94011d3 | 39 | * |
sahilmgandhi | 18:6a4db94011d3 | 40 | * \asf_license_stop |
sahilmgandhi | 18:6a4db94011d3 | 41 | * |
sahilmgandhi | 18:6a4db94011d3 | 42 | */ |
sahilmgandhi | 18:6a4db94011d3 | 43 | /* |
sahilmgandhi | 18:6a4db94011d3 | 44 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
sahilmgandhi | 18:6a4db94011d3 | 45 | */ |
sahilmgandhi | 18:6a4db94011d3 | 46 | |
sahilmgandhi | 18:6a4db94011d3 | 47 | #ifndef EFC_H_INCLUDED |
sahilmgandhi | 18:6a4db94011d3 | 48 | #define EFC_H_INCLUDED |
sahilmgandhi | 18:6a4db94011d3 | 49 | |
sahilmgandhi | 18:6a4db94011d3 | 50 | #include "compiler.h" |
sahilmgandhi | 18:6a4db94011d3 | 51 | |
sahilmgandhi | 18:6a4db94011d3 | 52 | /// @cond 0 |
sahilmgandhi | 18:6a4db94011d3 | 53 | /**INDENT-OFF**/ |
sahilmgandhi | 18:6a4db94011d3 | 54 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 55 | extern "C" { |
sahilmgandhi | 18:6a4db94011d3 | 56 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 57 | /**INDENT-ON**/ |
sahilmgandhi | 18:6a4db94011d3 | 58 | /// @endcond |
sahilmgandhi | 18:6a4db94011d3 | 59 | |
sahilmgandhi | 18:6a4db94011d3 | 60 | /*! \name EFC return codes */ |
sahilmgandhi | 18:6a4db94011d3 | 61 | //! @{ |
sahilmgandhi | 18:6a4db94011d3 | 62 | typedef enum efc_rc { |
sahilmgandhi | 18:6a4db94011d3 | 63 | EFC_RC_OK = 0, //!< Operation OK |
sahilmgandhi | 18:6a4db94011d3 | 64 | EFC_RC_YES = 0, //!< Yes |
sahilmgandhi | 18:6a4db94011d3 | 65 | EFC_RC_NO = 1, //!< No |
sahilmgandhi | 18:6a4db94011d3 | 66 | EFC_RC_ERROR = 1, //!< General error |
sahilmgandhi | 18:6a4db94011d3 | 67 | EFC_RC_INVALID, //!< Invalid argument input |
sahilmgandhi | 18:6a4db94011d3 | 68 | EFC_RC_NOT_SUPPORT = 0xFFFFFFFF //!< Operation is not supported |
sahilmgandhi | 18:6a4db94011d3 | 69 | } efc_rc_t; |
sahilmgandhi | 18:6a4db94011d3 | 70 | //! @} |
sahilmgandhi | 18:6a4db94011d3 | 71 | |
sahilmgandhi | 18:6a4db94011d3 | 72 | /*! \name EFC command */ |
sahilmgandhi | 18:6a4db94011d3 | 73 | //! @{ |
sahilmgandhi | 18:6a4db94011d3 | 74 | #define EFC_FCMD_GETD 0x00 //!< Get Flash Descriptor |
sahilmgandhi | 18:6a4db94011d3 | 75 | #define EFC_FCMD_WP 0x01 //!< Write page |
sahilmgandhi | 18:6a4db94011d3 | 76 | #define EFC_FCMD_WPL 0x02 //!< Write page and lock |
sahilmgandhi | 18:6a4db94011d3 | 77 | #define EFC_FCMD_EWP 0x03 //!< Erase page and write page |
sahilmgandhi | 18:6a4db94011d3 | 78 | #define EFC_FCMD_EWPL 0x04 //!< Erase page and write page then lock |
sahilmgandhi | 18:6a4db94011d3 | 79 | #define EFC_FCMD_EA 0x05 //!< Erase all |
sahilmgandhi | 18:6a4db94011d3 | 80 | #if (SAM3SD8) |
sahilmgandhi | 18:6a4db94011d3 | 81 | #define EFC_FCMD_EPL 0x06 //!< Erase plane |
sahilmgandhi | 18:6a4db94011d3 | 82 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 83 | #if (SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || \ |
sahilmgandhi | 18:6a4db94011d3 | 84 | SAMV71 || SAMV70 || SAMS70 || SAME70) |
sahilmgandhi | 18:6a4db94011d3 | 85 | #define EFC_FCMD_EPA 0x07 //!< Erase pages |
sahilmgandhi | 18:6a4db94011d3 | 86 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 87 | #define EFC_FCMD_SLB 0x08 //!< Set Lock Bit |
sahilmgandhi | 18:6a4db94011d3 | 88 | #define EFC_FCMD_CLB 0x09 //!< Clear Lock Bit |
sahilmgandhi | 18:6a4db94011d3 | 89 | #define EFC_FCMD_GLB 0x0A //!< Get Lock Bit |
sahilmgandhi | 18:6a4db94011d3 | 90 | #define EFC_FCMD_SGPB 0x0B //!< Set GPNVM Bit |
sahilmgandhi | 18:6a4db94011d3 | 91 | #define EFC_FCMD_CGPB 0x0C //!< Clear GPNVM Bit |
sahilmgandhi | 18:6a4db94011d3 | 92 | #define EFC_FCMD_GGPB 0x0D //!< Get GPNVM Bit |
sahilmgandhi | 18:6a4db94011d3 | 93 | #define EFC_FCMD_STUI 0x0E //!< Start unique ID |
sahilmgandhi | 18:6a4db94011d3 | 94 | #define EFC_FCMD_SPUI 0x0F //!< Stop unique ID |
sahilmgandhi | 18:6a4db94011d3 | 95 | #if (!SAM3U && !SAM3SD8 && !SAM3S8) |
sahilmgandhi | 18:6a4db94011d3 | 96 | #define EFC_FCMD_GCALB 0x10 //!< Get CALIB Bit |
sahilmgandhi | 18:6a4db94011d3 | 97 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 98 | #if (SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || \ |
sahilmgandhi | 18:6a4db94011d3 | 99 | SAMV71 || SAMV70 || SAMS70 || SAME70) |
sahilmgandhi | 18:6a4db94011d3 | 100 | #define EFC_FCMD_ES 0x11 //!< Erase sector |
sahilmgandhi | 18:6a4db94011d3 | 101 | #define EFC_FCMD_WUS 0x12 //!< Write user signature |
sahilmgandhi | 18:6a4db94011d3 | 102 | #define EFC_FCMD_EUS 0x13 //!< Erase user signature |
sahilmgandhi | 18:6a4db94011d3 | 103 | #define EFC_FCMD_STUS 0x14 //!< Start read user signature |
sahilmgandhi | 18:6a4db94011d3 | 104 | #define EFC_FCMD_SPUS 0x15 //!< Stop read user signature |
sahilmgandhi | 18:6a4db94011d3 | 105 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 106 | //! @} |
sahilmgandhi | 18:6a4db94011d3 | 107 | |
sahilmgandhi | 18:6a4db94011d3 | 108 | /*! The IAP function entry address */ |
sahilmgandhi | 18:6a4db94011d3 | 109 | #define CHIP_FLASH_IAP_ADDRESS (IROM_ADDR + 8) |
sahilmgandhi | 18:6a4db94011d3 | 110 | |
sahilmgandhi | 18:6a4db94011d3 | 111 | /*! \name EFC access mode */ |
sahilmgandhi | 18:6a4db94011d3 | 112 | //! @{ |
sahilmgandhi | 18:6a4db94011d3 | 113 | #define EFC_ACCESS_MODE_128 0 |
sahilmgandhi | 18:6a4db94011d3 | 114 | #define EFC_ACCESS_MODE_64 EEFC_FMR_FAM |
sahilmgandhi | 18:6a4db94011d3 | 115 | //! @} |
sahilmgandhi | 18:6a4db94011d3 | 116 | |
sahilmgandhi | 18:6a4db94011d3 | 117 | uint32_t efc_init(Efc *p_efc, uint32_t ul_access_mode, uint32_t ul_fws); |
sahilmgandhi | 18:6a4db94011d3 | 118 | #if (SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || \ |
sahilmgandhi | 18:6a4db94011d3 | 119 | SAMV71 || SAMV70 || SAMS70 || SAME70) |
sahilmgandhi | 18:6a4db94011d3 | 120 | void efc_enable_cloe(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 121 | void efc_disable_cloe(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 122 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 123 | void efc_enable_frdy_interrupt(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 124 | void efc_disable_frdy_interrupt(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 125 | #if (SAMV71 || SAMV70 || SAMS70 || SAME70) |
sahilmgandhi | 18:6a4db94011d3 | 126 | void efc_enable_write_protection(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 127 | void efc_disable_write_protection(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 128 | #else |
sahilmgandhi | 18:6a4db94011d3 | 129 | void efc_set_flash_access_mode(Efc *p_efc, uint32_t ul_mode); |
sahilmgandhi | 18:6a4db94011d3 | 130 | uint32_t efc_get_flash_access_mode(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 131 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 132 | void efc_set_wait_state(Efc *p_efc, uint32_t ul_fws); |
sahilmgandhi | 18:6a4db94011d3 | 133 | uint32_t efc_get_wait_state(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 134 | uint32_t efc_perform_command(Efc *p_efc, uint32_t ul_command, |
sahilmgandhi | 18:6a4db94011d3 | 135 | uint32_t ul_argument); |
sahilmgandhi | 18:6a4db94011d3 | 136 | uint32_t efc_get_status(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 137 | uint32_t efc_get_result(Efc *p_efc); |
sahilmgandhi | 18:6a4db94011d3 | 138 | uint32_t efc_perform_read_sequence(Efc *p_efc, |
sahilmgandhi | 18:6a4db94011d3 | 139 | uint32_t ul_cmd_st, uint32_t ul_cmd_sp, |
sahilmgandhi | 18:6a4db94011d3 | 140 | uint32_t *p_ul_buf, uint32_t ul_size); |
sahilmgandhi | 18:6a4db94011d3 | 141 | |
sahilmgandhi | 18:6a4db94011d3 | 142 | /// @cond 0 |
sahilmgandhi | 18:6a4db94011d3 | 143 | /**INDENT-OFF**/ |
sahilmgandhi | 18:6a4db94011d3 | 144 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 145 | } |
sahilmgandhi | 18:6a4db94011d3 | 146 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 147 | /**INDENT-ON**/ |
sahilmgandhi | 18:6a4db94011d3 | 148 | /// @endcond |
sahilmgandhi | 18:6a4db94011d3 | 149 | |
sahilmgandhi | 18:6a4db94011d3 | 150 | #endif /* EFC_H_INCLUDED */ |