MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/spi.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

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sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file spi.h
sahilmgandhi 18:6a4db94011d3 4 * @brief Inlcude file of a SPI master driver
sahilmgandhi 18:6a4db94011d3 5 * @internal
sahilmgandhi 18:6a4db94011d3 6 * @author ON Semiconductor
sahilmgandhi 18:6a4db94011d3 7 * @version $Rev: $
sahilmgandhi 18:6a4db94011d3 8 * @date $Date: 2016-02-05 $
sahilmgandhi 18:6a4db94011d3 9 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
sahilmgandhi 18:6a4db94011d3 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
sahilmgandhi 18:6a4db94011d3 12 * under limited terms and conditions. The terms and conditions pertaining to the software
sahilmgandhi 18:6a4db94011d3 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
sahilmgandhi 18:6a4db94011d3 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
sahilmgandhi 18:6a4db94011d3 15 * if applicable the software license agreement. Do not use this software and/or
sahilmgandhi 18:6a4db94011d3 16 * documentation unless you have carefully read and you agree to the limited terms and
sahilmgandhi 18:6a4db94011d3 17 * conditions. By using this software and/or documentation, you agree to the limited
sahilmgandhi 18:6a4db94011d3 18 * terms and conditions.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
sahilmgandhi 18:6a4db94011d3 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
sahilmgandhi 18:6a4db94011d3 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
sahilmgandhi 18:6a4db94011d3 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
sahilmgandhi 18:6a4db94011d3 25 * @endinternal
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * @ingroup spi_h
sahilmgandhi 18:6a4db94011d3 28 *
sahilmgandhi 18:6a4db94011d3 29 * @details
sahilmgandhi 18:6a4db94011d3 30 *
sahilmgandhi 18:6a4db94011d3 31 */
sahilmgandhi 18:6a4db94011d3 32 #ifndef SPI_H_
sahilmgandhi 18:6a4db94011d3 33 #define SPI_H_
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 #include "device.h"
sahilmgandhi 18:6a4db94011d3 36 #include "spi_api.h"
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 #if DEVICE_SPI
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 41 extern "C" {
sahilmgandhi 18:6a4db94011d3 42 #endif
sahilmgandhi 18:6a4db94011d3 43
sahilmgandhi 18:6a4db94011d3 44 /* Miscellaneous I/O and control operations codes */
sahilmgandhi 18:6a4db94011d3 45 #define SPI_IPC7207_IOCTL_GET_SLAVE_SELECT (0x1) /**< <b>Ioctl request code</b>: Reading slaveSelect register */
sahilmgandhi 18:6a4db94011d3 46 #define SPI_IPC7207_IOCTL_SET_SLAVE_SELECT (0x2) /**< <b>Ioctl request code</b>: Setting slaveSelect register */
sahilmgandhi 18:6a4db94011d3 47 #define SPI_IPC7207_IOCTL_FLUSH (0x3) /**< <b>Ioctl request code</b>: Flushin FIFOs and serial shift registers */
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /* Control register bit positions */
sahilmgandhi 18:6a4db94011d3 50 #define SPI_WORD_WIDTH_BIT_POS 6
sahilmgandhi 18:6a4db94011d3 51 #define SPI_SLAVE_MASTER_BIT_POS 5
sahilmgandhi 18:6a4db94011d3 52 #define SPI_CPOL_BIT_POS 4
sahilmgandhi 18:6a4db94011d3 53 #define SPI_CPHA_BIT_POS 3
sahilmgandhi 18:6a4db94011d3 54 #define SPI_ENDIAN_BIT_POS 2
sahilmgandhi 18:6a4db94011d3 55 #define SPI_SAMPLE_EDGE_BIT_POS 1
sahilmgandhi 18:6a4db94011d3 56 #define SPI_PORT_ENABLE_BIT_POS 0
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 /* COntrol register bits */
sahilmgandhi 18:6a4db94011d3 59 #define SPI_ENDIAN_MSB_FIRST 1
sahilmgandhi 18:6a4db94011d3 60 #define SPI_CPOL_IDLE_LOW 0
sahilmgandhi 18:6a4db94011d3 61 #define SPI_CPHA_BEFORE_1ST_EDGE 0
sahilmgandhi 18:6a4db94011d3 62 #define SPI_MASTER_MODE 1
sahilmgandhi 18:6a4db94011d3 63 #define SPI_WORD_WIDTH_8_BITS 0
sahilmgandhi 18:6a4db94011d3 64 #define SPI_SAMPLE_OPP_CLK_EDGE_DATA 0
sahilmgandhi 18:6a4db94011d3 65 #define SPI_SLAVE_SELECT_NORM_BEHAVE 0
sahilmgandhi 18:6a4db94011d3 66 #define SPI_PORT_ENABLE 1
sahilmgandhi 18:6a4db94011d3 67
sahilmgandhi 18:6a4db94011d3 68 #define SPI_SLAVE_SELECT_DEFAULT 0x10
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 #define SPI_DEFAULT_CONFIG 0x25
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 #define SPI_DEFAULT_SPEED 1000000
sahilmgandhi 18:6a4db94011d3 73 #define SPI_BYTE_MASK 0xFF
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 extern void fSpiInit(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
sahilmgandhi 18:6a4db94011d3 76 extern void fSpiClose(spi_t *obj);
sahilmgandhi 18:6a4db94011d3 77 extern int fSpiWriteB(spi_t *obj, uint32_t const buf);
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 80 }
sahilmgandhi 18:6a4db94011d3 81 #endif /* __cplusplus */
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 #endif /* DEVICE_SPI */
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 #endif /* SPI_H_ */