MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/gpio.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file gpio.h
sahilmgandhi 18:6a4db94011d3 4 * @brief (API) Public header of GPIO driver
sahilmgandhi 18:6a4db94011d3 5 * @internal
sahilmgandhi 18:6a4db94011d3 6 * @author ON Semiconductor
sahilmgandhi 18:6a4db94011d3 7 * $Rev: 3724 $
sahilmgandhi 18:6a4db94011d3 8 * $Date: 2015-09-14 14:35:42 +0530 (Mon, 14 Sep 2015) $
sahilmgandhi 18:6a4db94011d3 9 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
sahilmgandhi 18:6a4db94011d3 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
sahilmgandhi 18:6a4db94011d3 12 * under limited terms and conditions. The terms and conditions pertaining to the software
sahilmgandhi 18:6a4db94011d3 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
sahilmgandhi 18:6a4db94011d3 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
sahilmgandhi 18:6a4db94011d3 15 * if applicable the software license agreement. Do not use this software and/or
sahilmgandhi 18:6a4db94011d3 16 * documentation unless you have carefully read and you agree to the limited terms and
sahilmgandhi 18:6a4db94011d3 17 * conditions. By using this software and/or documentation, you agree to the limited
sahilmgandhi 18:6a4db94011d3 18 * terms and conditions.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
sahilmgandhi 18:6a4db94011d3 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
sahilmgandhi 18:6a4db94011d3 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
sahilmgandhi 18:6a4db94011d3 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
sahilmgandhi 18:6a4db94011d3 25 * @endinternal
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * @ingroup gpio
sahilmgandhi 18:6a4db94011d3 28 *
sahilmgandhi 18:6a4db94011d3 29 * @details
sahilmgandhi 18:6a4db94011d3 30 *
sahilmgandhi 18:6a4db94011d3 31 * <h1> General description </h1>
sahilmgandhi 18:6a4db94011d3 32 * <p>
sahilmgandhi 18:6a4db94011d3 33 * The APB GPIO is a configurable module allowing the use of 14 I/O lines.
sahilmgandhi 18:6a4db94011d3 34 * Each line can be configured independently.
sahilmgandhi 18:6a4db94011d3 35 * The GPIO module supports a wide variety of features concerning interrupts,
sahilmgandhi 18:6a4db94011d3 36 * which can be triggered by a low level, high level, positive or negative edge,
sahilmgandhi 18:6a4db94011d3 37 * or both edges.
sahilmgandhi 18:6a4db94011d3 38 * </p>
sahilmgandhi 18:6a4db94011d3 39 *
sahilmgandhi 18:6a4db94011d3 40 */
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifndef GPIO_H_
sahilmgandhi 18:6a4db94011d3 43 #define GPIO_H_
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 46 extern "C" {
sahilmgandhi 18:6a4db94011d3 47 #endif
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 #include "memory_map.h"
sahilmgandhi 18:6a4db94011d3 50 #include "gpio_map.h"
sahilmgandhi 18:6a4db94011d3 51 #include "pad_map.h"
sahilmgandhi 18:6a4db94011d3 52 #include "crossbar.h"
sahilmgandhi 18:6a4db94011d3 53 #include "clock.h"
sahilmgandhi 18:6a4db94011d3 54 #include "pad.h"
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /** output configuration push/pull */
sahilmgandhi 18:6a4db94011d3 58 #define PAD_OUTCFG_PUSHPULL (uint8_t)0x00
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 /** output configuration open drain */
sahilmgandhi 18:6a4db94011d3 61 #define PAD_OOUTCFG_OPENDRAIN (uint8_t)0x01
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 /** no pull up nor pull down */
sahilmgandhi 18:6a4db94011d3 64 #define PAD_PULL_NONE (uint8_t)0x01
sahilmgandhi 18:6a4db94011d3 65
sahilmgandhi 18:6a4db94011d3 66 /** pull down */
sahilmgandhi 18:6a4db94011d3 67 #define PAD_PULL_DOWN (uint8_t)0x00
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 /** pull up */
sahilmgandhi 18:6a4db94011d3 70 #define PAD_PULL_UP (uint8_t)0x03
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 /* Number of DIO lines supported by NCS36510 */
sahilmgandhi 18:6a4db94011d3 73 #define NUMBER_OF_GPIO ((uint8_t)0x12)
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 /* All DIO lines set to 1 */
sahilmgandhi 18:6a4db94011d3 76 #define IO_ALL ((uint32_t)0x3FFFF)
sahilmgandhi 18:6a4db94011d3 77 #define IO_NONE ((uint32_t)0x00000)
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 /* Gpio handler */
sahilmgandhi 18:6a4db94011d3 80 void fGpioHandler(void);
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 83 }
sahilmgandhi 18:6a4db94011d3 84 #endif
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 #endif /* GPIO_H_ */