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Fork of MPU9150_DMP by Chris Pepper

Committer:
p3p
Date:
Sun Aug 31 12:52:29 2014 +0000
Revision:
0:74f0ae286b03
Child:
1:8ff0beb54dd4
MPU9150 api using its DMP for quaternions

Who changed what in which revision?

UserRevisionLine numberNew contents of line
p3p 0:74f0ae286b03 1 #ifndef MPU9150_INCLUDE
p3p 0:74f0ae286b03 2 #define MPU9150_INCLUDE
p3p 0:74f0ae286b03 3
p3p 0:74f0ae286b03 4 #include "mbed.h"
p3p 0:74f0ae286b03 5 #include "registers.h"
p3p 0:74f0ae286b03 6 #include "dmpdata.h"
p3p 0:74f0ae286b03 7 //https://github.com/sparkfun/MPU-9150_Breakout/blob/master/firmware/MPU6050/MPU6050_9Axis_MotionApps41.h
p3p 0:74f0ae286b03 8 extern Serial debug;
p3p 0:74f0ae286b03 9
p3p 0:74f0ae286b03 10 class MPU9150{
p3p 0:74f0ae286b03 11 public:
p3p 0:74f0ae286b03 12 MPU9150(PinName scl, PinName sda, PinName interrupt, bool secondary_addr = false):i2c(sda, scl){
p3p 0:74f0ae286b03 13 device_address = MPU6050_DEFAULT_ADDRESS;
p3p 0:74f0ae286b03 14 read_errors = 0;
p3p 0:74f0ae286b03 15 write_errors = 0;
p3p 0:74f0ae286b03 16 if(secondary_addr){
p3p 0:74f0ae286b03 17 device_address = MPU6050_ADDRESS_AD0_HIGH;
p3p 0:74f0ae286b03 18 }
p3p 0:74f0ae286b03 19
p3p 0:74f0ae286b03 20 // i2c.frequency(400000);
p3p 0:74f0ae286b03 21 i2c.frequency(100000);
p3p 0:74f0ae286b03 22 }
p3p 0:74f0ae286b03 23 ~MPU9150(){}
p3p 0:74f0ae286b03 24
p3p 0:74f0ae286b03 25 bool getBit(char reg_addr, uint8_t bit);
p3p 0:74f0ae286b03 26 int8_t get8(char reg_addr);
p3p 0:74f0ae286b03 27 int16_t get16(char reg_addr);
p3p 0:74f0ae286b03 28 int16_t get16L(char reg_addr);
p3p 0:74f0ae286b03 29
p3p 0:74f0ae286b03 30 bool read(char reg_addr, char* data);
p3p 0:74f0ae286b03 31 bool read(char reg_addr, char* data, int length);
p3p 0:74f0ae286b03 32 bool readBit(char reg_addr, uint8_t bit_start, uint8_t *data);
p3p 0:74f0ae286b03 33 bool readBits(char reg_addr, uint8_t bit_start, uint8_t length, uint8_t *data);
p3p 0:74f0ae286b03 34
p3p 0:74f0ae286b03 35 bool write(char reg_addr, char data);
p3p 0:74f0ae286b03 36 bool write(char reg_addr, char* data, int length);
p3p 0:74f0ae286b03 37 bool writeBit(char reg_addr, uint8_t bit, bool value);
p3p 0:74f0ae286b03 38 bool writeBits(char reg_addr, uint8_t bit_start, uint8_t length, uint8_t data);
p3p 0:74f0ae286b03 39
p3p 0:74f0ae286b03 40 uint8_t getDeviceID();
p3p 0:74f0ae286b03 41 bool isReady();
p3p 0:74f0ae286b03 42 void initialise();
p3p 0:74f0ae286b03 43 void initialiseMagnetometer();
p3p 0:74f0ae286b03 44 void initialiseDMP();
p3p 0:74f0ae286b03 45
p3p 0:74f0ae286b03 46
p3p 0:74f0ae286b03 47 //PWR_MGMT_1 Control Register
p3p 0:74f0ae286b03 48 void reset();
p3p 0:74f0ae286b03 49 void sleep(bool state);
p3p 0:74f0ae286b03 50 void cycleMode(bool state);
p3p 0:74f0ae286b03 51 void disableTemperatureSensor(bool state);
p3p 0:74f0ae286b03 52 void clockSelect(uint8_t clk);
p3p 0:74f0ae286b03 53
p3p 0:74f0ae286b03 54 //PWR_MGMT_2 Control Register
p3p 0:74f0ae286b03 55 void setCycleWakeFrequency(uint8_t value);
p3p 0:74f0ae286b03 56 void setStandbyAccX( bool value );
p3p 0:74f0ae286b03 57 void setStandbyAccY( bool value );
p3p 0:74f0ae286b03 58 void setStandbyAccZ( bool value );
p3p 0:74f0ae286b03 59 void setStandbyGyroX( bool value );
p3p 0:74f0ae286b03 60 void setStandbyGyroY( bool value );
p3p 0:74f0ae286b03 61 void setStandbyGyroZ( bool value );
p3p 0:74f0ae286b03 62
p3p 0:74f0ae286b03 63 //SMPRT_DI Sample Rate Divider
p3p 0:74f0ae286b03 64 void setSampleRateDivider(uint8_t value);
p3p 0:74f0ae286b03 65
p3p 0:74f0ae286b03 66 //CONFIG
p3p 0:74f0ae286b03 67 void setExternalFrameSync(uint8_t value);
p3p 0:74f0ae286b03 68 void setDigitalLowPassFilter(uint8_t value);
p3p 0:74f0ae286b03 69
p3p 0:74f0ae286b03 70 //GYRO_CONFIG
p3p 0:74f0ae286b03 71 void setGyroSelfTest(bool value);
p3p 0:74f0ae286b03 72 void setGyroFullScaleRange(uint8_t value);
p3p 0:74f0ae286b03 73
p3p 0:74f0ae286b03 74 //ACCEL_CONFIG
p3p 0:74f0ae286b03 75 void setAccelSelfTest(bool value);
p3p 0:74f0ae286b03 76 void setAccelFullScaleRange(uint8_t value);
p3p 0:74f0ae286b03 77
p3p 0:74f0ae286b03 78 //FIFO_EN
p3p 0:74f0ae286b03 79 void setTemperatureFifo(bool value);
p3p 0:74f0ae286b03 80 void setGyroFifo(bool value);
p3p 0:74f0ae286b03 81 void setAccelFifo(bool value);
p3p 0:74f0ae286b03 82 void setSlave2Fifo(bool value);
p3p 0:74f0ae286b03 83 void setSlave1Fifo(bool value);
p3p 0:74f0ae286b03 84 void setSlave0Fifo(bool value);
p3p 0:74f0ae286b03 85
p3p 0:74f0ae286b03 86 //I2C_MST_CTRL
p3p 0:74f0ae286b03 87 void setMultiMaster(bool value);
p3p 0:74f0ae286b03 88 void setWaitForExternalSensor(bool value);
p3p 0:74f0ae286b03 89 void setSlave3Fifo(bool value);
p3p 0:74f0ae286b03 90 void setMasterStartStop(bool value);
p3p 0:74f0ae286b03 91 void setI2CMasterClock(uint8_t value);
p3p 0:74f0ae286b03 92
p3p 0:74f0ae286b03 93 //I2C_SLV0_ADDR
p3p 0:74f0ae286b03 94 void setI2cSlaveRW(uint8_t slave_id, bool value);
p3p 0:74f0ae286b03 95 void setI2cSlaveAddress(uint8_t slave_id, uint8_t value);
p3p 0:74f0ae286b03 96 //I2C_SLV0_REG,
p3p 0:74f0ae286b03 97 void setI2cSlaveRegister(uint8_t slave_id, uint8_t value);
p3p 0:74f0ae286b03 98 //I2C_SLV0_CTRL
p3p 0:74f0ae286b03 99 void setI2cSlaveEnable(uint8_t slave_id, bool value);
p3p 0:74f0ae286b03 100 void setI2cSlaveByteSwap(uint8_t slave_id, bool value);
p3p 0:74f0ae286b03 101 void setI2cSlaveRegDisable(uint8_t slave_id, bool value);
p3p 0:74f0ae286b03 102 void setI2cSlaveByteGrouping(uint8_t slave_id, bool value);
p3p 0:74f0ae286b03 103 void setI2cSlaveTransactionLength(uint8_t slave_id, uint8_t value);
p3p 0:74f0ae286b03 104 //I2C_SLV0_DO
p3p 0:74f0ae286b03 105 void setI2cSlaveDataOut(uint8_t slave_id, uint8_t value);
p3p 0:74f0ae286b03 106 //I2C_MST_DELAY_CTRL
p3p 0:74f0ae286b03 107 void setI2cSlaveDelay(uint8_t slave_id, uint8_t value);
p3p 0:74f0ae286b03 108 void setI2cSlaveShadowDelay(uint8_t value) ;
p3p 0:74f0ae286b03 109 //Slave4 is different
p3p 0:74f0ae286b03 110 void setI2cSlave4RW( bool value);
p3p 0:74f0ae286b03 111 void setI2cSlave4Address( uint8_t value);
p3p 0:74f0ae286b03 112 void setI2cSlave4Register(uint8_t value);
p3p 0:74f0ae286b03 113 void setI2cSlave4DataOut(uint8_t value);
p3p 0:74f0ae286b03 114 void setI2cSlave4Enable(bool value);
p3p 0:74f0ae286b03 115 void setI2cSlave4IntEnable(bool value);
p3p 0:74f0ae286b03 116 void setI2cSlave4RegDisable(bool value);
p3p 0:74f0ae286b03 117 void setI2cMasterDelay(uint8_t value);
p3p 0:74f0ae286b03 118 uint8_t getI2cSlave4Di();
p3p 0:74f0ae286b03 119
p3p 0:74f0ae286b03 120 //I2C_MST_STATUS
p3p 0:74f0ae286b03 121 bool setI2cPassthrough();
p3p 0:74f0ae286b03 122 bool setI2cSlave4Done();
p3p 0:74f0ae286b03 123 bool setI2cLostArbitration();
p3p 0:74f0ae286b03 124 bool setI2cSlave0Nack();
p3p 0:74f0ae286b03 125 bool setI2cSlave1Nack();
p3p 0:74f0ae286b03 126 bool setI2cSlave2Nack();
p3p 0:74f0ae286b03 127 bool setI2cSlave3Nack();
p3p 0:74f0ae286b03 128 bool setI2cSlave4Nack();
p3p 0:74f0ae286b03 129
p3p 0:74f0ae286b03 130 //INT_PIN_CFG
p3p 0:74f0ae286b03 131 void setInterruptActiveLow(bool value);
p3p 0:74f0ae286b03 132 void setInterruptOpenDrain(bool value);
p3p 0:74f0ae286b03 133 void setInterruptLatch(bool value);
p3p 0:74f0ae286b03 134 void setInterruptAnyReadClear(bool value);
p3p 0:74f0ae286b03 135 void setFsyncInterruptActiveLow(bool value);
p3p 0:74f0ae286b03 136 void setFsyncInterruptEnable(bool value);
p3p 0:74f0ae286b03 137 void setI2cAuxBypassEnable(bool value);
p3p 0:74f0ae286b03 138
p3p 0:74f0ae286b03 139 //INT_ENABLE
p3p 0:74f0ae286b03 140 void setInterruptFifoOverflowEnable(bool value);
p3p 0:74f0ae286b03 141 void setInterruptMasterEnable(bool value);
p3p 0:74f0ae286b03 142 void setInterruptDataReadyEnable(bool value);
p3p 0:74f0ae286b03 143
p3p 0:74f0ae286b03 144 //INT_STATUS
p3p 0:74f0ae286b03 145 bool getInterruptFifoOverflow();
p3p 0:74f0ae286b03 146 bool getInterruptMaster();
p3p 0:74f0ae286b03 147 bool getInterruptDataReady();
p3p 0:74f0ae286b03 148 uint8_t getInterruptStatus();
p3p 0:74f0ae286b03 149
p3p 0:74f0ae286b03 150 //SIGNAL_PATH_RESET
p3p 0:74f0ae286b03 151 void resetGyroSignalPath();
p3p 0:74f0ae286b03 152 void resetAccelSignalPath();
p3p 0:74f0ae286b03 153 void resetTempSignalPath();
p3p 0:74f0ae286b03 154
p3p 0:74f0ae286b03 155 //USER_CTRL
p3p 0:74f0ae286b03 156 void setEnableFifo(bool value);
p3p 0:74f0ae286b03 157 void setI2cMasterEnable(bool value);
p3p 0:74f0ae286b03 158 void setFifoReset(bool value);
p3p 0:74f0ae286b03 159 void setI2cMasterReset(bool value);
p3p 0:74f0ae286b03 160 void setFullSensorReset(bool value);
p3p 0:74f0ae286b03 161
p3p 0:74f0ae286b03 162 //FIFO_COUNT_H and FIFO_COUNT_L
p3p 0:74f0ae286b03 163 int16_t getFifoCount();
p3p 0:74f0ae286b03 164
p3p 0:74f0ae286b03 165 //FIFO_R_W
p3p 0:74f0ae286b03 166 bool getFifoBuffer(char* buffer, int16_t length);
p3p 0:74f0ae286b03 167
p3p 0:74f0ae286b03 168 //UNDOCUMENTED
p3p 0:74f0ae286b03 169 // XG_OFFS_TC
p3p 0:74f0ae286b03 170 uint8_t getOTPBankValid();
p3p 0:74f0ae286b03 171
p3p 0:74f0ae286b03 172 //INT_ENABLE
p3p 0:74f0ae286b03 173 void setIntPLLReadyEnabled(bool value);
p3p 0:74f0ae286b03 174 void setIntDMPEnabled(bool value);
p3p 0:74f0ae286b03 175
p3p 0:74f0ae286b03 176 // INT_STATUS
p3p 0:74f0ae286b03 177 bool getIntPLLReadyStatus();
p3p 0:74f0ae286b03 178 bool getIntDMPStatus();
p3p 0:74f0ae286b03 179
p3p 0:74f0ae286b03 180 // USER_CTRL
p3p 0:74f0ae286b03 181 bool getDMPEnabled();
p3p 0:74f0ae286b03 182 void setDMPEnabled(bool value);
p3p 0:74f0ae286b03 183 void resetDMP();
p3p 0:74f0ae286b03 184
p3p 0:74f0ae286b03 185 // BANK_SEL
p3p 0:74f0ae286b03 186 void setMemoryBank(uint8_t bank, bool prefetchEnabled=false, bool userBank=false);
p3p 0:74f0ae286b03 187
p3p 0:74f0ae286b03 188 // MEM_START_ADDR
p3p 0:74f0ae286b03 189 void setMemoryStartAddress(uint8_t address);
p3p 0:74f0ae286b03 190
p3p 0:74f0ae286b03 191 // MEM_R_W register
p3p 0:74f0ae286b03 192 uint8_t readMemoryByte();
p3p 0:74f0ae286b03 193 void writeMemoryByte(uint8_t value);
p3p 0:74f0ae286b03 194 void readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address);
p3p 0:74f0ae286b03 195 bool writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank = 0, uint8_t address = 0, bool verify = false);
p3p 0:74f0ae286b03 196 bool writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize);
p3p 0:74f0ae286b03 197
p3p 0:74f0ae286b03 198 // DMP_CFG_1
p3p 0:74f0ae286b03 199 uint8_t getDMPConfig1();
p3p 0:74f0ae286b03 200 void setDMPConfig1(uint8_t config);
p3p 0:74f0ae286b03 201
p3p 0:74f0ae286b03 202 // DMP_CFG_2
p3p 0:74f0ae286b03 203 uint8_t getDMPConfig2();
p3p 0:74f0ae286b03 204 void setDMPConfig2(uint8_t config);
p3p 0:74f0ae286b03 205
p3p 0:74f0ae286b03 206 I2C i2c;
p3p 0:74f0ae286b03 207 uint8_t device_address;
p3p 0:74f0ae286b03 208 uint32_t read_errors;
p3p 0:74f0ae286b03 209 uint32_t write_errors;
p3p 0:74f0ae286b03 210 };
p3p 0:74f0ae286b03 211
p3p 0:74f0ae286b03 212 #endif