Capstone / SX1272Lib

Library files for InAir9 module containing SX1272

Fork of SX1272Lib by Semtech

sx1272/sx1272-hal.cpp@8:d5d94fd59c24, 2017-11-13 (annotated)

Committer:
AMNoll
Date:
Mon Nov 13 23:15:40 2017 +0000
Revision:
8:d5d94fd59c24
Parent:
7:b988b60083a1 
fdsaf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mluis 0:45c4f0364ca4 1 /*
mluis 0:45c4f0364ca4 2 / _____) _ | |
mluis 0:45c4f0364ca4 3 ( (____ _____ ____ _| |_ _____ ____| |__
mluis 0:45c4f0364ca4 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
mluis 0:45c4f0364ca4 5 _____) ) ____| | | || |_| ____( (___| | | |
mluis 0:45c4f0364ca4 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
mluis 0:45c4f0364ca4 7 (C) 2015 Semtech
mluis 0:45c4f0364ca4 8
mluis 0:45c4f0364ca4 9 Description: -
mluis 0:45c4f0364ca4 10
mluis 0:45c4f0364ca4 11 License: Revised BSD License, see LICENSE.TXT file include in the project
mluis 0:45c4f0364ca4 12
mluis 0:45c4f0364ca4 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
mluis 0:45c4f0364ca4 14 */
mluis 0:45c4f0364ca4 15 #include "sx1272-hal.h"
mluis 0:45c4f0364ca4 16
mluis 7:b988b60083a1 17 #if defined ( TARGET_MOTE_L152RC )
mluis 7:b988b60083a1 18 /*
mluis 7:b988b60083a1 19 PD_2=0 PD_2=1
mluis 7:b988b60083a1 20 op PaB rfo rfo
mluis 7:b988b60083a1 21 0 4.6 18.5 27.0
mluis 7:b988b60083a1 22 1 5.6 21.1 28.1
mluis 7:b988b60083a1 23 2 6.7 23.3 29.1
mluis 7:b988b60083a1 24 3 7.7 25.3 30.1
mluis 7:b988b60083a1 25 4 8.8 26.2 30.7
mluis 7:b988b60083a1 26 5 9.8 27.3 31.2
mluis 7:b988b60083a1 27 6 10.7 28.1 31.6
mluis 7:b988b60083a1 28 7 11.7 28.6 32.2
mluis 7:b988b60083a1 29 8 12.8 29.2 32.4
mluis 7:b988b60083a1 30 9 13.7 29.9 32.9
mluis 7:b988b60083a1 31 10 14.7 30.5 33.1
mluis 7:b988b60083a1 32 11 15.6 30.8 33.4
mluis 7:b988b60083a1 33 12 16.4 30.9 33.6
mluis 7:b988b60083a1 34 13 17.1 31.0 33.7
mluis 7:b988b60083a1 35 14 17.8 31.1 33.7
mluis 7:b988b60083a1 36 15 18.4 31.1 33.7
mluis 7:b988b60083a1 37 */
mluis 7:b988b60083a1 38 // txpow: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
mluis 7:b988b60083a1 39 static const uint8_t PaBTable[20] = { 0, 0, 0, 0, 0, 1, 2, 3, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15 };
mluis 7:b988b60083a1 40
mluis 7:b988b60083a1 41 // txpow: 20 21 22 23 24 25 26 27 28 29 30
mluis 7:b988b60083a1 42 static const uint8_t RfoTable[11] = { 1, 1, 1, 2, 2, 3, 4, 5, 6, 8, 9 };
mluis 7:b988b60083a1 43
mluis 7:b988b60083a1 44 #endif
mluis 7:b988b60083a1 45
GregCr 2:cd1093b6676f 46 const RadioRegisters_t SX1272MB2xAS::RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE;
mluis 0:45c4f0364ca4 47
GregCr 2:cd1093b6676f 48 SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events,
mluis 0:45c4f0364ca4 49 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
mluis 0:45c4f0364ca4 50 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
mluis 0:45c4f0364ca4 51 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 52 PinName rfSwitchCntr1, PinName rfSwitchCntr2 )
dudmuck 1:b0372ef620d0 53 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 54 PinName txctl, PinName rxctl )
mluis 0:45c4f0364ca4 55 #else
mluis 0:45c4f0364ca4 56 PinName antSwitch )
mluis 0:45c4f0364ca4 57 #endif
mluis 0:45c4f0364ca4 58 : SX1272( events, mosi, miso, sclk, nss, reset, dio0, dio1, dio2, dio3, dio4, dio5 ),
mluis 0:45c4f0364ca4 59 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 60 RfSwitchCntr1( rfSwitchCntr1 ),
mluis 0:45c4f0364ca4 61 RfSwitchCntr2( rfSwitchCntr2 ),
mluis 7:b988b60083a1 62 PwrAmpCntr( PD_2 )
dudmuck 1:b0372ef620d0 63 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 64 TxCtl ( txctl ),
dudmuck 1:b0372ef620d0 65 RxCtl ( rxctl )
mluis 0:45c4f0364ca4 66 #else
mluis 0:45c4f0364ca4 67 AntSwitch( antSwitch ),
mluis 7:b988b60083a1 68 #if( defined ( TARGET_NUCLEO_L152RE ) ) || defined ( TARGET_NUCLEO_L476RG )
dudmuck 1:b0372ef620d0 69 Fake( D8 )
mluis 0:45c4f0364ca4 70 #else
mluis 0:45c4f0364ca4 71 Fake( A3 )
mluis 0:45c4f0364ca4 72 #endif
mluis 0:45c4f0364ca4 73 #endif
mluis 0:45c4f0364ca4 74 {
mluis 0:45c4f0364ca4 75 this->RadioEvents = events;
mluis 0:45c4f0364ca4 76
mluis 0:45c4f0364ca4 77 Reset( );
mluis 7:b988b60083a1 78
mluis 0:45c4f0364ca4 79 IoInit( );
mluis 7:b988b60083a1 80
mluis 0:45c4f0364ca4 81 SetOpMode( RF_OPMODE_SLEEP );
mluis 7:b988b60083a1 82
mluis 0:45c4f0364ca4 83 IoIrqInit( dioIrq );
mluis 7:b988b60083a1 84
mluis 0:45c4f0364ca4 85 RadioRegistersInit( );
mluis 0:45c4f0364ca4 86
mluis 0:45c4f0364ca4 87 SetModem( MODEM_FSK );
mluis 0:45c4f0364ca4 88
mluis 0:45c4f0364ca4 89 this->settings.State = RF_IDLE ;
mluis 0:45c4f0364ca4 90 }
mluis 0:45c4f0364ca4 91
mluis 7:b988b60083a1 92 SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events )
mluis 7:b988b60083a1 93 #if defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_NUCLEO_L476RG )
mluis 0:45c4f0364ca4 94 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, A3, D9 ), // For NUCLEO L152RE dio4 is on port A3
mluis 0:45c4f0364ca4 95 AntSwitch( A4 ),
mluis 0:45c4f0364ca4 96 Fake( D8 )
mluis 0:45c4f0364ca4 97 #elif defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 98 : SX1272( events, PB_15, PB_14, PB_13, PB_12, PC_2, PC_6, PC_10, PC_11, PC_8, PC_9, PC_12 ),
mluis 0:45c4f0364ca4 99 RfSwitchCntr1( PC_4 ),
mluis 0:45c4f0364ca4 100 RfSwitchCntr2( PC_13 ),
mluis 0:45c4f0364ca4 101 PwrAmpCntr( PD_2 )
dudmuck 1:b0372ef620d0 102 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 103 : SX1272( events, LORA_MOSI, LORA_MISO, LORA_SCK, LORA_NSS, LORA_RESET, LORA_DIO0, LORA_DIO1, LORA_DIO2, LORA_DIO3, LORA_DIO4, LORA_DIO5 ),
dudmuck 1:b0372ef620d0 104 TxCtl( LORA_TXCTL ),
mluis 7:b988b60083a1 105 RxCtl( LORA_RXCTL )
AMNoll 8:d5d94fd59c24 106
AMNoll 8:d5d94fd59c24 107 //Add definition case for NRF51 DK board with correct pins
AMNoll 8:d5d94fd59c24 108 #elif defined ( TARGET_NRF51_DK )
AMNoll 8:d5d94fd59c24 109 /*
AMNoll 8:d5d94fd59c24 110 *PinName mosi, PinName miso, PinName sclk, PinName nss,PinName reset,
AMNoll 8:d5d94fd59c24 111 *PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5
AMNoll 8:d5d94fd59c24 112 *
AMNoll 8:d5d94fd59c24 113 *SPI_PSELMOSI0 is p25
AMNoll 8:d5d94fd59c24 114 *SPI_PSELMISO0 = p28
AMNoll 8:d5d94fd59c24 115 *SPI_PSELSS0 = p24,
AMNoll 8:d5d94fd59c24 116 *SPI_PSELSCK0 = p29,
AMNoll 8:d5d94fd59c24 117 *P0_0 = p0,
AMNoll 8:d5d94fd59c24 118 *P0_1 = p1,
AMNoll 8:d5d94fd59c24 119 *P0_2 = p2,
AMNoll 8:d5d94fd59c24 120 *P0_3 = p3,
AMNoll 8:d5d94fd59c24 121 *P0_4 = p4,
AMNoll 8:d5d94fd59c24 122 *P0_5 = p5,
AMNoll 8:d5d94fd59c24 123 *use P0_19 = p19 for reset pin
AMNoll 8:d5d94fd59c24 124 */
AMNoll 8:d5d94fd59c24 125 : SX1272( events, SPI_PSELMOSI0, SPI_PSELMISO0, SPI_PSELSCK0, SPI_PSELSS0, P0_19, P0_5, P0_4, P0_3, P0_2, P0_1, P0_0 ),
AMNoll 8:d5d94fd59c24 126 AntSwitch( A4 )
mluis 0:45c4f0364ca4 127 #else
mluis 0:45c4f0364ca4 128 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, D8, D9 ),
mluis 0:45c4f0364ca4 129 AntSwitch( A4 ),
mluis 0:45c4f0364ca4 130 Fake( A3 )
mluis 0:45c4f0364ca4 131 #endif
mluis 0:45c4f0364ca4 132 {
mluis 0:45c4f0364ca4 133 this->RadioEvents = events;
mluis 0:45c4f0364ca4 134
mluis 0:45c4f0364ca4 135 Reset( );
mluis 7:b988b60083a1 136
mluis 0:45c4f0364ca4 137 boardConnected = UNKNOWN;
mluis 7:b988b60083a1 138
mluis 0:45c4f0364ca4 139 DetectBoardType( );
mluis 7:b988b60083a1 140
mluis 0:45c4f0364ca4 141 IoInit( );
mluis 7:b988b60083a1 142
mluis 0:45c4f0364ca4 143 SetOpMode( RF_OPMODE_SLEEP );
mluis 0:45c4f0364ca4 144 IoIrqInit( dioIrq );
mluis 7:b988b60083a1 145
mluis 0:45c4f0364ca4 146 RadioRegistersInit( );
mluis 0:45c4f0364ca4 147
mluis 0:45c4f0364ca4 148 SetModem( MODEM_FSK );
mluis 0:45c4f0364ca4 149
mluis 0:45c4f0364ca4 150 this->settings.State = RF_IDLE ;
mluis 0:45c4f0364ca4 151 }
mluis 0:45c4f0364ca4 152
mluis 0:45c4f0364ca4 153 //-------------------------------------------------------------------------
mluis 0:45c4f0364ca4 154 // Board relative functions
mluis 0:45c4f0364ca4 155 //-------------------------------------------------------------------------
GregCr 2:cd1093b6676f 156 uint8_t SX1272MB2xAS::DetectBoardType( void )
mluis 0:45c4f0364ca4 157 {
mluis 0:45c4f0364ca4 158 if( boardConnected == UNKNOWN )
mluis 0:45c4f0364ca4 159 {
mluis 0:45c4f0364ca4 160 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 161 boardConnected = NA_MOTE_72;
dudmuck 1:b0372ef620d0 162 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 163 boardConnected = MDOT_F411RE;
mluis 0:45c4f0364ca4 164 #else
mluis 0:45c4f0364ca4 165 this->AntSwitch.input( );
mluis 0:45c4f0364ca4 166 wait_ms( 1 );
mluis 0:45c4f0364ca4 167 if( this->AntSwitch == 1 )
mluis 0:45c4f0364ca4 168 {
mluis 0:45c4f0364ca4 169 boardConnected = SX1272MB1DCS;
mluis 0:45c4f0364ca4 170 }
mluis 0:45c4f0364ca4 171 else
mluis 0:45c4f0364ca4 172 {
GregCr 2:cd1093b6676f 173 boardConnected = SX1272MB2XAS;
mluis 0:45c4f0364ca4 174 }
mluis 0:45c4f0364ca4 175 this->AntSwitch.output( );
mluis 0:45c4f0364ca4 176 wait_ms( 1 );
mluis 0:45c4f0364ca4 177 #endif
mluis 0:45c4f0364ca4 178 }
mluis 0:45c4f0364ca4 179 return ( boardConnected );
mluis 0:45c4f0364ca4 180 }
mluis 0:45c4f0364ca4 181
GregCr 2:cd1093b6676f 182 void SX1272MB2xAS::IoInit( void )
mluis 0:45c4f0364ca4 183 {
mluis 0:45c4f0364ca4 184 AntSwInit( );
mluis 0:45c4f0364ca4 185 SpiInit( );
mluis 0:45c4f0364ca4 186 }
mluis 0:45c4f0364ca4 187
GregCr 2:cd1093b6676f 188 void SX1272MB2xAS::RadioRegistersInit( )
mluis 0:45c4f0364ca4 189 {
mluis 0:45c4f0364ca4 190 uint8_t i = 0;
mluis 0:45c4f0364ca4 191 for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
mluis 0:45c4f0364ca4 192 {
mluis 0:45c4f0364ca4 193 SetModem( RadioRegsInit[i].Modem );
mluis 0:45c4f0364ca4 194 Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
mluis 0:45c4f0364ca4 195 }
mluis 0:45c4f0364ca4 196 }
mluis 0:45c4f0364ca4 197
GregCr 2:cd1093b6676f 198 void SX1272MB2xAS::SpiInit( void )
mluis 0:45c4f0364ca4 199 {
mluis 0:45c4f0364ca4 200 nss = 1;
mluis 0:45c4f0364ca4 201 spi.format( 8,0 );
mluis 0:45c4f0364ca4 202 uint32_t frequencyToSet = 8000000;
mluis 7:b988b60083a1 203 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_MOTE_L152RC ) || defined ( TARGET_NUCLEO_L476RG ) || defined ( TARGET_LPC11U6X ) || defined ( TARGET_MTS_MDOT_F411RE ) )
mluis 0:45c4f0364ca4 204 spi.frequency( frequencyToSet );
mluis 0:45c4f0364ca4 205 #elif( defined ( TARGET_KL25Z ) ) //busclock frequency is halved -> double the spi frequency to compensate
mluis 0:45c4f0364ca4 206 spi.frequency( frequencyToSet * 2 );
mluis 0:45c4f0364ca4 207 #else
mluis 0:45c4f0364ca4 208 #warning "Check the board's SPI frequency"
mluis 0:45c4f0364ca4 209 #endif
mluis 0:45c4f0364ca4 210 wait(0.1);
mluis 0:45c4f0364ca4 211 }
mluis 0:45c4f0364ca4 212
GregCr 2:cd1093b6676f 213 void SX1272MB2xAS::IoIrqInit( DioIrqHandler *irqHandlers )
mluis 0:45c4f0364ca4 214 {
mluis 7:b988b60083a1 215 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_MOTE_L152RC ) || defined ( TARGET_NUCLEO_L476RG ) || defined ( TARGET_NUCLEO_L476RG ) || defined ( TARGET_LPC11U6X ) )
mluis 0:45c4f0364ca4 216 dio0.mode( PullDown );
mluis 0:45c4f0364ca4 217 dio1.mode( PullDown );
mluis 0:45c4f0364ca4 218 dio2.mode( PullDown );
mluis 0:45c4f0364ca4 219 dio3.mode( PullDown );
mluis 0:45c4f0364ca4 220 dio4.mode( PullDown );
mluis 0:45c4f0364ca4 221 #endif
mluis 7:b988b60083a1 222 dio0.rise( mbed::callback( this, static_cast< TriggerMB2xAS > ( irqHandlers[0] ) ) );
mluis 7:b988b60083a1 223 dio1.rise( mbed::callback( this, static_cast< TriggerMB2xAS > ( irqHandlers[1] ) ) );
mluis 7:b988b60083a1 224 dio2.rise( mbed::callback( this, static_cast< TriggerMB2xAS > ( irqHandlers[2] ) ) );
mluis 7:b988b60083a1 225 dio3.rise( mbed::callback( this, static_cast< TriggerMB2xAS > ( irqHandlers[3] ) ) );
mluis 7:b988b60083a1 226 dio4.rise( mbed::callback( this, static_cast< TriggerMB2xAS > ( irqHandlers[4] ) ) );
mluis 0:45c4f0364ca4 227 }
mluis 0:45c4f0364ca4 228
GregCr 2:cd1093b6676f 229 void SX1272MB2xAS::IoDeInit( void )
mluis 0:45c4f0364ca4 230 {
mluis 0:45c4f0364ca4 231 //nothing
mluis 0:45c4f0364ca4 232 }
mluis 0:45c4f0364ca4 233
mluis 7:b988b60083a1 234 void SX1272MB2xAS::SetRfTxPower( int8_t power )
mluis 7:b988b60083a1 235 {
mluis 7:b988b60083a1 236 uint8_t paConfig = 0;
mluis 7:b988b60083a1 237 uint8_t paDac = 0;
mluis 7:b988b60083a1 238
mluis 7:b988b60083a1 239 paConfig = Read( REG_PACONFIG );
mluis 7:b988b60083a1 240 paDac = Read( REG_PADAC );
mluis 7:b988b60083a1 241
mluis 7:b988b60083a1 242 #if defined ( TARGET_MOTE_L152RC )
mluis 7:b988b60083a1 243 if( power > 19 )
mluis 7:b988b60083a1 244 {
mluis 7:b988b60083a1 245 paConfig = ( paConfig & RF_PACONFIG_PASELECT_MASK ) | RF_PACONFIG_PASELECT_RFO;
mluis 7:b988b60083a1 246 paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | RfoTable[power - 20];
mluis 7:b988b60083a1 247 }
mluis 7:b988b60083a1 248 else
mluis 7:b988b60083a1 249 {
mluis 7:b988b60083a1 250 paConfig = ( paConfig & RF_PACONFIG_PASELECT_MASK ) | RF_PACONFIG_PASELECT_PABOOST;
mluis 7:b988b60083a1 251 paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | PaBTable[power];
mluis 7:b988b60083a1 252 }
mluis 7:b988b60083a1 253 #else
mluis 7:b988b60083a1 254 paConfig = ( paConfig & RF_PACONFIG_PASELECT_MASK ) | GetPaSelect( this->settings.Channel );
mluis 7:b988b60083a1 255
mluis 7:b988b60083a1 256 if( ( paConfig & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST )
mluis 7:b988b60083a1 257 {
mluis 7:b988b60083a1 258 if( power > 17 )
mluis 7:b988b60083a1 259 {
mluis 7:b988b60083a1 260 paDac = ( paDac & RF_PADAC_20DBM_MASK ) | RF_PADAC_20DBM_ON;
mluis 7:b988b60083a1 261 }
mluis 7:b988b60083a1 262 else
mluis 7:b988b60083a1 263 {
mluis 7:b988b60083a1 264 paDac = ( paDac & RF_PADAC_20DBM_MASK ) | RF_PADAC_20DBM_OFF;
mluis 7:b988b60083a1 265 }
mluis 7:b988b60083a1 266 if( ( paDac & RF_PADAC_20DBM_ON ) == RF_PADAC_20DBM_ON )
mluis 7:b988b60083a1 267 {
mluis 7:b988b60083a1 268 if( power < 5 )
mluis 7:b988b60083a1 269 {
mluis 7:b988b60083a1 270 power = 5;
mluis 7:b988b60083a1 271 }
mluis 7:b988b60083a1 272 if( power > 20 )
mluis 7:b988b60083a1 273 {
mluis 7:b988b60083a1 274 power = 20;
mluis 7:b988b60083a1 275 }
mluis 7:b988b60083a1 276 paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 5 ) & 0x0F );
mluis 7:b988b60083a1 277 }
mluis 7:b988b60083a1 278 else
mluis 7:b988b60083a1 279 {
mluis 7:b988b60083a1 280 if( power < 2 )
mluis 7:b988b60083a1 281 {
mluis 7:b988b60083a1 282 power = 2;
mluis 7:b988b60083a1 283 }
mluis 7:b988b60083a1 284 if( power > 17 )
mluis 7:b988b60083a1 285 {
mluis 7:b988b60083a1 286 power = 17;
mluis 7:b988b60083a1 287 }
mluis 7:b988b60083a1 288 paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power - 2 ) & 0x0F );
mluis 7:b988b60083a1 289 }
mluis 7:b988b60083a1 290 }
mluis 7:b988b60083a1 291 else
mluis 7:b988b60083a1 292 {
mluis 7:b988b60083a1 293 if( power < -1 )
mluis 7:b988b60083a1 294 {
mluis 7:b988b60083a1 295 power = -1;
mluis 7:b988b60083a1 296 }
mluis 7:b988b60083a1 297 if( power > 14 )
mluis 7:b988b60083a1 298 {
mluis 7:b988b60083a1 299 power = 14;
mluis 7:b988b60083a1 300 }
mluis 7:b988b60083a1 301 paConfig = ( paConfig & RFLR_PACONFIG_OUTPUTPOWER_MASK ) | ( uint8_t )( ( uint16_t )( power + 1 ) & 0x0F );
mluis 7:b988b60083a1 302 }
mluis 7:b988b60083a1 303 #endif
mluis 7:b988b60083a1 304 Write( REG_PACONFIG, paConfig );
mluis 7:b988b60083a1 305 Write( REG_PADAC, paDac );
mluis 7:b988b60083a1 306 }
mluis 7:b988b60083a1 307
GregCr 2:cd1093b6676f 308 uint8_t SX1272MB2xAS::GetPaSelect( uint32_t channel )
mluis 0:45c4f0364ca4 309 {
dudmuck 1:b0372ef620d0 310 if( boardConnected == SX1272MB1DCS || boardConnected == MDOT_F411RE )
mluis 0:45c4f0364ca4 311 {
mluis 0:45c4f0364ca4 312 return RF_PACONFIG_PASELECT_PABOOST;
mluis 0:45c4f0364ca4 313 }
mluis 0:45c4f0364ca4 314 else
mluis 0:45c4f0364ca4 315 {
mluis 0:45c4f0364ca4 316 return RF_PACONFIG_PASELECT_RFO;
mluis 0:45c4f0364ca4 317 }
mluis 0:45c4f0364ca4 318 }
mluis 0:45c4f0364ca4 319
GregCr 2:cd1093b6676f 320 void SX1272MB2xAS::SetAntSwLowPower( bool status )
mluis 0:45c4f0364ca4 321 {
mluis 0:45c4f0364ca4 322 if( isRadioActive != status )
mluis 0:45c4f0364ca4 323 {
mluis 0:45c4f0364ca4 324 isRadioActive = status;
mluis 0:45c4f0364ca4 325
mluis 0:45c4f0364ca4 326 if( status == false )
mluis 0:45c4f0364ca4 327 {
mluis 0:45c4f0364ca4 328 AntSwInit( );
mluis 0:45c4f0364ca4 329 }
mluis 0:45c4f0364ca4 330 else
mluis 0:45c4f0364ca4 331 {
mluis 0:45c4f0364ca4 332 AntSwDeInit( );
mluis 0:45c4f0364ca4 333 }
mluis 0:45c4f0364ca4 334 }
mluis 0:45c4f0364ca4 335 }
mluis 0:45c4f0364ca4 336
GregCr 2:cd1093b6676f 337 void SX1272MB2xAS::AntSwInit( void )
mluis 0:45c4f0364ca4 338 {
mluis 0:45c4f0364ca4 339 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 340 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 341 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 342 this->PwrAmpCntr = 0;
dudmuck 1:b0372ef620d0 343 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 344 this->TxCtl = 0;
dudmuck 1:b0372ef620d0 345 this->RxCtl = 0;
mluis 0:45c4f0364ca4 346 #else
mluis 0:45c4f0364ca4 347 this->AntSwitch = 0;
mluis 0:45c4f0364ca4 348 #endif
mluis 0:45c4f0364ca4 349 }
mluis 0:45c4f0364ca4 350
GregCr 2:cd1093b6676f 351 void SX1272MB2xAS::AntSwDeInit( void )
mluis 0:45c4f0364ca4 352 {
mluis 0:45c4f0364ca4 353 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 354 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 355 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 356 this->PwrAmpCntr = 0;
dudmuck 1:b0372ef620d0 357 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 358 this->TxCtl = 0;
mluis 7:b988b60083a1 359 this->RxCtl = 0;
mluis 0:45c4f0364ca4 360 #else
mluis 0:45c4f0364ca4 361 this->AntSwitch = 0;
mluis 0:45c4f0364ca4 362 #endif
mluis 0:45c4f0364ca4 363 }
mluis 0:45c4f0364ca4 364
mluis 7:b988b60083a1 365 void SX1272MB2xAS::SetAntSw( uint8_t opMode )
mluis 0:45c4f0364ca4 366 {
mluis 7:b988b60083a1 367 switch( opMode )
mluis 0:45c4f0364ca4 368 {
mluis 0:45c4f0364ca4 369 case RFLR_OPMODE_TRANSMITTER:
mluis 7:b988b60083a1 370 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 371 if( ( Read( REG_PACONFIG ) & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST )
mluis 0:45c4f0364ca4 372 {
mluis 0:45c4f0364ca4 373 this->RfSwitchCntr1 = 1;
mluis 0:45c4f0364ca4 374 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 375 }
mluis 0:45c4f0364ca4 376 else
mluis 0:45c4f0364ca4 377 {
mluis 0:45c4f0364ca4 378 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 379 this->RfSwitchCntr2 = 1;
mluis 0:45c4f0364ca4 380 }
mluis 7:b988b60083a1 381 #elif defined ( TARGET_MTS_MDOT_F411RE )
mluis 7:b988b60083a1 382 /* SKY13350 */
mluis 7:b988b60083a1 383 this->TxCtl = 1;
mluis 7:b988b60083a1 384 this->RxCtl = 0;
mluis 7:b988b60083a1 385 #else
mluis 7:b988b60083a1 386 this->AntSwitch = 1;
mluis 7:b988b60083a1 387 #endif
mluis 0:45c4f0364ca4 388 break;
mluis 0:45c4f0364ca4 389 case RFLR_OPMODE_RECEIVER:
mluis 0:45c4f0364ca4 390 case RFLR_OPMODE_RECEIVER_SINGLE:
mluis 0:45c4f0364ca4 391 case RFLR_OPMODE_CAD:
mluis 7:b988b60083a1 392 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 393 this->RfSwitchCntr1 = 1;
mluis 0:45c4f0364ca4 394 this->RfSwitchCntr2 = 1;
mluis 7:b988b60083a1 395 #elif defined ( TARGET_MTS_MDOT_F411RE )
mluis 7:b988b60083a1 396 /* SKY13350 */
mluis 7:b988b60083a1 397 this->TxCtl = 0;
mluis 7:b988b60083a1 398 this->RxCtl = 1;
mluis 7:b988b60083a1 399 #else
mluis 7:b988b60083a1 400 this->AntSwitch = 0;
mluis 7:b988b60083a1 401 #endif
mluis 0:45c4f0364ca4 402 break;
mluis 0:45c4f0364ca4 403 default:
mluis 7:b988b60083a1 404 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 405 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 406 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 407 this->PwrAmpCntr = 0;
mluis 7:b988b60083a1 408 #elif defined ( TARGET_MTS_MDOT_F411RE )
mluis 7:b988b60083a1 409 /* SKY13350 */
mluis 7:b988b60083a1 410 this->TxCtl = 0;
mluis 7:b988b60083a1 411 this->RxCtl = 0;
mluis 7:b988b60083a1 412 #else
mluis 7:b988b60083a1 413 this->AntSwitch = 0;
mluis 7:b988b60083a1 414 #endif
mluis 0:45c4f0364ca4 415 break;
mluis 0:45c4f0364ca4 416 }
mluis 0:45c4f0364ca4 417 }
mluis 0:45c4f0364ca4 418
GregCr 2:cd1093b6676f 419 bool SX1272MB2xAS::CheckRfFrequency( uint32_t frequency )
mluis 0:45c4f0364ca4 420 {
mluis 7:b988b60083a1 421 // Implement check. Currently all frequencies are supported
mluis 0:45c4f0364ca4 422 return true;
mluis 0:45c4f0364ca4 423 }
mluis 0:45c4f0364ca4 424
GregCr 2:cd1093b6676f 425 void SX1272MB2xAS::Reset( void )
mluis 0:45c4f0364ca4 426 {
mluis 7:b988b60083a1 427 reset.output( );
mluis 0:45c4f0364ca4 428 reset = 0;
mluis 0:45c4f0364ca4 429 wait_ms( 1 );
mluis 7:b988b60083a1 430 reset.input( );
mluis 0:45c4f0364ca4 431 wait_ms( 6 );
mluis 0:45c4f0364ca4 432 }
mluis 7:b988b60083a1 433
GregCr 2:cd1093b6676f 434 void SX1272MB2xAS::Write( uint8_t addr, uint8_t data )
mluis 0:45c4f0364ca4 435 {
mluis 0:45c4f0364ca4 436 Write( addr, &data, 1 );
mluis 0:45c4f0364ca4 437 }
mluis 0:45c4f0364ca4 438
GregCr 2:cd1093b6676f 439 uint8_t SX1272MB2xAS::Read( uint8_t addr )
mluis 0:45c4f0364ca4 440 {
mluis 0:45c4f0364ca4 441 uint8_t data;
mluis 0:45c4f0364ca4 442 Read( addr, &data, 1 );
mluis 0:45c4f0364ca4 443 return data;
mluis 0:45c4f0364ca4 444 }
mluis 0:45c4f0364ca4 445
GregCr 2:cd1093b6676f 446 void SX1272MB2xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 447 {
mluis 0:45c4f0364ca4 448 uint8_t i;
mluis 0:45c4f0364ca4 449
mluis 0:45c4f0364ca4 450 nss = 0;
mluis 0:45c4f0364ca4 451 spi.write( addr | 0x80 );
mluis 0:45c4f0364ca4 452 for( i = 0; i < size; i++ )
mluis 0:45c4f0364ca4 453 {
mluis 0:45c4f0364ca4 454 spi.write( buffer[i] );
mluis 0:45c4f0364ca4 455 }
mluis 0:45c4f0364ca4 456 nss = 1;
mluis 0:45c4f0364ca4 457 }
mluis 0:45c4f0364ca4 458
GregCr 2:cd1093b6676f 459 void SX1272MB2xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 460 {
mluis 0:45c4f0364ca4 461 uint8_t i;
mluis 0:45c4f0364ca4 462
mluis 0:45c4f0364ca4 463 nss = 0;
mluis 0:45c4f0364ca4 464 spi.write( addr & 0x7F );
mluis 0:45c4f0364ca4 465 for( i = 0; i < size; i++ )
mluis 0:45c4f0364ca4 466 {
mluis 0:45c4f0364ca4 467 buffer[i] = spi.write( 0 );
mluis 0:45c4f0364ca4 468 }
mluis 0:45c4f0364ca4 469 nss = 1;
mluis 0:45c4f0364ca4 470 }
mluis 0:45c4f0364ca4 471
GregCr 2:cd1093b6676f 472 void SX1272MB2xAS::WriteFifo( uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 473 {
mluis 0:45c4f0364ca4 474 Write( 0, buffer, size );
mluis 0:45c4f0364ca4 475 }
mluis 0:45c4f0364ca4 476
GregCr 2:cd1093b6676f 477 void SX1272MB2xAS::ReadFifo( uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 478 {
mluis 0:45c4f0364ca4 479 Read( 0, buffer, size );
mluis 0:45c4f0364ca4 480 }