Added support for the WNC M14A2A Cellular LTE Data Module.
Dependencies: WNC14A2AInterface
Easy Connect
Easily add all supported connectivity methods to your mbed OS project
This project is derived from https://developer.mbed.org/teams/sandbox/code/simple-mbed-client-example/file/dd6231df71bb/easy-connect.lib. It give user the ability to switch between connectivity methods and includes support for the WNC14A2A Data Module. The `NetworkInterface` API makes this easy, but you still need a mechanism for the user to select the connection method, The selection is made by modifying the `mbed_app.json` file and using `easy_connect()` from your application.
Specifying connectivity method
To add support for the WNC14A2A, add the following to your ``mbed_app.json`` file:
mbed_app.json
{ "config": { "network-interface":{ "help": "options are ETHERNET,WIFI_ESP8266,WIFI_ODIN,MESH_LOWPAN_ND,MESH_THREAD,WNC14A2A", "value": "WNC14A2A" } }, }
After you choose `WNC14A2A` you'll also need to indicate if you want debug output or not by Enabling (true) or Disabling (false) WNC_DEBUG.
If WNC_DEBUG is enabled, there are 3 different levels of debug output (selected via bit settings). These debug levels are set using the following values:
Value | Description |
---|---|
1 | Basic WNC driver debug output |
2 | Comprehensive WNC driver debug output |
4 | Network Layer debug output |
You can have any combination of these three bit values for a total value of 0 – 7.
WNC Debug Settings
"config": { "WNC_DEBUG": { "value": false }, "WNC_DEBUG_SETTING": { "value": 4 }, }
Using Easy Connect from your application
Easy Connect has just one function which will either return a `NetworkInterface`-pointer or `NULL`:
Sample Code
#include "easy-connect.h" int main(int, char**) { NetworkInterface* network = easy_connect(true); /* has 1 argument, enable_logging (pass in true to log to serial port) */ if (!network) { printf("Connecting to the network failed... See serial output.\r\n"); return 1; } // Rest of your program }
Tested on
- K64F with Ethernet.
- AT&T Cellular IoT Starter Kit with WNC M14A2A Cellular Data Module
The WNCInterface class currently supports the following version(s):
- MPSS: M14A2A_v11.50.164451 APSS: M14A2A_v11.53.164451
License
This library is released under the Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License and may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
mcr20a-rf-driver/source/MCR20Drv.c@0:478cfd88041f, 2017-04-19 (annotated)
- Committer:
- group-Avnet
- Date:
- Wed Apr 19 01:08:11 2017 +0000
- Revision:
- 0:478cfd88041f
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
group-Avnet | 0:478cfd88041f | 1 | /*! |
group-Avnet | 0:478cfd88041f | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
group-Avnet | 0:478cfd88041f | 3 | * All rights reserved. |
group-Avnet | 0:478cfd88041f | 4 | * |
group-Avnet | 0:478cfd88041f | 5 | * \file MCR20Drv.c |
group-Avnet | 0:478cfd88041f | 6 | * |
group-Avnet | 0:478cfd88041f | 7 | * Redistribution and use in source and binary forms, with or without modification, |
group-Avnet | 0:478cfd88041f | 8 | * are permitted provided that the following conditions are met: |
group-Avnet | 0:478cfd88041f | 9 | * |
group-Avnet | 0:478cfd88041f | 10 | * o Redistributions of source code must retain the above copyright notice, this list |
group-Avnet | 0:478cfd88041f | 11 | * of conditions and the following disclaimer. |
group-Avnet | 0:478cfd88041f | 12 | * |
group-Avnet | 0:478cfd88041f | 13 | * o Redistributions in binary form must reproduce the above copyright notice, this |
group-Avnet | 0:478cfd88041f | 14 | * list of conditions and the following disclaimer in the documentation and/or |
group-Avnet | 0:478cfd88041f | 15 | * other materials provided with the distribution. |
group-Avnet | 0:478cfd88041f | 16 | * |
group-Avnet | 0:478cfd88041f | 17 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
group-Avnet | 0:478cfd88041f | 18 | * contributors may be used to endorse or promote products derived from this |
group-Avnet | 0:478cfd88041f | 19 | * software without specific prior written permission. |
group-Avnet | 0:478cfd88041f | 20 | * |
group-Avnet | 0:478cfd88041f | 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
group-Avnet | 0:478cfd88041f | 22 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
group-Avnet | 0:478cfd88041f | 23 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
group-Avnet | 0:478cfd88041f | 24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
group-Avnet | 0:478cfd88041f | 25 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
group-Avnet | 0:478cfd88041f | 26 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
group-Avnet | 0:478cfd88041f | 27 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
group-Avnet | 0:478cfd88041f | 28 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
group-Avnet | 0:478cfd88041f | 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
group-Avnet | 0:478cfd88041f | 30 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
group-Avnet | 0:478cfd88041f | 31 | */ |
group-Avnet | 0:478cfd88041f | 32 | |
group-Avnet | 0:478cfd88041f | 33 | |
group-Avnet | 0:478cfd88041f | 34 | /***************************************************************************** |
group-Avnet | 0:478cfd88041f | 35 | * INCLUDED HEADERS * |
group-Avnet | 0:478cfd88041f | 36 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 37 | * Add to this section all the headers that this module needs to include. * |
group-Avnet | 0:478cfd88041f | 38 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 39 | *****************************************************************************/ |
group-Avnet | 0:478cfd88041f | 40 | |
group-Avnet | 0:478cfd88041f | 41 | #include "platform/arm_hal_interrupt.h" |
group-Avnet | 0:478cfd88041f | 42 | #include "MCR20Drv.h" |
group-Avnet | 0:478cfd88041f | 43 | #include "MCR20Reg.h" |
group-Avnet | 0:478cfd88041f | 44 | #include "XcvrSpi.h" |
group-Avnet | 0:478cfd88041f | 45 | |
group-Avnet | 0:478cfd88041f | 46 | |
group-Avnet | 0:478cfd88041f | 47 | /***************************************************************************** |
group-Avnet | 0:478cfd88041f | 48 | * PRIVATE VARIABLES * |
group-Avnet | 0:478cfd88041f | 49 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 50 | * Add to this section all the variables and constants that have local * |
group-Avnet | 0:478cfd88041f | 51 | * (file) scope. * |
group-Avnet | 0:478cfd88041f | 52 | * Each of this declarations shall be preceded by the 'static' keyword. * |
group-Avnet | 0:478cfd88041f | 53 | * These variables / constants cannot be accessed outside this module. * |
group-Avnet | 0:478cfd88041f | 54 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 55 | *****************************************************************************/ |
group-Avnet | 0:478cfd88041f | 56 | uint32_t mPhyIrqDisableCnt = 1; |
group-Avnet | 0:478cfd88041f | 57 | |
group-Avnet | 0:478cfd88041f | 58 | /***************************************************************************** |
group-Avnet | 0:478cfd88041f | 59 | * PUBLIC VARIABLES * |
group-Avnet | 0:478cfd88041f | 60 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 61 | * Add to this section all the variables and constants that have global * |
group-Avnet | 0:478cfd88041f | 62 | * (project) scope. * |
group-Avnet | 0:478cfd88041f | 63 | * These variables / constants can be accessed outside this module. * |
group-Avnet | 0:478cfd88041f | 64 | * These variables / constants shall be preceded by the 'extern' keyword in * |
group-Avnet | 0:478cfd88041f | 65 | * the interface header. * |
group-Avnet | 0:478cfd88041f | 66 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 67 | *****************************************************************************/ |
group-Avnet | 0:478cfd88041f | 68 | |
group-Avnet | 0:478cfd88041f | 69 | /***************************************************************************** |
group-Avnet | 0:478cfd88041f | 70 | * PRIVATE FUNCTIONS PROTOTYPES * |
group-Avnet | 0:478cfd88041f | 71 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 72 | * Add to this section all the functions prototypes that have local (file) * |
group-Avnet | 0:478cfd88041f | 73 | * scope. * |
group-Avnet | 0:478cfd88041f | 74 | * These functions cannot be accessed outside this module. * |
group-Avnet | 0:478cfd88041f | 75 | * These declarations shall be preceded by the 'static' keyword. * |
group-Avnet | 0:478cfd88041f | 76 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 77 | *****************************************************************************/ |
group-Avnet | 0:478cfd88041f | 78 | |
group-Avnet | 0:478cfd88041f | 79 | /***************************************************************************** |
group-Avnet | 0:478cfd88041f | 80 | * PRIVATE FUNCTIONS * |
group-Avnet | 0:478cfd88041f | 81 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 82 | * Add to this section all the functions that have local (file) scope. * |
group-Avnet | 0:478cfd88041f | 83 | * These functions cannot be accessed outside this module. * |
group-Avnet | 0:478cfd88041f | 84 | * These definitions shall be preceded by the 'static' keyword. * |
group-Avnet | 0:478cfd88041f | 85 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 86 | *****************************************************************************/ |
group-Avnet | 0:478cfd88041f | 87 | |
group-Avnet | 0:478cfd88041f | 88 | |
group-Avnet | 0:478cfd88041f | 89 | /***************************************************************************** |
group-Avnet | 0:478cfd88041f | 90 | * PUBLIC FUNCTIONS * |
group-Avnet | 0:478cfd88041f | 91 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 92 | * Add to this section all the functions that have global (project) scope. * |
group-Avnet | 0:478cfd88041f | 93 | * These functions can be accessed outside this module. * |
group-Avnet | 0:478cfd88041f | 94 | * These functions shall have their declarations (prototypes) within the * |
group-Avnet | 0:478cfd88041f | 95 | * interface header file and shall be preceded by the 'extern' keyword. * |
group-Avnet | 0:478cfd88041f | 96 | *---------------------------------------------------------------------------* |
group-Avnet | 0:478cfd88041f | 97 | *****************************************************************************/ |
group-Avnet | 0:478cfd88041f | 98 | |
group-Avnet | 0:478cfd88041f | 99 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 100 | * Name: MCR20Drv_Init |
group-Avnet | 0:478cfd88041f | 101 | * Description: - |
group-Avnet | 0:478cfd88041f | 102 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 103 | * Return: - |
group-Avnet | 0:478cfd88041f | 104 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 105 | void MCR20Drv_Init |
group-Avnet | 0:478cfd88041f | 106 | ( |
group-Avnet | 0:478cfd88041f | 107 | void |
group-Avnet | 0:478cfd88041f | 108 | ) |
group-Avnet | 0:478cfd88041f | 109 | { |
group-Avnet | 0:478cfd88041f | 110 | xcvr_spi_init(gXcvrSpiInstance_c); |
group-Avnet | 0:478cfd88041f | 111 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 8000000); |
group-Avnet | 0:478cfd88041f | 112 | |
group-Avnet | 0:478cfd88041f | 113 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 114 | MCR20Drv_RST_B_Deassert(); |
group-Avnet | 0:478cfd88041f | 115 | RF_IRQ_Init(); |
group-Avnet | 0:478cfd88041f | 116 | RF_IRQ_Disable(); |
group-Avnet | 0:478cfd88041f | 117 | mPhyIrqDisableCnt = 1; |
group-Avnet | 0:478cfd88041f | 118 | } |
group-Avnet | 0:478cfd88041f | 119 | |
group-Avnet | 0:478cfd88041f | 120 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 121 | * Name: MCR20Drv_DirectAccessSPIWrite |
group-Avnet | 0:478cfd88041f | 122 | * Description: - |
group-Avnet | 0:478cfd88041f | 123 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 124 | * Return: - |
group-Avnet | 0:478cfd88041f | 125 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 126 | void MCR20Drv_DirectAccessSPIWrite |
group-Avnet | 0:478cfd88041f | 127 | ( |
group-Avnet | 0:478cfd88041f | 128 | uint8_t address, |
group-Avnet | 0:478cfd88041f | 129 | uint8_t value |
group-Avnet | 0:478cfd88041f | 130 | ) |
group-Avnet | 0:478cfd88041f | 131 | { |
group-Avnet | 0:478cfd88041f | 132 | uint16_t txData; |
group-Avnet | 0:478cfd88041f | 133 | |
group-Avnet | 0:478cfd88041f | 134 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 135 | |
group-Avnet | 0:478cfd88041f | 136 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 16000000); |
group-Avnet | 0:478cfd88041f | 137 | |
group-Avnet | 0:478cfd88041f | 138 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 139 | |
group-Avnet | 0:478cfd88041f | 140 | txData = (address & TransceiverSPI_DirectRegisterAddressMask); |
group-Avnet | 0:478cfd88041f | 141 | txData |= value << 8; |
group-Avnet | 0:478cfd88041f | 142 | |
group-Avnet | 0:478cfd88041f | 143 | xcvr_spi_transfer(gXcvrSpiInstance_c, (uint8_t *)&txData, 0, sizeof(txData)); |
group-Avnet | 0:478cfd88041f | 144 | |
group-Avnet | 0:478cfd88041f | 145 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 146 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 147 | } |
group-Avnet | 0:478cfd88041f | 148 | |
group-Avnet | 0:478cfd88041f | 149 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 150 | * Name: MCR20Drv_DirectAccessSPIMultiByteWrite |
group-Avnet | 0:478cfd88041f | 151 | * Description: - |
group-Avnet | 0:478cfd88041f | 152 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 153 | * Return: - |
group-Avnet | 0:478cfd88041f | 154 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 155 | void MCR20Drv_DirectAccessSPIMultiByteWrite |
group-Avnet | 0:478cfd88041f | 156 | ( |
group-Avnet | 0:478cfd88041f | 157 | uint8_t startAddress, |
group-Avnet | 0:478cfd88041f | 158 | uint8_t * byteArray, |
group-Avnet | 0:478cfd88041f | 159 | uint8_t numOfBytes |
group-Avnet | 0:478cfd88041f | 160 | ) |
group-Avnet | 0:478cfd88041f | 161 | { |
group-Avnet | 0:478cfd88041f | 162 | uint8_t txData; |
group-Avnet | 0:478cfd88041f | 163 | |
group-Avnet | 0:478cfd88041f | 164 | if( (numOfBytes == 0) || (byteArray == 0) ) |
group-Avnet | 0:478cfd88041f | 165 | { |
group-Avnet | 0:478cfd88041f | 166 | return; |
group-Avnet | 0:478cfd88041f | 167 | } |
group-Avnet | 0:478cfd88041f | 168 | |
group-Avnet | 0:478cfd88041f | 169 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 170 | |
group-Avnet | 0:478cfd88041f | 171 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 16000000); |
group-Avnet | 0:478cfd88041f | 172 | |
group-Avnet | 0:478cfd88041f | 173 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 174 | |
group-Avnet | 0:478cfd88041f | 175 | txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask); |
group-Avnet | 0:478cfd88041f | 176 | |
group-Avnet | 0:478cfd88041f | 177 | xcvr_spi_transfer(gXcvrSpiInstance_c, &txData, 0, sizeof(txData)); |
group-Avnet | 0:478cfd88041f | 178 | xcvr_spi_transfer(gXcvrSpiInstance_c, byteArray, 0, numOfBytes); |
group-Avnet | 0:478cfd88041f | 179 | |
group-Avnet | 0:478cfd88041f | 180 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 181 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 182 | } |
group-Avnet | 0:478cfd88041f | 183 | |
group-Avnet | 0:478cfd88041f | 184 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 185 | * Name: MCR20Drv_PB_SPIByteWrite |
group-Avnet | 0:478cfd88041f | 186 | * Description: - |
group-Avnet | 0:478cfd88041f | 187 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 188 | * Return: - |
group-Avnet | 0:478cfd88041f | 189 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 190 | void MCR20Drv_PB_SPIByteWrite |
group-Avnet | 0:478cfd88041f | 191 | ( |
group-Avnet | 0:478cfd88041f | 192 | uint8_t address, |
group-Avnet | 0:478cfd88041f | 193 | uint8_t value |
group-Avnet | 0:478cfd88041f | 194 | ) |
group-Avnet | 0:478cfd88041f | 195 | { |
group-Avnet | 0:478cfd88041f | 196 | uint32_t txData; |
group-Avnet | 0:478cfd88041f | 197 | |
group-Avnet | 0:478cfd88041f | 198 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 199 | |
group-Avnet | 0:478cfd88041f | 200 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 16000000); |
group-Avnet | 0:478cfd88041f | 201 | |
group-Avnet | 0:478cfd88041f | 202 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 203 | |
group-Avnet | 0:478cfd88041f | 204 | txData = TransceiverSPI_WriteSelect | |
group-Avnet | 0:478cfd88041f | 205 | TransceiverSPI_PacketBuffAccessSelect | |
group-Avnet | 0:478cfd88041f | 206 | TransceiverSPI_PacketBuffByteModeSelect; |
group-Avnet | 0:478cfd88041f | 207 | txData |= (address) << 8; |
group-Avnet | 0:478cfd88041f | 208 | txData |= (value) << 16; |
group-Avnet | 0:478cfd88041f | 209 | |
group-Avnet | 0:478cfd88041f | 210 | xcvr_spi_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, 0, 3); |
group-Avnet | 0:478cfd88041f | 211 | |
group-Avnet | 0:478cfd88041f | 212 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 213 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 214 | } |
group-Avnet | 0:478cfd88041f | 215 | |
group-Avnet | 0:478cfd88041f | 216 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 217 | * Name: MCR20Drv_PB_SPIBurstWrite |
group-Avnet | 0:478cfd88041f | 218 | * Description: - |
group-Avnet | 0:478cfd88041f | 219 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 220 | * Return: - |
group-Avnet | 0:478cfd88041f | 221 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 222 | void MCR20Drv_PB_SPIBurstWrite |
group-Avnet | 0:478cfd88041f | 223 | ( |
group-Avnet | 0:478cfd88041f | 224 | uint8_t * byteArray, |
group-Avnet | 0:478cfd88041f | 225 | uint8_t numOfBytes |
group-Avnet | 0:478cfd88041f | 226 | ) |
group-Avnet | 0:478cfd88041f | 227 | { |
group-Avnet | 0:478cfd88041f | 228 | uint8_t txData; |
group-Avnet | 0:478cfd88041f | 229 | |
group-Avnet | 0:478cfd88041f | 230 | if( (numOfBytes == 0) || (byteArray == 0) ) |
group-Avnet | 0:478cfd88041f | 231 | { |
group-Avnet | 0:478cfd88041f | 232 | return; |
group-Avnet | 0:478cfd88041f | 233 | } |
group-Avnet | 0:478cfd88041f | 234 | |
group-Avnet | 0:478cfd88041f | 235 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 236 | |
group-Avnet | 0:478cfd88041f | 237 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 16000000); |
group-Avnet | 0:478cfd88041f | 238 | |
group-Avnet | 0:478cfd88041f | 239 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 240 | |
group-Avnet | 0:478cfd88041f | 241 | txData = TransceiverSPI_WriteSelect | |
group-Avnet | 0:478cfd88041f | 242 | TransceiverSPI_PacketBuffAccessSelect | |
group-Avnet | 0:478cfd88041f | 243 | TransceiverSPI_PacketBuffBurstModeSelect; |
group-Avnet | 0:478cfd88041f | 244 | |
group-Avnet | 0:478cfd88041f | 245 | xcvr_spi_transfer(gXcvrSpiInstance_c, &txData, 0, 1); |
group-Avnet | 0:478cfd88041f | 246 | xcvr_spi_transfer(gXcvrSpiInstance_c, byteArray, 0, numOfBytes); |
group-Avnet | 0:478cfd88041f | 247 | |
group-Avnet | 0:478cfd88041f | 248 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 249 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 250 | } |
group-Avnet | 0:478cfd88041f | 251 | |
group-Avnet | 0:478cfd88041f | 252 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 253 | * Name: MCR20Drv_DirectAccessSPIRead |
group-Avnet | 0:478cfd88041f | 254 | * Description: - |
group-Avnet | 0:478cfd88041f | 255 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 256 | * Return: - |
group-Avnet | 0:478cfd88041f | 257 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 258 | |
group-Avnet | 0:478cfd88041f | 259 | uint8_t MCR20Drv_DirectAccessSPIRead |
group-Avnet | 0:478cfd88041f | 260 | ( |
group-Avnet | 0:478cfd88041f | 261 | uint8_t address |
group-Avnet | 0:478cfd88041f | 262 | ) |
group-Avnet | 0:478cfd88041f | 263 | { |
group-Avnet | 0:478cfd88041f | 264 | uint8_t txData; |
group-Avnet | 0:478cfd88041f | 265 | uint8_t rxData; |
group-Avnet | 0:478cfd88041f | 266 | |
group-Avnet | 0:478cfd88041f | 267 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 268 | |
group-Avnet | 0:478cfd88041f | 269 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 8000000); |
group-Avnet | 0:478cfd88041f | 270 | |
group-Avnet | 0:478cfd88041f | 271 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 272 | |
group-Avnet | 0:478cfd88041f | 273 | txData = (address & TransceiverSPI_DirectRegisterAddressMask) | |
group-Avnet | 0:478cfd88041f | 274 | TransceiverSPI_ReadSelect; |
group-Avnet | 0:478cfd88041f | 275 | |
group-Avnet | 0:478cfd88041f | 276 | xcvr_spi_transfer(gXcvrSpiInstance_c, &txData, 0, sizeof(txData)); |
group-Avnet | 0:478cfd88041f | 277 | xcvr_spi_transfer(gXcvrSpiInstance_c, 0, &rxData, sizeof(rxData)); |
group-Avnet | 0:478cfd88041f | 278 | |
group-Avnet | 0:478cfd88041f | 279 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 280 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 281 | |
group-Avnet | 0:478cfd88041f | 282 | return rxData; |
group-Avnet | 0:478cfd88041f | 283 | |
group-Avnet | 0:478cfd88041f | 284 | } |
group-Avnet | 0:478cfd88041f | 285 | |
group-Avnet | 0:478cfd88041f | 286 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 287 | * Name: MCR20Drv_DirectAccessSPIMultyByteRead |
group-Avnet | 0:478cfd88041f | 288 | * Description: - |
group-Avnet | 0:478cfd88041f | 289 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 290 | * Return: - |
group-Avnet | 0:478cfd88041f | 291 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 292 | uint8_t MCR20Drv_DirectAccessSPIMultiByteRead |
group-Avnet | 0:478cfd88041f | 293 | ( |
group-Avnet | 0:478cfd88041f | 294 | uint8_t startAddress, |
group-Avnet | 0:478cfd88041f | 295 | uint8_t * byteArray, |
group-Avnet | 0:478cfd88041f | 296 | uint8_t numOfBytes |
group-Avnet | 0:478cfd88041f | 297 | ) |
group-Avnet | 0:478cfd88041f | 298 | { |
group-Avnet | 0:478cfd88041f | 299 | uint8_t txData; |
group-Avnet | 0:478cfd88041f | 300 | uint8_t phyIRQSTS1; |
group-Avnet | 0:478cfd88041f | 301 | |
group-Avnet | 0:478cfd88041f | 302 | if( (numOfBytes == 0) || (byteArray == 0) ) |
group-Avnet | 0:478cfd88041f | 303 | { |
group-Avnet | 0:478cfd88041f | 304 | return 0; |
group-Avnet | 0:478cfd88041f | 305 | } |
group-Avnet | 0:478cfd88041f | 306 | |
group-Avnet | 0:478cfd88041f | 307 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 308 | |
group-Avnet | 0:478cfd88041f | 309 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 8000000); |
group-Avnet | 0:478cfd88041f | 310 | |
group-Avnet | 0:478cfd88041f | 311 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 312 | |
group-Avnet | 0:478cfd88041f | 313 | txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask) | |
group-Avnet | 0:478cfd88041f | 314 | TransceiverSPI_ReadSelect; |
group-Avnet | 0:478cfd88041f | 315 | |
group-Avnet | 0:478cfd88041f | 316 | xcvr_spi_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData)); |
group-Avnet | 0:478cfd88041f | 317 | xcvr_spi_transfer(gXcvrSpiInstance_c, 0, byteArray, numOfBytes); |
group-Avnet | 0:478cfd88041f | 318 | |
group-Avnet | 0:478cfd88041f | 319 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 320 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 321 | |
group-Avnet | 0:478cfd88041f | 322 | return phyIRQSTS1; |
group-Avnet | 0:478cfd88041f | 323 | } |
group-Avnet | 0:478cfd88041f | 324 | |
group-Avnet | 0:478cfd88041f | 325 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 326 | * Name: MCR20Drv_PB_SPIBurstRead |
group-Avnet | 0:478cfd88041f | 327 | * Description: - |
group-Avnet | 0:478cfd88041f | 328 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 329 | * Return: - |
group-Avnet | 0:478cfd88041f | 330 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 331 | uint8_t MCR20Drv_PB_SPIBurstRead |
group-Avnet | 0:478cfd88041f | 332 | ( |
group-Avnet | 0:478cfd88041f | 333 | uint8_t * byteArray, |
group-Avnet | 0:478cfd88041f | 334 | uint8_t numOfBytes |
group-Avnet | 0:478cfd88041f | 335 | ) |
group-Avnet | 0:478cfd88041f | 336 | { |
group-Avnet | 0:478cfd88041f | 337 | uint8_t txData; |
group-Avnet | 0:478cfd88041f | 338 | uint8_t phyIRQSTS1; |
group-Avnet | 0:478cfd88041f | 339 | |
group-Avnet | 0:478cfd88041f | 340 | if( (numOfBytes == 0) || (byteArray == 0) ) |
group-Avnet | 0:478cfd88041f | 341 | { |
group-Avnet | 0:478cfd88041f | 342 | return 0; |
group-Avnet | 0:478cfd88041f | 343 | } |
group-Avnet | 0:478cfd88041f | 344 | |
group-Avnet | 0:478cfd88041f | 345 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 346 | |
group-Avnet | 0:478cfd88041f | 347 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 8000000); |
group-Avnet | 0:478cfd88041f | 348 | |
group-Avnet | 0:478cfd88041f | 349 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 350 | |
group-Avnet | 0:478cfd88041f | 351 | txData = TransceiverSPI_ReadSelect | |
group-Avnet | 0:478cfd88041f | 352 | TransceiverSPI_PacketBuffAccessSelect | |
group-Avnet | 0:478cfd88041f | 353 | TransceiverSPI_PacketBuffBurstModeSelect; |
group-Avnet | 0:478cfd88041f | 354 | |
group-Avnet | 0:478cfd88041f | 355 | xcvr_spi_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData)); |
group-Avnet | 0:478cfd88041f | 356 | xcvr_spi_transfer(gXcvrSpiInstance_c, 0, byteArray, numOfBytes); |
group-Avnet | 0:478cfd88041f | 357 | |
group-Avnet | 0:478cfd88041f | 358 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 359 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 360 | |
group-Avnet | 0:478cfd88041f | 361 | return phyIRQSTS1; |
group-Avnet | 0:478cfd88041f | 362 | } |
group-Avnet | 0:478cfd88041f | 363 | |
group-Avnet | 0:478cfd88041f | 364 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 365 | * Name: MCR20Drv_IndirectAccessSPIWrite |
group-Avnet | 0:478cfd88041f | 366 | * Description: - |
group-Avnet | 0:478cfd88041f | 367 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 368 | * Return: - |
group-Avnet | 0:478cfd88041f | 369 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 370 | void MCR20Drv_IndirectAccessSPIWrite |
group-Avnet | 0:478cfd88041f | 371 | ( |
group-Avnet | 0:478cfd88041f | 372 | uint8_t address, |
group-Avnet | 0:478cfd88041f | 373 | uint8_t value |
group-Avnet | 0:478cfd88041f | 374 | ) |
group-Avnet | 0:478cfd88041f | 375 | { |
group-Avnet | 0:478cfd88041f | 376 | uint32_t txData; |
group-Avnet | 0:478cfd88041f | 377 | |
group-Avnet | 0:478cfd88041f | 378 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 379 | |
group-Avnet | 0:478cfd88041f | 380 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 16000000); |
group-Avnet | 0:478cfd88041f | 381 | |
group-Avnet | 0:478cfd88041f | 382 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 383 | |
group-Avnet | 0:478cfd88041f | 384 | txData = TransceiverSPI_IARIndexReg; |
group-Avnet | 0:478cfd88041f | 385 | txData |= (address) << 8; |
group-Avnet | 0:478cfd88041f | 386 | txData |= (value) << 16; |
group-Avnet | 0:478cfd88041f | 387 | |
group-Avnet | 0:478cfd88041f | 388 | xcvr_spi_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, 0, 3); |
group-Avnet | 0:478cfd88041f | 389 | |
group-Avnet | 0:478cfd88041f | 390 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 391 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 392 | } |
group-Avnet | 0:478cfd88041f | 393 | |
group-Avnet | 0:478cfd88041f | 394 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 395 | * Name: MCR20Drv_IndirectAccessSPIMultiByteWrite |
group-Avnet | 0:478cfd88041f | 396 | * Description: - |
group-Avnet | 0:478cfd88041f | 397 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 398 | * Return: - |
group-Avnet | 0:478cfd88041f | 399 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 400 | void MCR20Drv_IndirectAccessSPIMultiByteWrite |
group-Avnet | 0:478cfd88041f | 401 | ( |
group-Avnet | 0:478cfd88041f | 402 | uint8_t startAddress, |
group-Avnet | 0:478cfd88041f | 403 | uint8_t * byteArray, |
group-Avnet | 0:478cfd88041f | 404 | uint8_t numOfBytes |
group-Avnet | 0:478cfd88041f | 405 | ) |
group-Avnet | 0:478cfd88041f | 406 | { |
group-Avnet | 0:478cfd88041f | 407 | uint16_t txData; |
group-Avnet | 0:478cfd88041f | 408 | |
group-Avnet | 0:478cfd88041f | 409 | if( (numOfBytes == 0) || (byteArray == 0) ) |
group-Avnet | 0:478cfd88041f | 410 | { |
group-Avnet | 0:478cfd88041f | 411 | return; |
group-Avnet | 0:478cfd88041f | 412 | } |
group-Avnet | 0:478cfd88041f | 413 | |
group-Avnet | 0:478cfd88041f | 414 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 415 | |
group-Avnet | 0:478cfd88041f | 416 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 16000000); |
group-Avnet | 0:478cfd88041f | 417 | |
group-Avnet | 0:478cfd88041f | 418 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 419 | |
group-Avnet | 0:478cfd88041f | 420 | txData = TransceiverSPI_IARIndexReg; |
group-Avnet | 0:478cfd88041f | 421 | txData |= (startAddress) << 8; |
group-Avnet | 0:478cfd88041f | 422 | |
group-Avnet | 0:478cfd88041f | 423 | xcvr_spi_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, 0, sizeof(txData)); |
group-Avnet | 0:478cfd88041f | 424 | xcvr_spi_transfer(gXcvrSpiInstance_c, (uint8_t*)byteArray, 0, numOfBytes); |
group-Avnet | 0:478cfd88041f | 425 | |
group-Avnet | 0:478cfd88041f | 426 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 427 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 428 | } |
group-Avnet | 0:478cfd88041f | 429 | |
group-Avnet | 0:478cfd88041f | 430 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 431 | * Name: MCR20Drv_IndirectAccessSPIRead |
group-Avnet | 0:478cfd88041f | 432 | * Description: - |
group-Avnet | 0:478cfd88041f | 433 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 434 | * Return: - |
group-Avnet | 0:478cfd88041f | 435 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 436 | uint8_t MCR20Drv_IndirectAccessSPIRead |
group-Avnet | 0:478cfd88041f | 437 | ( |
group-Avnet | 0:478cfd88041f | 438 | uint8_t address |
group-Avnet | 0:478cfd88041f | 439 | ) |
group-Avnet | 0:478cfd88041f | 440 | { |
group-Avnet | 0:478cfd88041f | 441 | uint16_t txData; |
group-Avnet | 0:478cfd88041f | 442 | uint8_t rxData; |
group-Avnet | 0:478cfd88041f | 443 | |
group-Avnet | 0:478cfd88041f | 444 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 445 | |
group-Avnet | 0:478cfd88041f | 446 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 8000000); |
group-Avnet | 0:478cfd88041f | 447 | |
group-Avnet | 0:478cfd88041f | 448 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 449 | |
group-Avnet | 0:478cfd88041f | 450 | txData = TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect; |
group-Avnet | 0:478cfd88041f | 451 | txData |= (address) << 8; |
group-Avnet | 0:478cfd88041f | 452 | |
group-Avnet | 0:478cfd88041f | 453 | xcvr_spi_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, 0, sizeof(txData)); |
group-Avnet | 0:478cfd88041f | 454 | xcvr_spi_transfer(gXcvrSpiInstance_c, 0, &rxData, sizeof(rxData)); |
group-Avnet | 0:478cfd88041f | 455 | |
group-Avnet | 0:478cfd88041f | 456 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 457 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 458 | |
group-Avnet | 0:478cfd88041f | 459 | return rxData; |
group-Avnet | 0:478cfd88041f | 460 | } |
group-Avnet | 0:478cfd88041f | 461 | |
group-Avnet | 0:478cfd88041f | 462 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 463 | * Name: MCR20Drv_IndirectAccessSPIMultiByteRead |
group-Avnet | 0:478cfd88041f | 464 | * Description: - |
group-Avnet | 0:478cfd88041f | 465 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 466 | * Return: - |
group-Avnet | 0:478cfd88041f | 467 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 468 | void MCR20Drv_IndirectAccessSPIMultiByteRead |
group-Avnet | 0:478cfd88041f | 469 | ( |
group-Avnet | 0:478cfd88041f | 470 | uint8_t startAddress, |
group-Avnet | 0:478cfd88041f | 471 | uint8_t * byteArray, |
group-Avnet | 0:478cfd88041f | 472 | uint8_t numOfBytes |
group-Avnet | 0:478cfd88041f | 473 | ) |
group-Avnet | 0:478cfd88041f | 474 | { |
group-Avnet | 0:478cfd88041f | 475 | uint16_t txData; |
group-Avnet | 0:478cfd88041f | 476 | |
group-Avnet | 0:478cfd88041f | 477 | if( (numOfBytes == 0) || (byteArray == 0) ) |
group-Avnet | 0:478cfd88041f | 478 | { |
group-Avnet | 0:478cfd88041f | 479 | return; |
group-Avnet | 0:478cfd88041f | 480 | } |
group-Avnet | 0:478cfd88041f | 481 | |
group-Avnet | 0:478cfd88041f | 482 | ProtectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 483 | |
group-Avnet | 0:478cfd88041f | 484 | xcvr_spi_configure_speed(gXcvrSpiInstance_c, 8000000); |
group-Avnet | 0:478cfd88041f | 485 | |
group-Avnet | 0:478cfd88041f | 486 | gXcvrAssertCS_d(); |
group-Avnet | 0:478cfd88041f | 487 | |
group-Avnet | 0:478cfd88041f | 488 | txData = (TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect); |
group-Avnet | 0:478cfd88041f | 489 | txData |= (startAddress) << 8; |
group-Avnet | 0:478cfd88041f | 490 | |
group-Avnet | 0:478cfd88041f | 491 | xcvr_spi_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, 0, sizeof(txData)); |
group-Avnet | 0:478cfd88041f | 492 | xcvr_spi_transfer(gXcvrSpiInstance_c, 0, byteArray, numOfBytes); |
group-Avnet | 0:478cfd88041f | 493 | |
group-Avnet | 0:478cfd88041f | 494 | gXcvrDeassertCS_d(); |
group-Avnet | 0:478cfd88041f | 495 | UnprotectFromMCR20Interrupt(); |
group-Avnet | 0:478cfd88041f | 496 | } |
group-Avnet | 0:478cfd88041f | 497 | |
group-Avnet | 0:478cfd88041f | 498 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 499 | * Name: MCR20Drv_IsIrqPending |
group-Avnet | 0:478cfd88041f | 500 | * Description: - |
group-Avnet | 0:478cfd88041f | 501 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 502 | * Return: - |
group-Avnet | 0:478cfd88041f | 503 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 504 | uint32_t MCR20Drv_IsIrqPending |
group-Avnet | 0:478cfd88041f | 505 | ( |
group-Avnet | 0:478cfd88041f | 506 | void |
group-Avnet | 0:478cfd88041f | 507 | ) |
group-Avnet | 0:478cfd88041f | 508 | { |
group-Avnet | 0:478cfd88041f | 509 | return RF_isIRQ_Pending(); |
group-Avnet | 0:478cfd88041f | 510 | } |
group-Avnet | 0:478cfd88041f | 511 | |
group-Avnet | 0:478cfd88041f | 512 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 513 | * Name: MCR20Drv_IRQ_Disable |
group-Avnet | 0:478cfd88041f | 514 | * Description: - |
group-Avnet | 0:478cfd88041f | 515 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 516 | * Return: - |
group-Avnet | 0:478cfd88041f | 517 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 518 | void MCR20Drv_IRQ_Disable |
group-Avnet | 0:478cfd88041f | 519 | ( |
group-Avnet | 0:478cfd88041f | 520 | void |
group-Avnet | 0:478cfd88041f | 521 | ) |
group-Avnet | 0:478cfd88041f | 522 | { |
group-Avnet | 0:478cfd88041f | 523 | platform_enter_critical(); |
group-Avnet | 0:478cfd88041f | 524 | |
group-Avnet | 0:478cfd88041f | 525 | if( mPhyIrqDisableCnt == 0 ) |
group-Avnet | 0:478cfd88041f | 526 | { |
group-Avnet | 0:478cfd88041f | 527 | RF_IRQ_Disable(); |
group-Avnet | 0:478cfd88041f | 528 | } |
group-Avnet | 0:478cfd88041f | 529 | |
group-Avnet | 0:478cfd88041f | 530 | mPhyIrqDisableCnt++; |
group-Avnet | 0:478cfd88041f | 531 | |
group-Avnet | 0:478cfd88041f | 532 | platform_exit_critical(); |
group-Avnet | 0:478cfd88041f | 533 | } |
group-Avnet | 0:478cfd88041f | 534 | |
group-Avnet | 0:478cfd88041f | 535 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 536 | * Name: MCR20Drv_IRQ_Enable |
group-Avnet | 0:478cfd88041f | 537 | * Description: - |
group-Avnet | 0:478cfd88041f | 538 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 539 | * Return: - |
group-Avnet | 0:478cfd88041f | 540 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 541 | void MCR20Drv_IRQ_Enable |
group-Avnet | 0:478cfd88041f | 542 | ( |
group-Avnet | 0:478cfd88041f | 543 | void |
group-Avnet | 0:478cfd88041f | 544 | ) |
group-Avnet | 0:478cfd88041f | 545 | { |
group-Avnet | 0:478cfd88041f | 546 | platform_enter_critical(); |
group-Avnet | 0:478cfd88041f | 547 | |
group-Avnet | 0:478cfd88041f | 548 | if( mPhyIrqDisableCnt ) |
group-Avnet | 0:478cfd88041f | 549 | { |
group-Avnet | 0:478cfd88041f | 550 | mPhyIrqDisableCnt--; |
group-Avnet | 0:478cfd88041f | 551 | |
group-Avnet | 0:478cfd88041f | 552 | if( mPhyIrqDisableCnt == 0 ) |
group-Avnet | 0:478cfd88041f | 553 | { |
group-Avnet | 0:478cfd88041f | 554 | RF_IRQ_Enable(); |
group-Avnet | 0:478cfd88041f | 555 | } |
group-Avnet | 0:478cfd88041f | 556 | } |
group-Avnet | 0:478cfd88041f | 557 | |
group-Avnet | 0:478cfd88041f | 558 | platform_exit_critical(); |
group-Avnet | 0:478cfd88041f | 559 | } |
group-Avnet | 0:478cfd88041f | 560 | |
group-Avnet | 0:478cfd88041f | 561 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 562 | * Name: MCR20Drv_RST_Assert |
group-Avnet | 0:478cfd88041f | 563 | * Description: - |
group-Avnet | 0:478cfd88041f | 564 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 565 | * Return: - |
group-Avnet | 0:478cfd88041f | 566 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 567 | void MCR20Drv_RST_B_Assert |
group-Avnet | 0:478cfd88041f | 568 | ( |
group-Avnet | 0:478cfd88041f | 569 | void |
group-Avnet | 0:478cfd88041f | 570 | ) |
group-Avnet | 0:478cfd88041f | 571 | { |
group-Avnet | 0:478cfd88041f | 572 | RF_RST_Set(0); |
group-Avnet | 0:478cfd88041f | 573 | } |
group-Avnet | 0:478cfd88041f | 574 | |
group-Avnet | 0:478cfd88041f | 575 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 576 | * Name: MCR20Drv_RST_Deassert |
group-Avnet | 0:478cfd88041f | 577 | * Description: - |
group-Avnet | 0:478cfd88041f | 578 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 579 | * Return: - |
group-Avnet | 0:478cfd88041f | 580 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 581 | void MCR20Drv_RST_B_Deassert |
group-Avnet | 0:478cfd88041f | 582 | ( |
group-Avnet | 0:478cfd88041f | 583 | void |
group-Avnet | 0:478cfd88041f | 584 | ) |
group-Avnet | 0:478cfd88041f | 585 | { |
group-Avnet | 0:478cfd88041f | 586 | RF_RST_Set(1); |
group-Avnet | 0:478cfd88041f | 587 | } |
group-Avnet | 0:478cfd88041f | 588 | |
group-Avnet | 0:478cfd88041f | 589 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 590 | * Name: MCR20Drv_SoftRST_Assert |
group-Avnet | 0:478cfd88041f | 591 | * Description: - |
group-Avnet | 0:478cfd88041f | 592 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 593 | * Return: - |
group-Avnet | 0:478cfd88041f | 594 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 595 | void MCR20Drv_SoftRST_Assert |
group-Avnet | 0:478cfd88041f | 596 | ( |
group-Avnet | 0:478cfd88041f | 597 | void |
group-Avnet | 0:478cfd88041f | 598 | ) |
group-Avnet | 0:478cfd88041f | 599 | { |
group-Avnet | 0:478cfd88041f | 600 | MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80)); |
group-Avnet | 0:478cfd88041f | 601 | } |
group-Avnet | 0:478cfd88041f | 602 | |
group-Avnet | 0:478cfd88041f | 603 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 604 | * Name: MCR20Drv_SoftRST_Deassert |
group-Avnet | 0:478cfd88041f | 605 | * Description: - |
group-Avnet | 0:478cfd88041f | 606 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 607 | * Return: - |
group-Avnet | 0:478cfd88041f | 608 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 609 | void MCR20Drv_SoftRST_Deassert |
group-Avnet | 0:478cfd88041f | 610 | ( |
group-Avnet | 0:478cfd88041f | 611 | void |
group-Avnet | 0:478cfd88041f | 612 | ) |
group-Avnet | 0:478cfd88041f | 613 | { |
group-Avnet | 0:478cfd88041f | 614 | MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00)); |
group-Avnet | 0:478cfd88041f | 615 | } |
group-Avnet | 0:478cfd88041f | 616 | |
group-Avnet | 0:478cfd88041f | 617 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 618 | * Name: MCR20Drv_Soft_RESET |
group-Avnet | 0:478cfd88041f | 619 | * Description: - |
group-Avnet | 0:478cfd88041f | 620 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 621 | * Return: - |
group-Avnet | 0:478cfd88041f | 622 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 623 | void MCR20Drv_Soft_RESET |
group-Avnet | 0:478cfd88041f | 624 | ( |
group-Avnet | 0:478cfd88041f | 625 | void |
group-Avnet | 0:478cfd88041f | 626 | ) |
group-Avnet | 0:478cfd88041f | 627 | { |
group-Avnet | 0:478cfd88041f | 628 | //assert SOG_RST |
group-Avnet | 0:478cfd88041f | 629 | MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80)); |
group-Avnet | 0:478cfd88041f | 630 | |
group-Avnet | 0:478cfd88041f | 631 | //deassert SOG_RST |
group-Avnet | 0:478cfd88041f | 632 | MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00)); |
group-Avnet | 0:478cfd88041f | 633 | } |
group-Avnet | 0:478cfd88041f | 634 | |
group-Avnet | 0:478cfd88041f | 635 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 636 | * Name: MCR20Drv_RESET |
group-Avnet | 0:478cfd88041f | 637 | * Description: - |
group-Avnet | 0:478cfd88041f | 638 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 639 | * Return: - |
group-Avnet | 0:478cfd88041f | 640 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 641 | void MCR20Drv_RESET |
group-Avnet | 0:478cfd88041f | 642 | ( |
group-Avnet | 0:478cfd88041f | 643 | void |
group-Avnet | 0:478cfd88041f | 644 | ) |
group-Avnet | 0:478cfd88041f | 645 | { |
group-Avnet | 0:478cfd88041f | 646 | volatile uint32_t delay = 1000; |
group-Avnet | 0:478cfd88041f | 647 | //assert RST_B |
group-Avnet | 0:478cfd88041f | 648 | MCR20Drv_RST_B_Assert(); |
group-Avnet | 0:478cfd88041f | 649 | |
group-Avnet | 0:478cfd88041f | 650 | while(delay--); |
group-Avnet | 0:478cfd88041f | 651 | |
group-Avnet | 0:478cfd88041f | 652 | //deassert RST_B |
group-Avnet | 0:478cfd88041f | 653 | MCR20Drv_RST_B_Deassert(); |
group-Avnet | 0:478cfd88041f | 654 | } |
group-Avnet | 0:478cfd88041f | 655 | |
group-Avnet | 0:478cfd88041f | 656 | /*--------------------------------------------------------------------------- |
group-Avnet | 0:478cfd88041f | 657 | * Name: MCR20Drv_Set_CLK_OUT_Freq |
group-Avnet | 0:478cfd88041f | 658 | * Description: - |
group-Avnet | 0:478cfd88041f | 659 | * Parameters: - |
group-Avnet | 0:478cfd88041f | 660 | * Return: - |
group-Avnet | 0:478cfd88041f | 661 | *---------------------------------------------------------------------------*/ |
group-Avnet | 0:478cfd88041f | 662 | void MCR20Drv_Set_CLK_OUT_Freq |
group-Avnet | 0:478cfd88041f | 663 | ( |
group-Avnet | 0:478cfd88041f | 664 | uint8_t freqDiv |
group-Avnet | 0:478cfd88041f | 665 | ) |
group-Avnet | 0:478cfd88041f | 666 | { |
group-Avnet | 0:478cfd88041f | 667 | uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND; |
group-Avnet | 0:478cfd88041f | 668 | |
group-Avnet | 0:478cfd88041f | 669 | if(freqDiv == gCLK_OUT_FREQ_DISABLE) |
group-Avnet | 0:478cfd88041f | 670 | { |
group-Avnet | 0:478cfd88041f | 671 | clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled |
group-Avnet | 0:478cfd88041f | 672 | } |
group-Avnet | 0:478cfd88041f | 673 | |
group-Avnet | 0:478cfd88041f | 674 | MCR20Drv_DirectAccessSPIWrite((uint8_t) CLK_OUT_CTRL, clkOutCtrlReg); |
group-Avnet | 0:478cfd88041f | 675 | } |