Arrow / Mbed OS DAPLink Reset
Embed: (wiki syntax)

« Back to documentation index

Uart Struct Reference

Uart hardware registers. More...

#include <uart.h>

Data Fields

WoReg UART_CR
 (Uart Offset: 0x0000) Control Register
RwReg UART_MR
 (Uart Offset: 0x0004) Mode Register
WoReg UART_IER
 (Uart Offset: 0x0008) Interrupt Enable Register
WoReg UART_IDR
 (Uart Offset: 0x000C) Interrupt Disable Register
RoReg UART_IMR
 (Uart Offset: 0x0010) Interrupt Mask Register
RoReg UART_SR
 (Uart Offset: 0x0014) Status Register
RoReg UART_RHR
 (Uart Offset: 0x0018) Receive Holding Register
WoReg UART_THR
 (Uart Offset: 0x001C) Transmit Holding Register
RwReg UART_BRGR
 (Uart Offset: 0x0020) Baud Rate Generator Register
RwReg UART_RPR
 (Uart Offset: 0x100) Receive Pointer Register
RwReg UART_RCR
 (Uart Offset: 0x104) Receive Counter Register
RwReg UART_TPR
 (Uart Offset: 0x108) Transmit Pointer Register
RwReg UART_TCR
 (Uart Offset: 0x10C) Transmit Counter Register
RwReg UART_RNPR
 (Uart Offset: 0x110) Receive Next Pointer Register
RwReg UART_RNCR
 (Uart Offset: 0x114) Receive Next Counter Register
RwReg UART_TNPR
 (Uart Offset: 0x118) Transmit Next Pointer Register
RwReg UART_TNCR
 (Uart Offset: 0x11C) Transmit Next Counter Register
WoReg UART_PTCR
 (Uart Offset: 0x120) Transfer Control Register
RoReg UART_PTSR
 (Uart Offset: 0x124) Transfer Status Register

Detailed Description

Uart hardware registers.

Definition at line 41 of file atmel/sam3u2c/component/uart.h.


Field Documentation

(Uart Offset: 0x0020) Baud Rate Generator Register

Definition at line 50 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x0000) Control Register

Definition at line 42 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x000C) Interrupt Disable Register

Definition at line 45 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x0008) Interrupt Enable Register

Definition at line 44 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x0010) Interrupt Mask Register

Definition at line 46 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x0004) Mode Register

Definition at line 43 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x120) Transfer Control Register

Definition at line 60 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x124) Transfer Status Register

Definition at line 61 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x104) Receive Counter Register

Definition at line 53 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x0018) Receive Holding Register

Definition at line 48 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x114) Receive Next Counter Register

Definition at line 57 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x110) Receive Next Pointer Register

Definition at line 56 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x100) Receive Pointer Register

Definition at line 52 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x0014) Status Register

Definition at line 47 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x10C) Transmit Counter Register

Definition at line 55 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x001C) Transmit Holding Register

Definition at line 49 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x11C) Transmit Next Counter Register

Definition at line 59 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x118) Transmit Next Pointer Register

Definition at line 58 of file atmel/sam3u2c/component/uart.h.

(Uart Offset: 0x108) Transmit Pointer Register

Definition at line 54 of file atmel/sam3u2c/component/uart.h.