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TcChannel Struct Reference
[Timer Counter]
TcChannel hardware registers. More...
#include <tc.h>
Data Fields | |
| RwReg | TC_CCR |
| (TcChannel Offset: 0x0) Channel Control Register | |
| RwReg | TC_CMR |
| (TcChannel Offset: 0x4) Channel Mode Register | |
| RwReg | TC_CV |
| (TcChannel Offset: 0x10) Counter Value | |
| RwReg | TC_RA |
| (TcChannel Offset: 0x14) Register A | |
| RwReg | TC_RB |
| (TcChannel Offset: 0x18) Register B | |
| RwReg | TC_RC |
| (TcChannel Offset: 0x1C) Register C | |
| RwReg | TC_SR |
| (TcChannel Offset: 0x20) Status Register | |
| RwReg | TC_IER |
| (TcChannel Offset: 0x24) Interrupt Enable Register | |
| RwReg | TC_IDR |
| (TcChannel Offset: 0x28) Interrupt Disable Register | |
| RwReg | TC_IMR |
| (TcChannel Offset: 0x2C) Interrupt Mask Register | |
Detailed Description
TcChannel hardware registers.
Definition at line 41 of file tc.h.
Field Documentation
Generated on Tue Jul 12 2022 15:37:38 by
1.7.2