Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
TIM_TypeDef Struct Reference
[Peripheral_registers_structures]
TIM Timers. More...
#include <stm32f103xb.h>
Data Fields | |
| __IO uint32_t | CR1 |
| __IO uint32_t | CR2 |
| __IO uint32_t | SMCR |
| __IO uint32_t | DIER |
| __IO uint32_t | SR |
| __IO uint32_t | EGR |
| __IO uint32_t | CCMR1 |
| __IO uint32_t | CCMR2 |
| __IO uint32_t | CCER |
| __IO uint32_t | CNT |
| __IO uint32_t | PSC |
| __IO uint32_t | ARR |
| __IO uint32_t | RCR |
| __IO uint32_t | CCR1 |
| __IO uint32_t | CCR2 |
| __IO uint32_t | CCR3 |
| __IO uint32_t | CCR4 |
| __IO uint32_t | BDTR |
| __IO uint32_t | DCR |
| __IO uint32_t | DMAR |
| __IO uint32_t | OR |
Detailed Description
TIM Timers.
Definition at line 524 of file stm32f103xb.h.
Field Documentation
| __IO uint32_t ARR |
TIM auto-reload register, Address offset: 0x2C
Definition at line 537 of file stm32f103xb.h.
| __IO uint32_t BDTR |
TIM break and dead-time register, Address offset: 0x44
Definition at line 543 of file stm32f103xb.h.
| __IO uint32_t CCER |
TIM capture/compare enable register, Address offset: 0x20
Definition at line 534 of file stm32f103xb.h.
| __IO uint32_t CCMR1 |
TIM capture/compare mode register 1, Address offset: 0x18
Definition at line 532 of file stm32f103xb.h.
| __IO uint32_t CCMR2 |
TIM capture/compare mode register 2, Address offset: 0x1C
Definition at line 533 of file stm32f103xb.h.
| __IO uint32_t CCR1 |
TIM capture/compare register 1, Address offset: 0x34
Definition at line 539 of file stm32f103xb.h.
| __IO uint32_t CCR2 |
TIM capture/compare register 2, Address offset: 0x38
Definition at line 540 of file stm32f103xb.h.
| __IO uint32_t CCR3 |
TIM capture/compare register 3, Address offset: 0x3C
Definition at line 541 of file stm32f103xb.h.
| __IO uint32_t CCR4 |
TIM capture/compare register 4, Address offset: 0x40
Definition at line 542 of file stm32f103xb.h.
| __IO uint32_t CNT |
TIM counter register, Address offset: 0x24
Definition at line 535 of file stm32f103xb.h.
| __IO uint32_t CR1 |
TIM control register 1, Address offset: 0x00
Definition at line 526 of file stm32f103xb.h.
| __IO uint32_t CR2 |
TIM control register 2, Address offset: 0x04
Definition at line 527 of file stm32f103xb.h.
| __IO uint32_t DCR |
TIM DMA control register, Address offset: 0x48
Definition at line 544 of file stm32f103xb.h.
| __IO uint32_t DIER |
TIM DMA/interrupt enable register, Address offset: 0x0C
Definition at line 529 of file stm32f103xb.h.
| __IO uint32_t DMAR |
TIM DMA address for full transfer register, Address offset: 0x4C
Definition at line 545 of file stm32f103xb.h.
| __IO uint32_t EGR |
TIM event generation register, Address offset: 0x14
Definition at line 531 of file stm32f103xb.h.
| __IO uint32_t OR |
TIM option register, Address offset: 0x50
Definition at line 546 of file stm32f103xb.h.
| __IO uint32_t PSC |
TIM prescaler register, Address offset: 0x28
Definition at line 536 of file stm32f103xb.h.
| __IO uint32_t RCR |
TIM repetition counter register, Address offset: 0x30
Definition at line 538 of file stm32f103xb.h.
| __IO uint32_t SMCR |
TIM slave Mode Control register, Address offset: 0x08
Definition at line 528 of file stm32f103xb.h.
| __IO uint32_t SR |
TIM status register, Address offset: 0x10
Definition at line 530 of file stm32f103xb.h.
Generated on Tue Jul 12 2022 15:37:38 by
1.7.2