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lpc43xx_cgu.c File Reference
Functions

lpc43xx_cgu.c File Reference

DAPLink Interface Firmware Copyright (c) 2009-2016, ARM Limited, All Rights Reserved SPDX-License-Identifier: Apache-2.0. More...

Go to the source code of this file.

Functions

static void cgu_WaitUS (volatile uint32_t us)
 Rough approximation of a delay function with microsecond resolution.
static void cgu_findMN (uint32_t wantedFreq, uint32_t *pMsel, uint32_t *pNsel)
 Simple lookup of best MSEL and NSEL values for wanted frequency.
uint32_t CGU_Init (uint32_t wantedFreq)
 Initialize default clock for LPC4300 Eval board.
uint32_t CGU_ConfigPWR (CGU_PERIPHERAL_T PPType, FunctionalState en)
 Configure power for individual peripheral.
uint32_t CGU_GetPCLKFrequency (CGU_PERIPHERAL_T Clock)
 Get peripheral clock frequency.
void CGU_UpdateClock (void)
 Update clock.
uint32_t CGU_SetXTALOSC (uint32_t ClockFrequency)
 Set XTAL oscillator value.
uint32_t CGU_SetDIV (CGU_ENTITY_T SelectDivider, uint32_t divisor)
 Set clock divider.
uint32_t CGU_EnableEntity (CGU_ENTITY_T ClockEntity, uint32_t en)
 Enable clock entity.
uint32_t CGU_EntityConnect (CGU_ENTITY_T ClockSource, CGU_ENTITY_T ClockEntity)
 Connect entity clock source.
uint32_t CGU_SetPLL0 (void)
 Get current USB PLL clock from XTAL.
uint32_t CGU_SetPLL0audio (void)
 Get current Audio PLL clock from XTAL.
uint32_t CGU_SetPLL1 (uint32_t mult)
 Setting PLL1.
uint32_t CGU_GetBaseStatus (CGU_ENTITY_T Base)
 Get current base status.
int CGU_FrequencyMonitor (CGU_ENTITY_T Clock, uint32_t *m, uint32_t *d)
 Compare one source clock to IRC clock.
uint32_t CGU_RealFrequencyCompare (CGU_ENTITY_T Clock, CGU_ENTITY_T CompareToClock, uint32_t *m, uint32_t *d)
 Compare one source clock to another source clock.

Detailed Description

DAPLink Interface Firmware Copyright (c) 2009-2016, ARM Limited, All Rights Reserved SPDX-License-Identifier: Apache-2.0.

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

Definition in file lpc43xx_cgu.c.

Function Documentation

static void cgu_findMN ( uint32_t  wantedFreq,
uint32_t *  pMsel,
uint32_t *  pNsel 
) [static]

Simple lookup of best MSEL and NSEL values for wanted frequency.

Not optimized.

Parameters:
[in]wantedFreqThe wanted PLL1 frequency
[out]pMselThe best MSEL value for the PLL1_CTRL register
[out]pNselThe best NSEL value for the PLL1_CTRL register

Definition at line 198 of file lpc43xx_cgu.c.

int CGU_FrequencyMonitor ( CGU_ENTITY_T  Clock,
uint32_t *  m,
uint32_t *  d 
)

Compare one source clock to IRC clock.

Parameters:
[in]ClockClock entity that will be compared to IRC, should be:

  • CGU_CLKSRC_32KHZ_OSC :32Khz crystal oscillator
  • CGU_CLKSRC_ENET_RX_CLK :Ethernet receive clock
  • CGU_CLKSRC_ENET_TX_CLK :Ethernet transmit clock
  • CGU_CLKSRC_GP_CLKIN :General purpose input clock
  • CGU_CLKSRC_XTAL_OSC :Crystal oscillator
  • CGU_CLKSRC_PLL0 :PLL0 clock
  • CGU_CLKSRC_PLL1 :PLL1 clock
  • CGU_CLKSRC_IDIVA :Integer divider register A
  • CGU_CLKSRC_IDIVB :Integer divider register B
  • CGU_CLKSRC_IDIVC :Integer divider register C
  • CGU_CLKSRC_IDIVD :Integer divider register D
  • CGU_CLKSRC_IDIVE :Integer divider register E
  • CGU_BASE_SAFE :Base safe clock (always on)for WDT
  • CGU_BASE_USB0 :Base clock for USB0
  • CGU_BASE_USB1 :Base clock for USB1
  • CGU_BASE_M4 :System base clock for ARM Cortex-M3 core and APB peripheral blocks #0 and #2
  • CGU_BASE_SPIFI :Base clock for SPIFI
  • CGU_BASE_PHY_RX :Base clock for Ethernet PHY Rx
  • CGU_BASE_PHY_TX :Base clock for Ethernet PHY Tx
  • CGU_BASE_APB1 :Base clock for APB peripheral block #1
  • CGU_BASE_APB3 :Base clock for APB peripheral block #3
  • CGU_BASE_LCD :Base clock for LCD
  • CGU_BASE_SDIO :Base clock for SDIO card reader
  • CGU_BASE_SSP0 :Base clock for SSP0
  • CGU_BASE_SSP1 :Base clock for SSP1
  • CGU_BASE_UART0 :Base clock for UART0
  • CGU_BASE_UART1 :Base clock for UART1
  • CGU_BASE_UART2 :Base clock for UART2
  • CGU_BASE_UART3 :Base clock for UART3
  • CGU_BASE_CLKOUT :Base clock for CLKOUT pin
[in]mMultiple value pointer
[in]dDivider value pointer
Returns:
Compare status, could be:
  • (-1): fail
  • 0: successful
Note:
Formula used to compare: FClock = F_IRC* m / d

Definition at line 1029 of file lpc43xx_cgu.c.

static void cgu_WaitUS ( volatile uint32_t  us ) [static]

Rough approximation of a delay function with microsecond resolution.

Used during initial clock setup as the Timers are not configured yet.

Parameters:
[in]usThe number of microseconds to wait

Definition at line 180 of file lpc43xx_cgu.c.

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