Arrow / Mbed OS DAPLink Reset

Repostiory containing DAPLink source code with Reset Pin workaround for HANI_IOT board.

Upstream: https://github.com/ARMmbed/DAPLink

source/hic_hal/stm32/stm32f103xb/uart.c@0:01f31e923fe2, 2020-04-07 (annotated)

Committer:
Pawel Zarembski
Date:
Tue Apr 07 12:55:42 2020 +0200
Revision:
0:01f31e923fe2
hani: DAPLink with reset workaround

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pawel Zarembski 0:01f31e923fe2 1 /**
Pawel Zarembski 0:01f31e923fe2 2 * @file uart.c
Pawel Zarembski 0:01f31e923fe2 3 * @brief
Pawel Zarembski 0:01f31e923fe2 4 *
Pawel Zarembski 0:01f31e923fe2 5 * DAPLink Interface Firmware
Pawel Zarembski 0:01f31e923fe2 6 * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved
Pawel Zarembski 0:01f31e923fe2 7 * SPDX-License-Identifier: Apache-2.0
Pawel Zarembski 0:01f31e923fe2 8 *
Pawel Zarembski 0:01f31e923fe2 9 * Licensed under the Apache License, Version 2.0 (the "License"); you may
Pawel Zarembski 0:01f31e923fe2 10 * not use this file except in compliance with the License.
Pawel Zarembski 0:01f31e923fe2 11 * You may obtain a copy of the License at
Pawel Zarembski 0:01f31e923fe2 12 *
Pawel Zarembski 0:01f31e923fe2 13 * http://www.apache.org/licenses/LICENSE-2.0
Pawel Zarembski 0:01f31e923fe2 14 *
Pawel Zarembski 0:01f31e923fe2 15 * Unless required by applicable law or agreed to in writing, software
Pawel Zarembski 0:01f31e923fe2 16 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
Pawel Zarembski 0:01f31e923fe2 17 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Pawel Zarembski 0:01f31e923fe2 18 * See the License for the specific language governing permissions and
Pawel Zarembski 0:01f31e923fe2 19 * limitations under the License.
Pawel Zarembski 0:01f31e923fe2 20 */
Pawel Zarembski 0:01f31e923fe2 21
Pawel Zarembski 0:01f31e923fe2 22 #include "string.h"
Pawel Zarembski 0:01f31e923fe2 23
Pawel Zarembski 0:01f31e923fe2 24 #include "stm32f1xx.h"
Pawel Zarembski 0:01f31e923fe2 25 #include "uart.h"
Pawel Zarembski 0:01f31e923fe2 26 #include "gpio.h"
Pawel Zarembski 0:01f31e923fe2 27 #include "util.h"
Pawel Zarembski 0:01f31e923fe2 28 #include "circ_buf.h"
Pawel Zarembski 0:01f31e923fe2 29 #include "IO_Config.h"
Pawel Zarembski 0:01f31e923fe2 30
Pawel Zarembski 0:01f31e923fe2 31 // For usart
Pawel Zarembski 0:01f31e923fe2 32 #define CDC_UART USART2
Pawel Zarembski 0:01f31e923fe2 33 #define CDC_UART_ENABLE() __HAL_RCC_USART2_CLK_ENABLE()
Pawel Zarembski 0:01f31e923fe2 34 #define CDC_UART_DISABLE() __HAL_RCC_USART2_CLK_DISABLE()
Pawel Zarembski 0:01f31e923fe2 35 #define CDC_UART_IRQn USART2_IRQn
Pawel Zarembski 0:01f31e923fe2 36 #define CDC_UART_IRQn_Handler USART2_IRQHandler
Pawel Zarembski 0:01f31e923fe2 37
Pawel Zarembski 0:01f31e923fe2 38 #define UART_PINS_PORT_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
Pawel Zarembski 0:01f31e923fe2 39 #define UART_PINS_PORT_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
Pawel Zarembski 0:01f31e923fe2 40
Pawel Zarembski 0:01f31e923fe2 41 #define UART_TX_PORT GPIOA
Pawel Zarembski 0:01f31e923fe2 42 #define UART_TX_PIN GPIO_PIN_2
Pawel Zarembski 0:01f31e923fe2 43
Pawel Zarembski 0:01f31e923fe2 44 #define UART_RX_PORT GPIOA
Pawel Zarembski 0:01f31e923fe2 45 #define UART_RX_PIN GPIO_PIN_3
Pawel Zarembski 0:01f31e923fe2 46
Pawel Zarembski 0:01f31e923fe2 47 #define UART_CTS_PORT GPIOA
Pawel Zarembski 0:01f31e923fe2 48 #define UART_CTS_PIN GPIO_PIN_0
Pawel Zarembski 0:01f31e923fe2 49
Pawel Zarembski 0:01f31e923fe2 50 #define UART_RTS_PORT GPIOA
Pawel Zarembski 0:01f31e923fe2 51 #define UART_RTS_PIN GPIO_PIN_1
Pawel Zarembski 0:01f31e923fe2 52
Pawel Zarembski 0:01f31e923fe2 53
Pawel Zarembski 0:01f31e923fe2 54 #define RX_OVRF_MSG "<DAPLink:Overflow>\n"
Pawel Zarembski 0:01f31e923fe2 55 #define RX_OVRF_MSG_SIZE (sizeof(RX_OVRF_MSG) - 1)
Pawel Zarembski 0:01f31e923fe2 56 #define BUFFER_SIZE (512)
Pawel Zarembski 0:01f31e923fe2 57
Pawel Zarembski 0:01f31e923fe2 58 circ_buf_t write_buffer;
Pawel Zarembski 0:01f31e923fe2 59 uint8_t write_buffer_data[BUFFER_SIZE];
Pawel Zarembski 0:01f31e923fe2 60 circ_buf_t read_buffer;
Pawel Zarembski 0:01f31e923fe2 61 uint8_t read_buffer_data[BUFFER_SIZE];
Pawel Zarembski 0:01f31e923fe2 62
Pawel Zarembski 0:01f31e923fe2 63 static UART_Configuration configuration = {
Pawel Zarembski 0:01f31e923fe2 64 .Baudrate = 9600,
Pawel Zarembski 0:01f31e923fe2 65 .DataBits = UART_DATA_BITS_8,
Pawel Zarembski 0:01f31e923fe2 66 .Parity = UART_PARITY_NONE,
Pawel Zarembski 0:01f31e923fe2 67 .StopBits = UART_STOP_BITS_1,
Pawel Zarembski 0:01f31e923fe2 68 .FlowControl = UART_FLOW_CONTROL_NONE,
Pawel Zarembski 0:01f31e923fe2 69 };
Pawel Zarembski 0:01f31e923fe2 70
Pawel Zarembski 0:01f31e923fe2 71 extern uint32_t SystemCoreClock;
Pawel Zarembski 0:01f31e923fe2 72
Pawel Zarembski 0:01f31e923fe2 73
Pawel Zarembski 0:01f31e923fe2 74
Pawel Zarembski 0:01f31e923fe2 75 static void clear_buffers(void)
Pawel Zarembski 0:01f31e923fe2 76 {
Pawel Zarembski 0:01f31e923fe2 77 circ_buf_init(&write_buffer, write_buffer_data, sizeof(write_buffer_data));
Pawel Zarembski 0:01f31e923fe2 78 circ_buf_init(&read_buffer, read_buffer_data, sizeof(read_buffer_data));
Pawel Zarembski 0:01f31e923fe2 79 }
Pawel Zarembski 0:01f31e923fe2 80
Pawel Zarembski 0:01f31e923fe2 81 int32_t uart_initialize(void)
Pawel Zarembski 0:01f31e923fe2 82 {
Pawel Zarembski 0:01f31e923fe2 83 GPIO_InitTypeDef GPIO_InitStructure;
Pawel Zarembski 0:01f31e923fe2 84
Pawel Zarembski 0:01f31e923fe2 85 CDC_UART->CR1 &= ~(USART_IT_TXE | USART_IT_RXNE);
Pawel Zarembski 0:01f31e923fe2 86 clear_buffers();
Pawel Zarembski 0:01f31e923fe2 87
Pawel Zarembski 0:01f31e923fe2 88 CDC_UART_ENABLE();
Pawel Zarembski 0:01f31e923fe2 89 UART_PINS_PORT_ENABLE();
Pawel Zarembski 0:01f31e923fe2 90
Pawel Zarembski 0:01f31e923fe2 91 //TX pin
Pawel Zarembski 0:01f31e923fe2 92 GPIO_InitStructure.Pin = UART_TX_PIN;
Pawel Zarembski 0:01f31e923fe2 93 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_HIGH;
Pawel Zarembski 0:01f31e923fe2 94 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
Pawel Zarembski 0:01f31e923fe2 95 HAL_GPIO_Init(UART_TX_PORT, &GPIO_InitStructure);
Pawel Zarembski 0:01f31e923fe2 96 //RX pin
Pawel Zarembski 0:01f31e923fe2 97 GPIO_InitStructure.Pin = UART_RX_PIN;
Pawel Zarembski 0:01f31e923fe2 98 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_HIGH;
Pawel Zarembski 0:01f31e923fe2 99 GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
Pawel Zarembski 0:01f31e923fe2 100 GPIO_InitStructure.Pull = GPIO_PULLUP;
Pawel Zarembski 0:01f31e923fe2 101 HAL_GPIO_Init(UART_RX_PORT, &GPIO_InitStructure);
Pawel Zarembski 0:01f31e923fe2 102 //CTS pin, input
Pawel Zarembski 0:01f31e923fe2 103 GPIO_InitStructure.Pin = UART_CTS_PIN;
Pawel Zarembski 0:01f31e923fe2 104 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_HIGH;
Pawel Zarembski 0:01f31e923fe2 105 GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
Pawel Zarembski 0:01f31e923fe2 106 GPIO_InitStructure.Pull = GPIO_PULLUP;
Pawel Zarembski 0:01f31e923fe2 107 HAL_GPIO_Init(UART_CTS_PORT, &GPIO_InitStructure);
Pawel Zarembski 0:01f31e923fe2 108 //RTS pin, output low
Pawel Zarembski 0:01f31e923fe2 109 HAL_GPIO_WritePin(UART_RTS_PORT, UART_RTS_PIN, GPIO_PIN_RESET);
Pawel Zarembski 0:01f31e923fe2 110 GPIO_InitStructure.Pin = UART_RTS_PIN;
Pawel Zarembski 0:01f31e923fe2 111 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_HIGH;
Pawel Zarembski 0:01f31e923fe2 112 GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
Pawel Zarembski 0:01f31e923fe2 113 HAL_GPIO_Init(UART_RTS_PORT, &GPIO_InitStructure);
Pawel Zarembski 0:01f31e923fe2 114
Pawel Zarembski 0:01f31e923fe2 115 NVIC_EnableIRQ(CDC_UART_IRQn);
Pawel Zarembski 0:01f31e923fe2 116
Pawel Zarembski 0:01f31e923fe2 117 return 1;
Pawel Zarembski 0:01f31e923fe2 118 }
Pawel Zarembski 0:01f31e923fe2 119
Pawel Zarembski 0:01f31e923fe2 120 int32_t uart_uninitialize(void)
Pawel Zarembski 0:01f31e923fe2 121 {
Pawel Zarembski 0:01f31e923fe2 122 CDC_UART->CR1 &= ~(USART_IT_TXE | USART_IT_RXNE);
Pawel Zarembski 0:01f31e923fe2 123 clear_buffers();
Pawel Zarembski 0:01f31e923fe2 124 return 1;
Pawel Zarembski 0:01f31e923fe2 125 }
Pawel Zarembski 0:01f31e923fe2 126
Pawel Zarembski 0:01f31e923fe2 127 int32_t uart_reset(void)
Pawel Zarembski 0:01f31e923fe2 128 {
Pawel Zarembski 0:01f31e923fe2 129 const uint32_t cr1 = CDC_UART->CR1;
Pawel Zarembski 0:01f31e923fe2 130 CDC_UART->CR1 = cr1 & ~(USART_IT_TXE | USART_IT_RXNE);
Pawel Zarembski 0:01f31e923fe2 131 clear_buffers();
Pawel Zarembski 0:01f31e923fe2 132 CDC_UART->CR1 = cr1 & ~USART_IT_TXE;
Pawel Zarembski 0:01f31e923fe2 133 return 1;
Pawel Zarembski 0:01f31e923fe2 134 }
Pawel Zarembski 0:01f31e923fe2 135
Pawel Zarembski 0:01f31e923fe2 136 int32_t uart_set_configuration(UART_Configuration *config)
Pawel Zarembski 0:01f31e923fe2 137 {
Pawel Zarembski 0:01f31e923fe2 138 UART_HandleTypeDef uart_handle;
Pawel Zarembski 0:01f31e923fe2 139 HAL_StatusTypeDef status;
Pawel Zarembski 0:01f31e923fe2 140
Pawel Zarembski 0:01f31e923fe2 141 memset(&uart_handle, 0, sizeof(uart_handle));
Pawel Zarembski 0:01f31e923fe2 142 uart_handle.Instance = CDC_UART;
Pawel Zarembski 0:01f31e923fe2 143
Pawel Zarembski 0:01f31e923fe2 144 // parity
Pawel Zarembski 0:01f31e923fe2 145 configuration.Parity = config->Parity;
Pawel Zarembski 0:01f31e923fe2 146 if(config->Parity == UART_PARITY_ODD) {
Pawel Zarembski 0:01f31e923fe2 147 uart_handle.Init.Parity = HAL_UART_PARITY_ODD;
Pawel Zarembski 0:01f31e923fe2 148 } else if(config->Parity == UART_PARITY_EVEN) {
Pawel Zarembski 0:01f31e923fe2 149 uart_handle.Init.Parity = HAL_UART_PARITY_EVEN;
Pawel Zarembski 0:01f31e923fe2 150 } else if(config->Parity == UART_PARITY_NONE) {
Pawel Zarembski 0:01f31e923fe2 151 uart_handle.Init.Parity = HAL_UART_PARITY_NONE;
Pawel Zarembski 0:01f31e923fe2 152 } else { //Other not support
Pawel Zarembski 0:01f31e923fe2 153 uart_handle.Init.Parity = HAL_UART_PARITY_NONE;
Pawel Zarembski 0:01f31e923fe2 154 configuration.Parity = UART_PARITY_NONE;
Pawel Zarembski 0:01f31e923fe2 155 }
Pawel Zarembski 0:01f31e923fe2 156
Pawel Zarembski 0:01f31e923fe2 157 // stop bits
Pawel Zarembski 0:01f31e923fe2 158 configuration.StopBits = config->StopBits;
Pawel Zarembski 0:01f31e923fe2 159 if(config->StopBits == UART_STOP_BITS_2) {
Pawel Zarembski 0:01f31e923fe2 160 uart_handle.Init.StopBits = UART_STOPBITS_2;
Pawel Zarembski 0:01f31e923fe2 161 } else if(config->StopBits == UART_STOP_BITS_1_5) {
Pawel Zarembski 0:01f31e923fe2 162 uart_handle.Init.StopBits = UART_STOPBITS_2;
Pawel Zarembski 0:01f31e923fe2 163 configuration.StopBits = UART_STOP_BITS_2;
Pawel Zarembski 0:01f31e923fe2 164 } else if(config->StopBits == UART_STOP_BITS_1) {
Pawel Zarembski 0:01f31e923fe2 165 uart_handle.Init.StopBits = UART_STOPBITS_1;
Pawel Zarembski 0:01f31e923fe2 166 } else {
Pawel Zarembski 0:01f31e923fe2 167 uart_handle.Init.StopBits = UART_STOPBITS_1;
Pawel Zarembski 0:01f31e923fe2 168 configuration.StopBits = UART_STOP_BITS_1;
Pawel Zarembski 0:01f31e923fe2 169 }
Pawel Zarembski 0:01f31e923fe2 170
Pawel Zarembski 0:01f31e923fe2 171 //Only 8 bit support
Pawel Zarembski 0:01f31e923fe2 172 configuration.DataBits = UART_DATA_BITS_8;
Pawel Zarembski 0:01f31e923fe2 173 uart_handle.Init.WordLength = UART_WORDLENGTH_8B;
Pawel Zarembski 0:01f31e923fe2 174
Pawel Zarembski 0:01f31e923fe2 175 // No flow control
Pawel Zarembski 0:01f31e923fe2 176 configuration.FlowControl = UART_FLOW_CONTROL_NONE;
Pawel Zarembski 0:01f31e923fe2 177 uart_handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
Pawel Zarembski 0:01f31e923fe2 178
Pawel Zarembski 0:01f31e923fe2 179 // Specified baudrate
Pawel Zarembski 0:01f31e923fe2 180 configuration.Baudrate = config->Baudrate;
Pawel Zarembski 0:01f31e923fe2 181 uart_handle.Init.BaudRate = config->Baudrate;
Pawel Zarembski 0:01f31e923fe2 182
Pawel Zarembski 0:01f31e923fe2 183 // TX and RX
Pawel Zarembski 0:01f31e923fe2 184 uart_handle.Init.Mode = UART_MODE_TX_RX;
Pawel Zarembski 0:01f31e923fe2 185
Pawel Zarembski 0:01f31e923fe2 186 // Disable uart and tx/rx interrupt
Pawel Zarembski 0:01f31e923fe2 187 CDC_UART->CR1 &= ~(USART_IT_TXE | USART_IT_RXNE);
Pawel Zarembski 0:01f31e923fe2 188
Pawel Zarembski 0:01f31e923fe2 189 clear_buffers();
Pawel Zarembski 0:01f31e923fe2 190
Pawel Zarembski 0:01f31e923fe2 191 status = HAL_UART_DeInit(&uart_handle);
Pawel Zarembski 0:01f31e923fe2 192 util_assert(HAL_OK == status);
Pawel Zarembski 0:01f31e923fe2 193 status = HAL_UART_Init(&uart_handle);
Pawel Zarembski 0:01f31e923fe2 194 util_assert(HAL_OK == status);
Pawel Zarembski 0:01f31e923fe2 195 (void)status;
Pawel Zarembski 0:01f31e923fe2 196
Pawel Zarembski 0:01f31e923fe2 197 CDC_UART->CR1 |= USART_IT_RXNE;
Pawel Zarembski 0:01f31e923fe2 198
Pawel Zarembski 0:01f31e923fe2 199 return 1;
Pawel Zarembski 0:01f31e923fe2 200 }
Pawel Zarembski 0:01f31e923fe2 201
Pawel Zarembski 0:01f31e923fe2 202 int32_t uart_get_configuration(UART_Configuration *config)
Pawel Zarembski 0:01f31e923fe2 203 {
Pawel Zarembski 0:01f31e923fe2 204 config->Baudrate = configuration.Baudrate;
Pawel Zarembski 0:01f31e923fe2 205 config->DataBits = configuration.DataBits;
Pawel Zarembski 0:01f31e923fe2 206 config->Parity = configuration.Parity;
Pawel Zarembski 0:01f31e923fe2 207 config->StopBits = configuration.StopBits;
Pawel Zarembski 0:01f31e923fe2 208 config->FlowControl = UART_FLOW_CONTROL_NONE;
Pawel Zarembski 0:01f31e923fe2 209
Pawel Zarembski 0:01f31e923fe2 210 return 1;
Pawel Zarembski 0:01f31e923fe2 211 }
Pawel Zarembski 0:01f31e923fe2 212
Pawel Zarembski 0:01f31e923fe2 213 int32_t uart_write_free(void)
Pawel Zarembski 0:01f31e923fe2 214 {
Pawel Zarembski 0:01f31e923fe2 215 return circ_buf_count_free(&write_buffer);
Pawel Zarembski 0:01f31e923fe2 216 }
Pawel Zarembski 0:01f31e923fe2 217
Pawel Zarembski 0:01f31e923fe2 218 int32_t uart_write_data(uint8_t *data, uint16_t size)
Pawel Zarembski 0:01f31e923fe2 219 {
Pawel Zarembski 0:01f31e923fe2 220 uint32_t cnt = circ_buf_write(&write_buffer, data, size);
Pawel Zarembski 0:01f31e923fe2 221 CDC_UART->CR1 |= USART_IT_TXE;
Pawel Zarembski 0:01f31e923fe2 222
Pawel Zarembski 0:01f31e923fe2 223 return cnt;
Pawel Zarembski 0:01f31e923fe2 224 }
Pawel Zarembski 0:01f31e923fe2 225
Pawel Zarembski 0:01f31e923fe2 226 int32_t uart_read_data(uint8_t *data, uint16_t size)
Pawel Zarembski 0:01f31e923fe2 227 {
Pawel Zarembski 0:01f31e923fe2 228 return circ_buf_read(&read_buffer, data, size);
Pawel Zarembski 0:01f31e923fe2 229 }
Pawel Zarembski 0:01f31e923fe2 230
Pawel Zarembski 0:01f31e923fe2 231 void CDC_UART_IRQn_Handler(void)
Pawel Zarembski 0:01f31e923fe2 232 {
Pawel Zarembski 0:01f31e923fe2 233 const uint32_t sr = CDC_UART->SR;
Pawel Zarembski 0:01f31e923fe2 234
Pawel Zarembski 0:01f31e923fe2 235 if (sr & USART_SR_RXNE) {
Pawel Zarembski 0:01f31e923fe2 236 uint8_t dat = CDC_UART->DR;
Pawel Zarembski 0:01f31e923fe2 237 uint32_t free = circ_buf_count_free(&read_buffer);
Pawel Zarembski 0:01f31e923fe2 238 if (free > RX_OVRF_MSG_SIZE) {
Pawel Zarembski 0:01f31e923fe2 239 circ_buf_push(&read_buffer, dat);
Pawel Zarembski 0:01f31e923fe2 240 } else if (RX_OVRF_MSG_SIZE == free) {
Pawel Zarembski 0:01f31e923fe2 241 circ_buf_write(&read_buffer, (uint8_t*)RX_OVRF_MSG, RX_OVRF_MSG_SIZE);
Pawel Zarembski 0:01f31e923fe2 242 } else {
Pawel Zarembski 0:01f31e923fe2 243 // Drop character
Pawel Zarembski 0:01f31e923fe2 244 }
Pawel Zarembski 0:01f31e923fe2 245 }
Pawel Zarembski 0:01f31e923fe2 246
Pawel Zarembski 0:01f31e923fe2 247 if (sr & USART_SR_TXE) {
Pawel Zarembski 0:01f31e923fe2 248 if (circ_buf_count_used(&write_buffer) > 0) {
Pawel Zarembski 0:01f31e923fe2 249 CDC_UART->DR = circ_buf_pop(&write_buffer);
Pawel Zarembski 0:01f31e923fe2 250 } else {
Pawel Zarembski 0:01f31e923fe2 251 CDC_UART->CR1 &= ~USART_IT_TXE;
Pawel Zarembski 0:01f31e923fe2 252 }
Pawel Zarembski 0:01f31e923fe2 253 }
Pawel Zarembski 0:01f31e923fe2 254 }