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Dependencies: mbed
main.cpp
- Committer:
- bgrissom
- Date:
- 2014-07-07
- Revision:
- 1:256d7a2f8391
- Parent:
- 0:b0f98b83cb07
- Child:
- 2:a57a5501152c
File content as of revision 1:256d7a2f8391:
#include "mbed.h"
int main() {
// NOTE: 24MHz is half the 48MHz clock rate. The PWM registers
// seem to only allow 24MHz at this point, so I'm matching
// the SPI bus speed to be the same.
//
// 1/24MHz => 1/(24*10^6) => 41.6*10^-9 second period,
// which means 41.6ns period and 20.8ns pulse width at
// 50% duty cycle (which seems to be right for the SPI clock
// line as well as a reasonable choice for the PWM line).
/////////////////////////////////////////////////
// SPI SETUP
/////////////////////////////////////////////////
// We are not using MISO, this is a one-way bus
//SPI device(SPI_MOSI, NC, SPI_SCK);
// Note: Polarity and phase are both 0 for the TC62D723FNG
// For a graphical reminder on polarity and phase, visit:
// http://www.eetimes.com/document.asp?doc_id=1272534
//
//device.format(16, 0);
//device.frequency(24000000); // 24 MHz
//device.frequency(1000000); // 1 MHz
/////////////////////////////////////////////////
/////////////////////////////////////////////////
// PWMCLK
/////////////////////////////////////////////////
//PwmOut pinPWMCLK(D9); // For Nucleo board, not for Redgarden board
//pinPWMCLK.write(0.5f); // Set to 50% duty cycle for testing
/////////////////////////////////////////////////
// OTHER / DEBUG
/////////////////////////////////////////////////
/////////////////////////////////////////////////
printf("17:22\n");
//int i = 0;
while(1) {
wait_us(50);
// S0 Command: Needs only SCK and SIN (which are SPI_SCK and SPI_MOSI respectively)
// This is because TRANS can be 0 for this command according to the datasheet
SPI data(SPI_MOSI, NC, SPI_SCK);
data.format(16, 0);
data.frequency(1000000); // 1 MHz
data.write(0xFF);
// S1 Command: TRANS / "LATCH"
// The S1 command doesn't use SIN, but TRANS needs to be on for exactly
// three clock pulses. The easiest way to do this is re-configuring
// the SPI bus to use the TRANS line as MOSI and sending 0x07. If this
// doesn't work, we need to bitbang it.
SPI latch(PA_9, NC, SPI_SCK);
latch.format(16, 0);
latch.frequency(1000000); // 1 MHz
latch.write(0x07); // Three clock pulses
}
}