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Dependencies: mbed
Diff: main.cpp
- Revision:
- 2:a57a5501152c
- Parent:
- 1:256d7a2f8391
- Child:
- 3:6f12c437ab88
--- a/main.cpp Mon Jul 07 23:39:59 2014 +0000
+++ b/main.cpp Fri Jul 11 15:37:30 2014 +0000
@@ -1,5 +1,16 @@
#include "mbed.h"
-
+
+#define OK (0)
+#define ERROR (-1)
+
+// Forward Declarations
+void pwmout_period_ns(pwmout_t* obj, int us);
+int cmd_S0(uint16_t value);
+void cmd_S1(void);
+
+bool gSpiMode = false;
+SPI* gSpiPtr = NULL;
+
int main() {
// NOTE: 24MHz is half the 48MHz clock rate. The PWM registers
// seem to only allow 24MHz at this point, so I'm matching
@@ -12,57 +23,122 @@
/////////////////////////////////////////////////
- // SPI SETUP
+ // PWMCLK
/////////////////////////////////////////////////
- // We are not using MISO, this is a one-way bus
- //SPI device(SPI_MOSI, NC, SPI_SCK);
+ pwmout_t outs;
+ pwmout_init(&outs, D9);
+ //pwmout_period_ns(&outs, 2); // 24 MHz (not very clean on the scope)
+ pwmout_period_ns(&outs, 40); //
+ pwmout_write(&outs, 0.5f);
+
+
+ int ret = OK; // Return value
+ int i = 0;
+
+ printf("17:32\n");
+
+ while (1) {
+ //wait_ms(50);
+ for (i=0; i<16; i++) {
+ ret = cmd_S0(0x0003);
+ if (ret != OK) {
+ printf("ERROR cmd_S0()\n");
+ return ERROR;
+ }
+ }
+ cmd_S1();
+ }
+}
- // Note: Polarity and phase are both 0 for the TC62D723FNG
- // For a graphical reminder on polarity and phase, visit:
- // http://www.eetimes.com/document.asp?doc_id=1272534
- //
- //device.format(16, 0);
- //device.frequency(24000000); // 24 MHz
- //device.frequency(1000000); // 1 MHz
- /////////////////////////////////////////////////
+
+// This code is based off:
+// mbed/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/pwmout_api.c pwmout_period_us()
+void pwmout_period_ns(pwmout_t* obj, int us) {
+ TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
+ TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
+ float dc = pwmout_read(obj);
+
+ TIM_Cmd(tim, DISABLE);
+
+ obj->period = us;
+
+ TIM_TimeBaseStructure.TIM_Period = obj->period - 1;
+ // Orig code: TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
+ TIM_TimeBaseStructure.TIM_Prescaler = 0; // BAG 1 ns tick (?)
+ TIM_TimeBaseStructure.TIM_ClockDivision = 0;
+ TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
+ TIM_TimeBaseInit(tim, &TIM_TimeBaseStructure);
+
+ // Set duty cycle again
+ pwmout_write(obj, dc);
+
+ TIM_ARRPreloadConfig(tim, ENABLE);
+
+ TIM_Cmd(tim, ENABLE);
+}
- /////////////////////////////////////////////////
- // PWMCLK
- /////////////////////////////////////////////////
- //PwmOut pinPWMCLK(D9); // For Nucleo board, not for Redgarden board
- //pinPWMCLK.write(0.5f); // Set to 50% duty cycle for testing
+// S0 Command:
+// Needs only SCK and SIN (which are SPI_SCK and SPI_MOSI respectively).
+// This is because TRANS can be 0 for this command according to the datasheet.
+int cmd_S0(uint16_t value) {
+ // Command S0 and S1 share the same clock line, so we need to be
+ // careful which mode we are in. This avoids re-initializing these
+ // pins if we are already in SPI mode.
+ // WARNING: Re-initializing every time makes the MOSI line dirty and
+ // is wasteful for the CPU.
+ if ( gSpiMode == false &&
+ gSpiPtr == NULL)
+ {
+ // We are not using MISO, this is a one-way bus
+ gSpiPtr = new SPI(SPI_MOSI, NC, SPI_SCK);
+ if (gSpiPtr == NULL) {
+ printf("ERROR: Could not allocate SPI\n");
+ return ERROR;
+ }
- /////////////////////////////////////////////////
- // OTHER / DEBUG
- /////////////////////////////////////////////////
- /////////////////////////////////////////////////
-
+ // Note: Polarity and phase are both 0 for the TC62D723FNG
+ // For a graphical reminder on polarity and phase, visit:
+ // http://www.eetimes.com/document.asp?doc_id=1272534
+ gSpiPtr->format(16, 0);
+ gSpiPtr->frequency(1000000); // 1 MHz
+ //gSpiPtr->frequency(24000000); // 24 MHz
+ gSpiMode = true;
+ }
+ gSpiPtr->write(value);
+ return OK;
+}
- printf("17:22\n");
- //int i = 0;
- while(1) {
- wait_us(50);
-
- // S0 Command: Needs only SCK and SIN (which are SPI_SCK and SPI_MOSI respectively)
- // This is because TRANS can be 0 for this command according to the datasheet
- SPI data(SPI_MOSI, NC, SPI_SCK);
- data.format(16, 0);
- data.frequency(1000000); // 1 MHz
- data.write(0xFF);
+void cmd_S1(void) {
+ int i = 0;
+ int j = 0;
+
+ if ( gSpiMode == true &&
+ gSpiPtr != NULL)
+ {
+ delete gSpiPtr;
+ gSpiPtr = NULL;
+ gSpiMode = false;
+ }
- // S1 Command: TRANS / "LATCH"
- // The S1 command doesn't use SIN, but TRANS needs to be on for exactly
- // three clock pulses. The easiest way to do this is re-configuring
- // the SPI bus to use the TRANS line as MOSI and sending 0x07. If this
- // doesn't work, we need to bitbang it.
- SPI latch(PA_9, NC, SPI_SCK);
- latch.format(16, 0);
- latch.frequency(1000000); // 1 MHz
- latch.write(0x07); // Three clock pulses
+ DigitalOut bbSCK (D13); // bit bang clock
+ DigitalOut bbTRANS(D8); // bit bang TRANS (data) line
+
+ bbSCK = 0; // Start off/low
+ bbTRANS = 1; // Set high
+
+ // Loop 6 times = 3 clock cycles
+ for (j=0; j<6; j++) { // Always use an even number here!
+ // The order of these two lines matter!
+ i == 0 ? i = 1 : i = 0; // Toggle i
+ i == 0 ? bbSCK = 0 : bbSCK = 1; // Set SCK to the same value as i
}
-}
\ No newline at end of file
+ bbTRANS = 0; // Set low
+}
+
+
+